2 * linux/arch/x86-64/kernel/time.c
4 * "High Precision Event Timer" based timekeeping.
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/kallsyms.h>
28 #include <linux/acpi.h>
30 #include <acpi/achware.h> /* for PM timer frequency */
32 #include <asm/8253pit.h>
33 #include <asm/pgtable.h>
34 #include <asm/vsyscall.h>
35 #include <asm/timex.h>
36 #include <asm/proto.h>
38 #include <asm/sections.h>
39 #include <linux/cpufreq.h>
40 #include <linux/hpet.h>
41 #ifdef CONFIG_X86_LOCAL_APIC
45 #ifdef CONFIG_CPU_FREQ
46 static void cpufreq_delayed_get(void);
48 extern void i8254_timer_resume(void);
49 extern int using_apic_timer;
51 static char *time_init_gtod(void);
53 DEFINE_SPINLOCK(rtc_lock);
54 DEFINE_SPINLOCK(i8253_lock);
56 int nohpet __initdata = 0;
57 static int notsc __initdata = 0;
59 #undef HPET_HACK_ENABLE_DANGEROUS
61 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
62 static unsigned long hpet_period; /* fsecs / HPET clock */
63 unsigned long hpet_tick; /* HPET clocks / interrupt */
64 int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
65 unsigned long vxtime_hz = PIT_TICK_RATE;
66 int report_lost_ticks; /* command line option */
67 unsigned long long monotonic_base;
69 struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
71 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
72 unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES;
73 struct timespec __xtime __section_xtime;
74 struct timezone __sys_tz __section_sys_tz;
77 * do_gettimeoffset() returns microseconds since last timer interrupt was
78 * triggered by hardware. A memory read of HPET is slower than a register read
79 * of TSC, but much more reliable. It's also synchronized to the timer
80 * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
81 * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
82 * This is not a problem, because jiffies hasn't updated either. They are bound
83 * together by xtime_lock.
86 static inline unsigned int do_gettimeoffset_tsc(void)
90 t = get_cycles_sync();
91 if (t < vxtime.last_tsc)
92 t = vxtime.last_tsc; /* hack */
93 x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> 32;
97 static inline unsigned int do_gettimeoffset_hpet(void)
99 /* cap counter read to one tick to avoid inconsistencies */
100 unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
101 return (min(counter,hpet_tick) * vxtime.quot) >> 32;
104 unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
107 * This version of gettimeofday() has microsecond resolution and better than
108 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
112 void do_gettimeofday(struct timeval *tv)
114 unsigned long seq, t;
115 unsigned int sec, usec;
118 seq = read_seqbegin(&xtime_lock);
121 usec = xtime.tv_nsec / 1000;
123 /* i386 does some correction here to keep the clock
124 monotonous even when ntpd is fixing drift.
125 But they didn't work for me, there is a non monotonic
126 clock anyways with ntp.
127 I dropped all corrections now until a real solution can
128 be found. Note when you fix it here you need to do the same
129 in arch/x86_64/kernel/vsyscall.c and export all needed
130 variables in vmlinux.lds. -AK */
132 t = (jiffies - wall_jiffies) * (1000000L / HZ) +
136 } while (read_seqretry(&xtime_lock, seq));
138 tv->tv_sec = sec + usec / 1000000;
139 tv->tv_usec = usec % 1000000;
142 EXPORT_SYMBOL(do_gettimeofday);
145 * settimeofday() first undoes the correction that gettimeofday would do
146 * on the time, and then saves it. This is ugly, but has been like this for
150 int do_settimeofday(struct timespec *tv)
152 time_t wtm_sec, sec = tv->tv_sec;
153 long wtm_nsec, nsec = tv->tv_nsec;
155 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
158 write_seqlock_irq(&xtime_lock);
160 nsec -= do_gettimeoffset() * 1000 +
161 (jiffies - wall_jiffies) * (NSEC_PER_SEC/HZ);
163 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
164 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
166 set_normalized_timespec(&xtime, sec, nsec);
167 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
171 write_sequnlock_irq(&xtime_lock);
176 EXPORT_SYMBOL(do_settimeofday);
178 unsigned long profile_pc(struct pt_regs *regs)
180 unsigned long pc = instruction_pointer(regs);
182 /* Assume the lock function has either no stack frame or only a single
183 word. This checks if the address on the stack looks like a kernel
185 There is a small window for false hits, but in that case the tick
186 is just accounted to the spinlock function.
187 Better would be to write these functions in assembler again
188 and check exactly. */
189 if (in_lock_functions(pc)) {
190 char *v = *(char **)regs->rsp;
191 if ((v >= _stext && v <= _etext) ||
192 (v >= _sinittext && v <= _einittext) ||
193 (v >= (char *)MODULES_VADDR && v <= (char *)MODULES_END))
194 return (unsigned long)v;
195 return ((unsigned long *)regs->rsp)[1];
199 EXPORT_SYMBOL(profile_pc);
202 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
203 * ms after the second nowtime has started, because when nowtime is written
204 * into the registers of the CMOS clock, it will jump to the next second
205 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
209 static void set_rtc_mmss(unsigned long nowtime)
211 int real_seconds, real_minutes, cmos_minutes;
212 unsigned char control, freq_select;
215 * IRQs are disabled when we're called from the timer interrupt,
216 * no need for spin_lock_irqsave()
219 spin_lock(&rtc_lock);
222 * Tell the clock it's being set and stop it.
225 control = CMOS_READ(RTC_CONTROL);
226 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
228 freq_select = CMOS_READ(RTC_FREQ_SELECT);
229 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
231 cmos_minutes = CMOS_READ(RTC_MINUTES);
232 BCD_TO_BIN(cmos_minutes);
235 * since we're only adjusting minutes and seconds, don't interfere with hour
236 * overflow. This avoids messing with unknown time zones but requires your RTC
237 * not to be off by more than 15 minutes. Since we're calling it only when
238 * our clock is externally synchronized using NTP, this shouldn't be a problem.
241 real_seconds = nowtime % 60;
242 real_minutes = nowtime / 60;
243 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
244 real_minutes += 30; /* correct for half hour time zone */
247 if (abs(real_minutes - cmos_minutes) >= 30) {
248 printk(KERN_WARNING "time.c: can't update CMOS clock "
249 "from %d to %d\n", cmos_minutes, real_minutes);
251 BIN_TO_BCD(real_seconds);
252 BIN_TO_BCD(real_minutes);
253 CMOS_WRITE(real_seconds, RTC_SECONDS);
254 CMOS_WRITE(real_minutes, RTC_MINUTES);
258 * The following flags have to be released exactly in this order, otherwise the
259 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
260 * not reset the oscillator and will not update precisely 500 ms later. You
261 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
262 * believes data sheets anyway ... -- Markus Kuhn
265 CMOS_WRITE(control, RTC_CONTROL);
266 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
268 spin_unlock(&rtc_lock);
272 /* monotonic_clock(): returns # of nanoseconds passed since time_init()
273 * Note: This function is required to return accurate
274 * time even in the absence of multiple timer ticks.
276 unsigned long long monotonic_clock(void)
279 u32 last_offset, this_offset, offset;
280 unsigned long long base;
282 if (vxtime.mode == VXTIME_HPET) {
284 seq = read_seqbegin(&xtime_lock);
286 last_offset = vxtime.last;
287 base = monotonic_base;
288 this_offset = hpet_readl(HPET_COUNTER);
289 } while (read_seqretry(&xtime_lock, seq));
290 offset = (this_offset - last_offset);
291 offset *= (NSEC_PER_SEC/HZ) / hpet_tick;
294 seq = read_seqbegin(&xtime_lock);
296 last_offset = vxtime.last_tsc;
297 base = monotonic_base;
298 } while (read_seqretry(&xtime_lock, seq));
299 this_offset = get_cycles_sync();
300 offset = (this_offset - last_offset)*1000 / cpu_khz;
302 return base + offset;
304 EXPORT_SYMBOL(monotonic_clock);
306 static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
308 static long lost_count;
310 if (report_lost_ticks) {
311 printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost);
312 print_symbol("rip %s)\n", regs->rip);
315 if (lost_count == 1000 && !warned) {
316 printk(KERN_WARNING "warning: many lost ticks.\n"
317 KERN_WARNING "Your time source seems to be instable or "
318 "some driver is hogging interupts\n");
319 print_symbol("rip %s\n", regs->rip);
320 if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
321 printk(KERN_WARNING "Falling back to HPET\n");
323 vxtime.last = hpet_readl(HPET_T0_CMP) -
326 vxtime.last = hpet_readl(HPET_COUNTER);
327 vxtime.mode = VXTIME_HPET;
328 do_gettimeoffset = do_gettimeoffset_hpet;
330 /* else should fall back to PIT, but code missing. */
335 #ifdef CONFIG_CPU_FREQ
336 /* In some cases the CPU can change frequency without us noticing
337 Give cpufreq a change to catch up. */
338 if ((lost_count+1) % 25 == 0)
339 cpufreq_delayed_get();
343 void main_timer_handler(struct pt_regs *regs)
345 static unsigned long rtc_update = 0;
347 int delay = 0, offset = 0, lost = 0;
350 * Here we are in the timer irq handler. We have irqs locally disabled (so we
351 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
352 * on the other CPU, so we need a lock. We also need to lock the vsyscall
353 * variables, because both do_timer() and us change them -arca+vojtech
356 write_seqlock(&xtime_lock);
358 if (vxtime.hpet_address)
359 offset = hpet_readl(HPET_COUNTER);
361 if (hpet_use_timer) {
362 /* if we're using the hpet timer functionality,
363 * we can more accurately know the counter value
364 * when the timer interrupt occured.
366 offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
367 delay = hpet_readl(HPET_COUNTER) - offset;
368 } else if (!pmtmr_ioport) {
369 spin_lock(&i8253_lock);
372 delay |= inb(0x40) << 8;
373 spin_unlock(&i8253_lock);
374 delay = LATCH - 1 - delay;
377 tsc = get_cycles_sync();
379 if (vxtime.mode == VXTIME_HPET) {
380 if (offset - vxtime.last > hpet_tick) {
381 lost = (offset - vxtime.last) / hpet_tick - 1;
385 (offset - vxtime.last)*(NSEC_PER_SEC/HZ) / hpet_tick;
387 vxtime.last = offset;
388 #ifdef CONFIG_X86_PM_TIMER
389 } else if (vxtime.mode == VXTIME_PMTMR) {
390 lost = pmtimer_mark_offset();
393 offset = (((tsc - vxtime.last_tsc) *
394 vxtime.tsc_quot) >> 32) - (USEC_PER_SEC / HZ);
399 if (offset > (USEC_PER_SEC / HZ)) {
400 lost = offset / (USEC_PER_SEC / HZ);
401 offset %= (USEC_PER_SEC / HZ);
404 monotonic_base += (tsc - vxtime.last_tsc)*1000000/cpu_khz ;
406 vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
408 if ((((tsc - vxtime.last_tsc) *
409 vxtime.tsc_quot) >> 32) < offset)
410 vxtime.last_tsc = tsc -
411 (((long) offset << 32) / vxtime.tsc_quot) - 1;
415 handle_lost_ticks(lost, regs);
420 * Do the timer stuff.
425 update_process_times(user_mode(regs));
429 * In the SMP case we use the local APIC timer interrupt to do the profiling,
430 * except when we simulate SMP mode on a uniprocessor system, in that case we
431 * have to call the local interrupt handler.
434 #ifndef CONFIG_X86_LOCAL_APIC
435 profile_tick(CPU_PROFILING, regs);
437 if (!using_apic_timer)
438 smp_local_timer_interrupt(regs);
442 * If we have an externally synchronized Linux clock, then update CMOS clock
443 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
444 * closest to exactly 500 ms before the next second. If the update fails, we
445 * don't care, as it'll be updated on the next turn, and the problem (time way
446 * off) isn't likely to go away much sooner anyway.
449 if (ntp_synced() && xtime.tv_sec > rtc_update &&
450 abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
451 set_rtc_mmss(xtime.tv_sec);
452 rtc_update = xtime.tv_sec + 660;
455 write_sequnlock(&xtime_lock);
458 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
460 if (apic_runs_main_timer > 1)
462 main_timer_handler(regs);
463 #ifdef CONFIG_X86_LOCAL_APIC
464 if (using_apic_timer)
465 smp_send_timer_broadcast_ipi();
470 static unsigned int cyc2ns_scale __read_mostly;
471 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
473 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
475 cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
478 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
480 return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
483 unsigned long long sched_clock(void)
488 /* Don't do a HPET read here. Using TSC always is much faster
489 and HPET may not be mapped yet when the scheduler first runs.
490 Disadvantage is a small drift between CPUs in some configurations,
491 but that should be tolerable. */
492 if (__vxtime.mode == VXTIME_HPET)
493 return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> 32;
496 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
497 which means it is not completely exact and may not be monotonous between
498 CPUs. But the errors should be too small to matter for scheduling
502 return cycles_2_ns(a);
505 static unsigned long get_cmos_time(void)
507 unsigned int timeout = 1000000, year, mon, day, hour, min, sec;
508 unsigned char uip = 0, this = 0;
510 unsigned extyear = 0;
513 * The Linux interpretation of the CMOS clock register contents: When the
514 * Update-In-Progress (UIP) flag goes from 1 to 0, the RTC registers show the
515 * second which has precisely just started. Waiting for this can take up to 1
516 * second, we timeout approximately after 2.4 seconds on a machine with
517 * standard 8.3 MHz ISA bus.
520 spin_lock_irqsave(&rtc_lock, flags);
522 while (timeout && (!uip || this)) {
524 this = CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP;
529 * Here we are safe to assume the registers won't change for a whole
530 * second, so we just go ahead and read them.
532 sec = CMOS_READ(RTC_SECONDS);
533 min = CMOS_READ(RTC_MINUTES);
534 hour = CMOS_READ(RTC_HOURS);
535 day = CMOS_READ(RTC_DAY_OF_MONTH);
536 mon = CMOS_READ(RTC_MONTH);
537 year = CMOS_READ(RTC_YEAR);
540 if (acpi_fadt.revision >= FADT2_REVISION_ID && acpi_fadt.century)
541 extyear = CMOS_READ(acpi_fadt.century);
544 spin_unlock_irqrestore(&rtc_lock, flags);
547 * We know that x86-64 always uses BCD format, no need to check the
561 printk(KERN_INFO "Extended CMOS year: %d\n", extyear);
564 * x86-64 systems only exists since 2002.
565 * This will work up to Dec 31, 2100
570 return mktime(year, mon, day, hour, min, sec);
573 #ifdef CONFIG_CPU_FREQ
575 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
578 RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
579 not that important because current Opteron setups do not support
580 scaling on SMP anyroads.
582 Should fix up last_tsc too. Currently gettimeofday in the
583 first tick after the change will be slightly wrong. */
585 #include <linux/workqueue.h>
587 static unsigned int cpufreq_delayed_issched = 0;
588 static unsigned int cpufreq_init = 0;
589 static struct work_struct cpufreq_delayed_get_work;
591 static void handle_cpufreq_delayed_get(void *v)
594 for_each_online_cpu(cpu) {
597 cpufreq_delayed_issched = 0;
600 /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
601 * to verify the CPU frequency the timing core thinks the CPU is running
602 * at is still correct.
604 static void cpufreq_delayed_get(void)
607 if (cpufreq_init && !cpufreq_delayed_issched) {
608 cpufreq_delayed_issched = 1;
612 "Losing some ticks... checking if CPU frequency changed.\n");
614 schedule_work(&cpufreq_delayed_get_work);
618 static unsigned int ref_freq = 0;
619 static unsigned long loops_per_jiffy_ref = 0;
621 static unsigned long cpu_khz_ref = 0;
623 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
626 struct cpufreq_freqs *freq = data;
627 unsigned long *lpj, dummy;
629 if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
633 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
635 lpj = &cpu_data[freq->cpu].loops_per_jiffy;
637 lpj = &boot_cpu_data.loops_per_jiffy;
641 ref_freq = freq->old;
642 loops_per_jiffy_ref = *lpj;
643 cpu_khz_ref = cpu_khz;
645 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
646 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
647 (val == CPUFREQ_RESUMECHANGE)) {
649 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
651 cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
652 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
653 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
656 set_cyc2ns_scale(cpu_khz_ref);
661 static struct notifier_block time_cpufreq_notifier_block = {
662 .notifier_call = time_cpufreq_notifier
665 static int __init cpufreq_tsc(void)
667 INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
668 if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
669 CPUFREQ_TRANSITION_NOTIFIER))
674 core_initcall(cpufreq_tsc);
679 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
680 * it to the HPET timer of known frequency.
683 #define TICK_COUNT 100000000
685 static unsigned int __init hpet_calibrate_tsc(void)
687 int tsc_start, hpet_start;
688 int tsc_now, hpet_now;
691 local_irq_save(flags);
694 hpet_start = hpet_readl(HPET_COUNTER);
699 hpet_now = hpet_readl(HPET_COUNTER);
700 tsc_now = get_cycles_sync();
701 local_irq_restore(flags);
702 } while ((tsc_now - tsc_start) < TICK_COUNT &&
703 (hpet_now - hpet_start) < TICK_COUNT);
705 return (tsc_now - tsc_start) * 1000000000L
706 / ((hpet_now - hpet_start) * hpet_period / 1000);
711 * pit_calibrate_tsc() uses the speaker output (channel 2) of
712 * the PIT. This is better than using the timer interrupt output,
713 * because we can read the value of the speaker with just one inb(),
714 * where we need three i/o operations for the interrupt channel.
715 * We count how many ticks the TSC does in 50 ms.
718 static unsigned int __init pit_calibrate_tsc(void)
720 unsigned long start, end;
723 spin_lock_irqsave(&i8253_lock, flags);
725 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
728 outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
729 outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
730 start = get_cycles_sync();
731 while ((inb(0x61) & 0x20) == 0);
732 end = get_cycles_sync();
734 spin_unlock_irqrestore(&i8253_lock, flags);
736 return (end - start) / 50;
740 static __init int late_hpet_init(void)
745 if (!vxtime.hpet_address)
748 memset(&hd, 0, sizeof (hd));
750 ntimer = hpet_readl(HPET_ID);
751 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
755 * Register with driver.
756 * Timer0 and Timer1 is used by platform.
758 hd.hd_phys_address = vxtime.hpet_address;
759 hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
760 hd.hd_nirqs = ntimer;
761 hd.hd_flags = HPET_DATA_PLATFORM;
762 hpet_reserve_timer(&hd, 0);
763 #ifdef CONFIG_HPET_EMULATE_RTC
764 hpet_reserve_timer(&hd, 1);
766 hd.hd_irq[0] = HPET_LEGACY_8254;
767 hd.hd_irq[1] = HPET_LEGACY_RTC;
770 struct hpet_timer *timer;
773 hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
774 timer = &hpet->hpet_timers[2];
775 for (i = 2; i < ntimer; timer++, i++)
776 hd.hd_irq[i] = (timer->hpet_config &
777 Tn_INT_ROUTE_CNF_MASK) >>
778 Tn_INT_ROUTE_CNF_SHIFT;
785 fs_initcall(late_hpet_init);
788 static int hpet_timer_stop_set_go(unsigned long tick)
793 * Stop the timers and reset the main counter.
796 cfg = hpet_readl(HPET_CFG);
797 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
798 hpet_writel(cfg, HPET_CFG);
799 hpet_writel(0, HPET_COUNTER);
800 hpet_writel(0, HPET_COUNTER + 4);
803 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
804 * and period also hpet_tick.
806 if (hpet_use_timer) {
807 hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
808 HPET_TN_32BIT, HPET_T0_CFG);
809 hpet_writel(hpet_tick, HPET_T0_CMP);
810 hpet_writel(hpet_tick, HPET_T0_CMP); /* AK: why twice? */
811 cfg |= HPET_CFG_LEGACY;
817 cfg |= HPET_CFG_ENABLE;
818 hpet_writel(cfg, HPET_CFG);
823 static int hpet_init(void)
827 if (!vxtime.hpet_address)
829 set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
830 __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
833 * Read the period, compute tick and quotient.
836 id = hpet_readl(HPET_ID);
838 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
841 hpet_period = hpet_readl(HPET_PERIOD);
842 if (hpet_period < 100000 || hpet_period > 100000000)
845 hpet_tick = (1000000000L * (USEC_PER_SEC / HZ) + hpet_period / 2) /
848 hpet_use_timer = (id & HPET_ID_LEGSUP);
850 return hpet_timer_stop_set_go(hpet_tick);
853 static int hpet_reenable(void)
855 return hpet_timer_stop_set_go(hpet_tick);
858 #define PIT_MODE 0x43
861 static void __init __pit_init(int val, u8 mode)
865 spin_lock_irqsave(&i8253_lock, flags);
866 outb_p(mode, PIT_MODE);
867 outb_p(val & 0xff, PIT_CH0); /* LSB */
868 outb_p(val >> 8, PIT_CH0); /* MSB */
869 spin_unlock_irqrestore(&i8253_lock, flags);
872 void __init pit_init(void)
874 __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
877 void __init pit_stop_interrupt(void)
879 __pit_init(0, 0x30); /* mode 0 */
882 void __init stop_timer_interrupt(void)
885 if (vxtime.hpet_address) {
887 hpet_timer_stop_set_go(0);
890 pit_stop_interrupt();
892 printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
895 int __init time_setup(char *str)
897 report_lost_ticks = 1;
901 static struct irqaction irq0 = {
902 timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL
905 void __init time_init(void)
910 #ifdef HPET_HACK_ENABLE_DANGEROUS
911 if (!vxtime.hpet_address) {
912 printk(KERN_WARNING "time.c: WARNING: Enabling HPET base "
914 outl(0x800038a0, 0xcf8);
915 outl(0xff000001, 0xcfc);
916 outl(0x800038a0, 0xcf8);
917 vxtime.hpet_address = inl(0xcfc) & 0xfffffffe;
918 printk(KERN_WARNING "time.c: WARNING: Enabled HPET "
919 "at %#lx.\n", vxtime.hpet_address);
923 vxtime.hpet_address = 0;
925 xtime.tv_sec = get_cmos_time();
928 set_normalized_timespec(&wall_to_monotonic,
929 -xtime.tv_sec, -xtime.tv_nsec);
932 vxtime_hz = (1000000000000000L + hpet_period / 2) / hpet_period;
934 vxtime.hpet_address = 0;
936 if (hpet_use_timer) {
937 cpu_khz = hpet_calibrate_tsc();
939 #ifdef CONFIG_X86_PM_TIMER
940 } else if (pmtmr_ioport && !vxtime.hpet_address) {
941 vxtime_hz = PM_TIMER_FREQUENCY;
944 cpu_khz = pit_calibrate_tsc();
948 cpu_khz = pit_calibrate_tsc();
952 vxtime.mode = VXTIME_TSC;
953 gtod = time_init_gtod();
955 printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
956 vxtime_hz / 1000000, vxtime_hz % 1000000, timename, gtod);
957 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
958 cpu_khz / 1000, cpu_khz % 1000);
959 vxtime.quot = (1000000L << 32) / vxtime_hz;
960 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
961 vxtime.last_tsc = get_cycles_sync();
964 set_cyc2ns_scale(cpu_khz);
968 * Make an educated guess if the TSC is trustworthy and synchronized
971 __cpuinit int unsynchronized_tsc(void)
974 if (oem_force_hpet_timer())
976 /* Intel systems are normally all synchronized. Exceptions
977 are handled in the OEM check above. */
978 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
981 /* Assume multi socket systems are not synchronized */
982 return num_present_cpus() > 1;
986 * Decide what mode gettimeofday should use.
988 __init static char *time_init_gtod(void)
992 if (unsynchronized_tsc())
994 if (vxtime.hpet_address && notsc) {
995 timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
997 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
999 vxtime.last = hpet_readl(HPET_COUNTER);
1000 vxtime.mode = VXTIME_HPET;
1001 do_gettimeoffset = do_gettimeoffset_hpet;
1002 #ifdef CONFIG_X86_PM_TIMER
1003 /* Using PM for gettimeofday is quite slow, but we have no other
1004 choice because the TSC is too unreliable on some systems. */
1005 } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
1007 do_gettimeoffset = do_gettimeoffset_pm;
1008 vxtime.mode = VXTIME_PMTMR;
1009 sysctl_vsyscall = 0;
1010 printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
1013 timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
1014 vxtime.mode = VXTIME_TSC;
1019 __setup("report_lost_ticks", time_setup);
1021 static long clock_cmos_diff;
1022 static unsigned long sleep_start;
1025 * sysfs support for the timer.
1028 static int timer_suspend(struct sys_device *dev, pm_message_t state)
1031 * Estimate time zone so that set_time can update the clock
1033 long cmos_time = get_cmos_time();
1035 clock_cmos_diff = -cmos_time;
1036 clock_cmos_diff += get_seconds();
1037 sleep_start = cmos_time;
1041 static int timer_resume(struct sys_device *dev)
1043 unsigned long flags;
1045 unsigned long ctime = get_cmos_time();
1046 unsigned long sleep_length = (ctime - sleep_start) * HZ;
1048 if (vxtime.hpet_address)
1051 i8254_timer_resume();
1053 sec = ctime + clock_cmos_diff;
1054 write_seqlock_irqsave(&xtime_lock,flags);
1057 if (vxtime.mode == VXTIME_HPET) {
1059 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
1061 vxtime.last = hpet_readl(HPET_COUNTER);
1062 #ifdef CONFIG_X86_PM_TIMER
1063 } else if (vxtime.mode == VXTIME_PMTMR) {
1067 vxtime.last_tsc = get_cycles_sync();
1068 write_sequnlock_irqrestore(&xtime_lock,flags);
1069 jiffies += sleep_length;
1070 wall_jiffies += sleep_length;
1071 monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
1072 touch_softlockup_watchdog();
1076 static struct sysdev_class timer_sysclass = {
1077 .resume = timer_resume,
1078 .suspend = timer_suspend,
1079 set_kset_name("timer"),
1082 /* XXX this driverfs stuff should probably go elsewhere later -john */
1083 static struct sys_device device_timer = {
1085 .cls = &timer_sysclass,
1088 static int time_init_device(void)
1090 int error = sysdev_class_register(&timer_sysclass);
1092 error = sysdev_register(&device_timer);
1096 device_initcall(time_init_device);
1098 #ifdef CONFIG_HPET_EMULATE_RTC
1099 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
1100 * is enabled, we support RTC interrupt functionality in software.
1101 * RTC has 3 kinds of interrupts:
1102 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
1104 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1105 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1106 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
1107 * (1) and (2) above are implemented using polling at a frequency of
1108 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
1109 * overhead. (DEFAULT_RTC_INT_FREQ)
1110 * For (3), we use interrupts at 64Hz or user specified periodic
1111 * frequency, whichever is higher.
1113 #include <linux/rtc.h>
1115 #define DEFAULT_RTC_INT_FREQ 64
1116 #define RTC_NUM_INTS 1
1118 static unsigned long UIE_on;
1119 static unsigned long prev_update_sec;
1121 static unsigned long AIE_on;
1122 static struct rtc_time alarm_time;
1124 static unsigned long PIE_on;
1125 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1126 static unsigned long PIE_count;
1128 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1129 static unsigned int hpet_t1_cmp; /* cached comparator register */
1131 int is_hpet_enabled(void)
1133 return vxtime.hpet_address != 0;
1137 * Timer 1 for RTC, we do not use periodic interrupt feature,
1138 * even if HPET supports periodic interrupts on Timer 1.
1139 * The reason being, to set up a periodic interrupt in HPET, we need to
1140 * stop the main counter. And if we do that everytime someone diables/enables
1141 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
1142 * So, for the time being, simulate the periodic interrupt in software.
1144 * hpet_rtc_timer_init() is called for the first time and during subsequent
1145 * interuppts reinit happens through hpet_rtc_timer_reinit().
1147 int hpet_rtc_timer_init(void)
1149 unsigned int cfg, cnt;
1150 unsigned long flags;
1152 if (!is_hpet_enabled())
1155 * Set the counter 1 and enable the interrupts.
1157 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1158 hpet_rtc_int_freq = PIE_freq;
1160 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1162 local_irq_save(flags);
1163 cnt = hpet_readl(HPET_COUNTER);
1164 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1165 hpet_writel(cnt, HPET_T1_CMP);
1167 local_irq_restore(flags);
1169 cfg = hpet_readl(HPET_T1_CFG);
1170 cfg &= ~HPET_TN_PERIODIC;
1171 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1172 hpet_writel(cfg, HPET_T1_CFG);
1177 static void hpet_rtc_timer_reinit(void)
1179 unsigned int cfg, cnt;
1181 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1182 cfg = hpet_readl(HPET_T1_CFG);
1183 cfg &= ~HPET_TN_ENABLE;
1184 hpet_writel(cfg, HPET_T1_CFG);
1188 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1189 hpet_rtc_int_freq = PIE_freq;
1191 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1193 /* It is more accurate to use the comparator value than current count.*/
1195 cnt += hpet_tick*HZ/hpet_rtc_int_freq;
1196 hpet_writel(cnt, HPET_T1_CMP);
1201 * The functions below are called from rtc driver.
1202 * Return 0 if HPET is not being used.
1203 * Otherwise do the necessary changes and return 1.
1205 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1207 if (!is_hpet_enabled())
1210 if (bit_mask & RTC_UIE)
1212 if (bit_mask & RTC_PIE)
1214 if (bit_mask & RTC_AIE)
1220 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1222 int timer_init_reqd = 0;
1224 if (!is_hpet_enabled())
1227 if (!(PIE_on | AIE_on | UIE_on))
1228 timer_init_reqd = 1;
1230 if (bit_mask & RTC_UIE) {
1233 if (bit_mask & RTC_PIE) {
1237 if (bit_mask & RTC_AIE) {
1241 if (timer_init_reqd)
1242 hpet_rtc_timer_init();
1247 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
1249 if (!is_hpet_enabled())
1252 alarm_time.tm_hour = hrs;
1253 alarm_time.tm_min = min;
1254 alarm_time.tm_sec = sec;
1259 int hpet_set_periodic_freq(unsigned long freq)
1261 if (!is_hpet_enabled())
1270 int hpet_rtc_dropped_irq(void)
1272 if (!is_hpet_enabled())
1278 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1280 struct rtc_time curr_time;
1281 unsigned long rtc_int_flag = 0;
1282 int call_rtc_interrupt = 0;
1284 hpet_rtc_timer_reinit();
1286 if (UIE_on | AIE_on) {
1287 rtc_get_rtc_time(&curr_time);
1290 if (curr_time.tm_sec != prev_update_sec) {
1291 /* Set update int info, call real rtc int routine */
1292 call_rtc_interrupt = 1;
1293 rtc_int_flag = RTC_UF;
1294 prev_update_sec = curr_time.tm_sec;
1299 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
1300 /* Set periodic int info, call real rtc int routine */
1301 call_rtc_interrupt = 1;
1302 rtc_int_flag |= RTC_PF;
1307 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
1308 (curr_time.tm_min == alarm_time.tm_min) &&
1309 (curr_time.tm_hour == alarm_time.tm_hour)) {
1310 /* Set alarm int info, call real rtc int routine */
1311 call_rtc_interrupt = 1;
1312 rtc_int_flag |= RTC_AF;
1315 if (call_rtc_interrupt) {
1316 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1317 rtc_interrupt(rtc_int_flag, dev_id, regs);
1323 static int __init nohpet_setup(char *s)
1329 __setup("nohpet", nohpet_setup);
1331 int __init notsc_setup(char *s)
1337 __setup("notsc", notsc_setup);