arch/x86/power/cpu_32.c

   1 /*
   2  * Suspend support specific for i386.
   3  *
   4  * Distribute under GPLv2
   5  *
   6  * Copyright (c) 2002 Pavel Machek <pavel@suse.cz>
   7  * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/suspend.h>
  12 #include <asm/mtrr.h>
  13 #include <asm/mce.h>
  14 #include <asm/xcr.h>
  15
  16 static struct saved_context saved_context;
  17
  18 unsigned long saved_context_ebx;
  19 unsigned long saved_context_esp, saved_context_ebp;
  20 unsigned long saved_context_esi, saved_context_edi;
  21 unsigned long saved_context_eflags;
  22
  23 static void __save_processor_state(struct saved_context *ctxt)
  24 {
  25         mtrr_save_fixed_ranges(NULL);
  26         kernel_fpu_begin();
  27
  28         /*
  29          * descriptor tables
  30          */
  31         store_gdt(&ctxt->gdt);
  32         store_idt(&ctxt->idt);
  33         store_tr(ctxt->tr);
  34
  35         /*
  36          * segment registers
  37          */
  38         savesegment(es, ctxt->es);
  39         savesegment(fs, ctxt->fs);
  40         savesegment(gs, ctxt->gs);
  41         savesegment(ss, ctxt->ss);
  42
  43         /*
  44          * control registers
  45          */
  46         ctxt->cr0 = read_cr0();
  47         ctxt->cr2 = read_cr2();
  48         ctxt->cr3 = read_cr3();
  49         ctxt->cr4 = read_cr4_safe();
  50 }
  51
  52 /* Needed by apm.c */
  53 void save_processor_state(void)
  54 {
  55         __save_processor_state(&saved_context);
  56 }
  57 EXPORT_SYMBOL(save_processor_state);
  58
  59 static void do_fpu_end(void)
  60 {
  61         /*
  62          * Restore FPU regs if necessary.
  63          */
  64         kernel_fpu_end();
  65 }
  66
  67 static void fix_processor_context(void)
  68 {
  69         int cpu = smp_processor_id();
  70         struct tss_struct *t = &per_cpu(init_tss, cpu);
  71
  72         set_tss_desc(cpu, t);   /*
  73                                  * This just modifies memory; should not be
  74                                  * necessary. But... This is necessary, because
  75                                  * 386 hardware has concept of busy TSS or some
  76                                  * similar stupidity.
  77                                  */
  78
  79         load_TR_desc();                         /* This does ltr */
  80         load_LDT(&current->active_mm->context); /* This does lldt */
  81
  82         /*
  83          * Now maybe reload the debug registers
  84          */
  85         if (current->thread.debugreg7) {
  86                 set_debugreg(current->thread.debugreg0, 0);
  87                 set_debugreg(current->thread.debugreg1, 1);
  88                 set_debugreg(current->thread.debugreg2, 2);
  89                 set_debugreg(current->thread.debugreg3, 3);
  90                 /* no 4 and 5 */
  91                 set_debugreg(current->thread.debugreg6, 6);
  92                 set_debugreg(current->thread.debugreg7, 7);
  93         }
  94
  95 }
  96
  97 static void __restore_processor_state(struct saved_context *ctxt)
  98 {
  99         /*
 100          * control registers
 101          */
 102         /* cr4 was introduced in the Pentium CPU */
 103         if (ctxt->cr4)
 104                 write_cr4(ctxt->cr4);
 105         write_cr3(ctxt->cr3);
 106         write_cr2(ctxt->cr2);
 107         write_cr0(ctxt->cr0);
 108
 109         /*
 110          * now restore the descriptor tables to their proper values
 111          * ltr is done i fix_processor_context().
 112          */
 113         load_gdt(&ctxt->gdt);
 114         load_idt(&ctxt->idt);
 115
 116         /*
 117          * segment registers
 118          */
 119         loadsegment(es, ctxt->es);
 120         loadsegment(fs, ctxt->fs);
 121         loadsegment(gs, ctxt->gs);
 122         loadsegment(ss, ctxt->ss);
 123
 124         /*
 125          * sysenter MSRs
 126          */
 127         if (boot_cpu_has(X86_FEATURE_SEP))
 128                 enable_sep_cpu();
 129
 130         /*
 131          * restore XCR0 for xsave capable cpu's.
 132          */
 133         if (cpu_has_xsave)
 134                 xsetbv(XCR_XFEATURE_ENABLED_MASK, pcntxt_mask);
 135
 136         fix_processor_context();
 137         do_fpu_end();
 138         mtrr_ap_init();
 139         mcheck_init(&boot_cpu_data);
 140 }
 141
 142 /* Needed by apm.c */
 143 void restore_processor_state(void)
 144 {
 145         __restore_processor_state(&saved_context);
 146 }
 147 EXPORT_SYMBOL(restore_processor_state);