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x86, pageattr: introduce APIs to change pageattr of a page array
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1 /*
2  * Copyright 2002 Andi Kleen, SuSE Labs.
3  * Thanks to Ben LaHaise for precious feedback.
4  */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/mm.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/debugfs.h>
14
15 #include <asm/e820.h>
16 #include <asm/processor.h>
17 #include <asm/tlbflush.h>
18 #include <asm/sections.h>
19 #include <asm/uaccess.h>
20 #include <asm/pgalloc.h>
21 #include <asm/proto.h>
22 #include <asm/pat.h>
23
24 /*
25  * The current flushing context - we pass it instead of 5 arguments:
26  */
27 struct cpa_data {
28         unsigned long   *vaddr;
29         pgprot_t        mask_set;
30         pgprot_t        mask_clr;
31         int             numpages;
32         int             flags;
33         unsigned long   pfn;
34         unsigned        force_split : 1;
35         int             curpage;
36 };
37
38 #define CPA_FLUSHTLB 1
39 #define CPA_ARRAY 2
40
41 #ifdef CONFIG_PROC_FS
42 static unsigned long direct_pages_count[PG_LEVEL_NUM];
43
44 void update_page_count(int level, unsigned long pages)
45 {
46         unsigned long flags;
47
48         /* Protect against CPA */
49         spin_lock_irqsave(&pgd_lock, flags);
50         direct_pages_count[level] += pages;
51         spin_unlock_irqrestore(&pgd_lock, flags);
52 }
53
54 static void split_page_count(int level)
55 {
56         direct_pages_count[level]--;
57         direct_pages_count[level - 1] += PTRS_PER_PTE;
58 }
59
60 int arch_report_meminfo(char *page)
61 {
62         int n = sprintf(page, "DirectMap4k:  %8lu\n"
63                         "DirectMap2M:  %8lu\n",
64                         direct_pages_count[PG_LEVEL_4K],
65                         direct_pages_count[PG_LEVEL_2M]);
66 #ifdef CONFIG_X86_64
67         n += sprintf(page + n, "DirectMap1G:  %8lu\n",
68                      direct_pages_count[PG_LEVEL_1G]);
69 #endif
70         return n;
71 }
72 #else
73 static inline void split_page_count(int level) { }
74 #endif
75
76 #ifdef CONFIG_X86_64
77
78 static inline unsigned long highmap_start_pfn(void)
79 {
80         return __pa(_text) >> PAGE_SHIFT;
81 }
82
83 static inline unsigned long highmap_end_pfn(void)
84 {
85         return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT;
86 }
87
88 #endif
89
90 #ifdef CONFIG_DEBUG_PAGEALLOC
91 # define debug_pagealloc 1
92 #else
93 # define debug_pagealloc 0
94 #endif
95
96 static inline int
97 within(unsigned long addr, unsigned long start, unsigned long end)
98 {
99         return addr >= start && addr < end;
100 }
101
102 /*
103  * Flushing functions
104  */
105
106 /**
107  * clflush_cache_range - flush a cache range with clflush
108  * @addr:       virtual start address
109  * @size:       number of bytes to flush
110  *
111  * clflush is an unordered instruction which needs fencing with mfence
112  * to avoid ordering issues.
113  */
114 void clflush_cache_range(void *vaddr, unsigned int size)
115 {
116         void *vend = vaddr + size - 1;
117
118         mb();
119
120         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
121                 clflush(vaddr);
122         /*
123          * Flush any possible final partial cacheline:
124          */
125         clflush(vend);
126
127         mb();
128 }
129
130 static void __cpa_flush_all(void *arg)
131 {
132         unsigned long cache = (unsigned long)arg;
133
134         /*
135          * Flush all to work around Errata in early athlons regarding
136          * large page flushing.
137          */
138         __flush_tlb_all();
139
140         if (cache && boot_cpu_data.x86_model >= 4)
141                 wbinvd();
142 }
143
144 static void cpa_flush_all(unsigned long cache)
145 {
146         BUG_ON(irqs_disabled());
147
148         on_each_cpu(__cpa_flush_all, (void *) cache, 1);
149 }
150
151 static void __cpa_flush_range(void *arg)
152 {
153         /*
154          * We could optimize that further and do individual per page
155          * tlb invalidates for a low number of pages. Caveat: we must
156          * flush the high aliases on 64bit as well.
157          */
158         __flush_tlb_all();
159 }
160
161 static void cpa_flush_range(unsigned long start, int numpages, int cache)
162 {
163         unsigned int i, level;
164         unsigned long addr;
165
166         BUG_ON(irqs_disabled());
167         WARN_ON(PAGE_ALIGN(start) != start);
168
169         on_each_cpu(__cpa_flush_range, NULL, 1);
170
171         if (!cache)
172                 return;
173
174         /*
175          * We only need to flush on one CPU,
176          * clflush is a MESI-coherent instruction that
177          * will cause all other CPUs to flush the same
178          * cachelines:
179          */
180         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
181                 pte_t *pte = lookup_address(addr, &level);
182
183                 /*
184                  * Only flush present addresses:
185                  */
186                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
187                         clflush_cache_range((void *) addr, PAGE_SIZE);
188         }
189 }
190
191 static void cpa_flush_array(unsigned long *start, int numpages, int cache)
192 {
193         unsigned int i, level;
194         unsigned long *addr;
195
196         BUG_ON(irqs_disabled());
197
198         on_each_cpu(__cpa_flush_range, NULL, 1);
199
200         if (!cache)
201                 return;
202
203         /* 4M threshold */
204         if (numpages >= 1024) {
205                 if (boot_cpu_data.x86_model >= 4)
206                         wbinvd();
207                 return;
208         }
209         /*
210          * We only need to flush on one CPU,
211          * clflush is a MESI-coherent instruction that
212          * will cause all other CPUs to flush the same
213          * cachelines:
214          */
215         for (i = 0, addr = start; i < numpages; i++, addr++) {
216                 pte_t *pte = lookup_address(*addr, &level);
217
218                 /*
219                  * Only flush present addresses:
220                  */
221                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
222                         clflush_cache_range((void *) *addr, PAGE_SIZE);
223         }
224 }
225
226 /*
227  * Certain areas of memory on x86 require very specific protection flags,
228  * for example the BIOS area or kernel text. Callers don't always get this
229  * right (again, ioremap() on BIOS memory is not uncommon) so this function
230  * checks and fixes these known static required protection bits.
231  */
232 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
233                                    unsigned long pfn)
234 {
235         pgprot_t forbidden = __pgprot(0);
236
237         /*
238          * The BIOS area between 640k and 1Mb needs to be executable for
239          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
240          */
241         if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
242                 pgprot_val(forbidden) |= _PAGE_NX;
243
244         /*
245          * The kernel text needs to be executable for obvious reasons
246          * Does not cover __inittext since that is gone later on. On
247          * 64bit we do not enforce !NX on the low mapping
248          */
249         if (within(address, (unsigned long)_text, (unsigned long)_etext))
250                 pgprot_val(forbidden) |= _PAGE_NX;
251
252         /*
253          * The .rodata section needs to be read-only. Using the pfn
254          * catches all aliases.
255          */
256         if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
257                    __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
258                 pgprot_val(forbidden) |= _PAGE_RW;
259
260         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
261
262         return prot;
263 }
264
265 /*
266  * Lookup the page table entry for a virtual address. Return a pointer
267  * to the entry and the level of the mapping.
268  *
269  * Note: We return pud and pmd either when the entry is marked large
270  * or when the present bit is not set. Otherwise we would return a
271  * pointer to a nonexisting mapping.
272  */
273 pte_t *lookup_address(unsigned long address, unsigned int *level)
274 {
275         pgd_t *pgd = pgd_offset_k(address);
276         pud_t *pud;
277         pmd_t *pmd;
278
279         *level = PG_LEVEL_NONE;
280
281         if (pgd_none(*pgd))
282                 return NULL;
283
284         pud = pud_offset(pgd, address);
285         if (pud_none(*pud))
286                 return NULL;
287
288         *level = PG_LEVEL_1G;
289         if (pud_large(*pud) || !pud_present(*pud))
290                 return (pte_t *)pud;
291
292         pmd = pmd_offset(pud, address);
293         if (pmd_none(*pmd))
294                 return NULL;
295
296         *level = PG_LEVEL_2M;
297         if (pmd_large(*pmd) || !pmd_present(*pmd))
298                 return (pte_t *)pmd;
299
300         *level = PG_LEVEL_4K;
301
302         return pte_offset_kernel(pmd, address);
303 }
304 EXPORT_SYMBOL_GPL(lookup_address);
305
306 /*
307  * Set the new pmd in all the pgds we know about:
308  */
309 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
310 {
311         /* change init_mm */
312         set_pte_atomic(kpte, pte);
313 #ifdef CONFIG_X86_32
314         if (!SHARED_KERNEL_PMD) {
315                 struct page *page;
316
317                 list_for_each_entry(page, &pgd_list, lru) {
318                         pgd_t *pgd;
319                         pud_t *pud;
320                         pmd_t *pmd;
321
322                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
323                         pud = pud_offset(pgd, address);
324                         pmd = pmd_offset(pud, address);
325                         set_pte_atomic((pte_t *)pmd, pte);
326                 }
327         }
328 #endif
329 }
330
331 static int
332 try_preserve_large_page(pte_t *kpte, unsigned long address,
333                         struct cpa_data *cpa)
334 {
335         unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
336         pte_t new_pte, old_pte, *tmp;
337         pgprot_t old_prot, new_prot;
338         int i, do_split = 1;
339         unsigned int level;
340
341         if (cpa->force_split)
342                 return 1;
343
344         spin_lock_irqsave(&pgd_lock, flags);
345         /*
346          * Check for races, another CPU might have split this page
347          * up already:
348          */
349         tmp = lookup_address(address, &level);
350         if (tmp != kpte)
351                 goto out_unlock;
352
353         switch (level) {
354         case PG_LEVEL_2M:
355                 psize = PMD_PAGE_SIZE;
356                 pmask = PMD_PAGE_MASK;
357                 break;
358 #ifdef CONFIG_X86_64
359         case PG_LEVEL_1G:
360                 psize = PUD_PAGE_SIZE;
361                 pmask = PUD_PAGE_MASK;
362                 break;
363 #endif
364         default:
365                 do_split = -EINVAL;
366                 goto out_unlock;
367         }
368
369         /*
370          * Calculate the number of pages, which fit into this large
371          * page starting at address:
372          */
373         nextpage_addr = (address + psize) & pmask;
374         numpages = (nextpage_addr - address) >> PAGE_SHIFT;
375         if (numpages < cpa->numpages)
376                 cpa->numpages = numpages;
377
378         /*
379          * We are safe now. Check whether the new pgprot is the same:
380          */
381         old_pte = *kpte;
382         old_prot = new_prot = pte_pgprot(old_pte);
383
384         pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
385         pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
386
387         /*
388          * old_pte points to the large page base address. So we need
389          * to add the offset of the virtual address:
390          */
391         pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
392         cpa->pfn = pfn;
393
394         new_prot = static_protections(new_prot, address, pfn);
395
396         /*
397          * We need to check the full range, whether
398          * static_protection() requires a different pgprot for one of
399          * the pages in the range we try to preserve:
400          */
401         addr = address + PAGE_SIZE;
402         pfn++;
403         for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
404                 pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
405
406                 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
407                         goto out_unlock;
408         }
409
410         /*
411          * If there are no changes, return. maxpages has been updated
412          * above:
413          */
414         if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
415                 do_split = 0;
416                 goto out_unlock;
417         }
418
419         /*
420          * We need to change the attributes. Check, whether we can
421          * change the large page in one go. We request a split, when
422          * the address is not aligned and the number of pages is
423          * smaller than the number of pages in the large page. Note
424          * that we limited the number of possible pages already to
425          * the number of pages in the large page.
426          */
427         if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
428                 /*
429                  * The address is aligned and the number of pages
430                  * covers the full page.
431                  */
432                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
433                 __set_pmd_pte(kpte, address, new_pte);
434                 cpa->flags |= CPA_FLUSHTLB;
435                 do_split = 0;
436         }
437
438 out_unlock:
439         spin_unlock_irqrestore(&pgd_lock, flags);
440
441         return do_split;
442 }
443
444 static LIST_HEAD(page_pool);
445 static unsigned long pool_size, pool_pages, pool_low;
446 static unsigned long pool_used, pool_failed;
447
448 static void cpa_fill_pool(struct page **ret)
449 {
450         gfp_t gfp = GFP_KERNEL;
451         unsigned long flags;
452         struct page *p;
453
454         /*
455          * Avoid recursion (on debug-pagealloc) and also signal
456          * our priority to get to these pagetables:
457          */
458         if (current->flags & PF_MEMALLOC)
459                 return;
460         current->flags |= PF_MEMALLOC;
461
462         /*
463          * Allocate atomically from atomic contexts:
464          */
465         if (in_atomic() || irqs_disabled() || debug_pagealloc)
466                 gfp =  GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN;
467
468         while (pool_pages < pool_size || (ret && !*ret)) {
469                 p = alloc_pages(gfp, 0);
470                 if (!p) {
471                         pool_failed++;
472                         break;
473                 }
474                 /*
475                  * If the call site needs a page right now, provide it:
476                  */
477                 if (ret && !*ret) {
478                         *ret = p;
479                         continue;
480                 }
481                 spin_lock_irqsave(&pgd_lock, flags);
482                 list_add(&p->lru, &page_pool);
483                 pool_pages++;
484                 spin_unlock_irqrestore(&pgd_lock, flags);
485         }
486
487         current->flags &= ~PF_MEMALLOC;
488 }
489
490 #define SHIFT_MB                (20 - PAGE_SHIFT)
491 #define ROUND_MB_GB             ((1 << 10) - 1)
492 #define SHIFT_MB_GB             10
493 #define POOL_PAGES_PER_GB       16
494
495 void __init cpa_init(void)
496 {
497         struct sysinfo si;
498         unsigned long gb;
499
500         si_meminfo(&si);
501         /*
502          * Calculate the number of pool pages:
503          *
504          * Convert totalram (nr of pages) to MiB and round to the next
505          * GiB. Shift MiB to Gib and multiply the result by
506          * POOL_PAGES_PER_GB:
507          */
508         if (debug_pagealloc) {
509                 gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB;
510                 pool_size = POOL_PAGES_PER_GB * gb;
511         } else {
512                 pool_size = 1;
513         }
514         pool_low = pool_size;
515
516         cpa_fill_pool(NULL);
517         printk(KERN_DEBUG
518                "CPA: page pool initialized %lu of %lu pages preallocated\n",
519                pool_pages, pool_size);
520 }
521
522 static int split_large_page(pte_t *kpte, unsigned long address)
523 {
524         unsigned long flags, pfn, pfninc = 1;
525         unsigned int i, level;
526         pte_t *pbase, *tmp;
527         pgprot_t ref_prot;
528         struct page *base;
529
530         /*
531          * Get a page from the pool. The pool list is protected by the
532          * pgd_lock, which we have to take anyway for the split
533          * operation:
534          */
535         spin_lock_irqsave(&pgd_lock, flags);
536         if (list_empty(&page_pool)) {
537                 spin_unlock_irqrestore(&pgd_lock, flags);
538                 base = NULL;
539                 cpa_fill_pool(&base);
540                 if (!base)
541                         return -ENOMEM;
542                 spin_lock_irqsave(&pgd_lock, flags);
543         } else {
544                 base = list_first_entry(&page_pool, struct page, lru);
545                 list_del(&base->lru);
546                 pool_pages--;
547
548                 if (pool_pages < pool_low)
549                         pool_low = pool_pages;
550         }
551
552         /*
553          * Check for races, another CPU might have split this page
554          * up for us already:
555          */
556         tmp = lookup_address(address, &level);
557         if (tmp != kpte)
558                 goto out_unlock;
559
560         pbase = (pte_t *)page_address(base);
561         paravirt_alloc_pte(&init_mm, page_to_pfn(base));
562         ref_prot = pte_pgprot(pte_clrhuge(*kpte));
563
564 #ifdef CONFIG_X86_64
565         if (level == PG_LEVEL_1G) {
566                 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
567                 pgprot_val(ref_prot) |= _PAGE_PSE;
568         }
569 #endif
570
571         /*
572          * Get the target pfn from the original entry:
573          */
574         pfn = pte_pfn(*kpte);
575         for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
576                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
577
578         if (address >= (unsigned long)__va(0) &&
579                 address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
580                 split_page_count(level);
581
582 #ifdef CONFIG_X86_64
583         if (address >= (unsigned long)__va(1UL<<32) &&
584                 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
585                 split_page_count(level);
586 #endif
587
588         /*
589          * Install the new, split up pagetable. Important details here:
590          *
591          * On Intel the NX bit of all levels must be cleared to make a
592          * page executable. See section 4.13.2 of Intel 64 and IA-32
593          * Architectures Software Developer's Manual).
594          *
595          * Mark the entry present. The current mapping might be
596          * set to not present, which we preserved above.
597          */
598         ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
599         pgprot_val(ref_prot) |= _PAGE_PRESENT;
600         __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
601         base = NULL;
602
603 out_unlock:
604         /*
605          * If we dropped out via the lookup_address check under
606          * pgd_lock then stick the page back into the pool:
607          */
608         if (base) {
609                 list_add(&base->lru, &page_pool);
610                 pool_pages++;
611         } else
612                 pool_used++;
613         spin_unlock_irqrestore(&pgd_lock, flags);
614
615         return 0;
616 }
617
618 static int __change_page_attr(struct cpa_data *cpa, int primary)
619 {
620         unsigned long address;
621         int do_split, err;
622         unsigned int level;
623         pte_t *kpte, old_pte;
624
625         if (cpa->flags & CPA_ARRAY)
626                 address = cpa->vaddr[cpa->curpage];
627         else
628                 address = *cpa->vaddr;
629
630 repeat:
631         kpte = lookup_address(address, &level);
632         if (!kpte)
633                 return 0;
634
635         old_pte = *kpte;
636         if (!pte_val(old_pte)) {
637                 if (!primary)
638                         return 0;
639                 printk(KERN_WARNING "CPA: called for zero pte. "
640                        "vaddr = %lx cpa->vaddr = %lx\n", address,
641                 WARN_ON(1);
642                        *cpa->vaddr);
643                 return -EINVAL;
644         }
645
646         if (level == PG_LEVEL_4K) {
647                 pte_t new_pte;
648                 pgprot_t new_prot = pte_pgprot(old_pte);
649                 unsigned long pfn = pte_pfn(old_pte);
650
651                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
652                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
653
654                 new_prot = static_protections(new_prot, address, pfn);
655
656                 /*
657                  * We need to keep the pfn from the existing PTE,
658                  * after all we're only going to change it's attributes
659                  * not the memory it points to
660                  */
661                 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
662                 cpa->pfn = pfn;
663                 /*
664                  * Do we really change anything ?
665                  */
666                 if (pte_val(old_pte) != pte_val(new_pte)) {
667                         set_pte_atomic(kpte, new_pte);
668                         cpa->flags |= CPA_FLUSHTLB;
669                 }
670                 cpa->numpages = 1;
671                 return 0;
672         }
673
674         /*
675          * Check, whether we can keep the large page intact
676          * and just change the pte:
677          */
678         do_split = try_preserve_large_page(kpte, address, cpa);
679         /*
680          * When the range fits into the existing large page,
681          * return. cp->numpages and cpa->tlbflush have been updated in
682          * try_large_page:
683          */
684         if (do_split <= 0)
685                 return do_split;
686
687         /*
688          * We have to split the large page:
689          */
690         err = split_large_page(kpte, address);
691         if (!err) {
692                 cpa->flags |= CPA_FLUSHTLB;
693                 goto repeat;
694         }
695
696         return err;
697 }
698
699 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
700
701 static int cpa_process_alias(struct cpa_data *cpa)
702 {
703         struct cpa_data alias_cpa;
704         int ret = 0;
705         unsigned long temp_cpa_vaddr, vaddr;
706
707         if (cpa->pfn >= max_pfn_mapped)
708                 return 0;
709
710 #ifdef CONFIG_X86_64
711         if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
712                 return 0;
713 #endif
714         /*
715          * No need to redo, when the primary call touched the direct
716          * mapping already:
717          */
718         if (cpa->flags & CPA_ARRAY)
719                 vaddr = cpa->vaddr[cpa->curpage];
720         else
721                 vaddr = *cpa->vaddr;
722
723         if (!(within(vaddr, PAGE_OFFSET,
724                     PAGE_OFFSET + (max_low_pfn_mapped << PAGE_SHIFT))
725 #ifdef CONFIG_X86_64
726                 || within(vaddr, PAGE_OFFSET + (1UL<<32),
727                     PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))
728 #endif
729         )) {
730
731                 alias_cpa = *cpa;
732                 temp_cpa_vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
733                 alias_cpa.vaddr = &temp_cpa_vaddr;
734                 alias_cpa.flags &= ~CPA_ARRAY;
735
736
737                 ret = __change_page_attr_set_clr(&alias_cpa, 0);
738         }
739
740 #ifdef CONFIG_X86_64
741         if (ret)
742                 return ret;
743         /*
744          * No need to redo, when the primary call touched the high
745          * mapping already:
746          */
747         if (within(vaddr, (unsigned long) _text, (unsigned long) _end))
748                 return 0;
749
750         /*
751          * If the physical address is inside the kernel map, we need
752          * to touch the high mapped kernel as well:
753          */
754         if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
755                 return 0;
756
757         alias_cpa = *cpa;
758         temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
759         alias_cpa.vaddr = &temp_cpa_vaddr;
760         alias_cpa.flags &= ~CPA_ARRAY;
761
762         /*
763          * The high mapping range is imprecise, so ignore the return value.
764          */
765         __change_page_attr_set_clr(&alias_cpa, 0);
766 #endif
767         return ret;
768 }
769
770 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
771 {
772         int ret, numpages = cpa->numpages;
773
774         while (numpages) {
775                 /*
776                  * Store the remaining nr of pages for the large page
777                  * preservation check.
778                  */
779                 cpa->numpages = numpages;
780                 /* for array changes, we can't use large page */
781                 if (cpa->flags & CPA_ARRAY)
782                         cpa->numpages = 1;
783
784                 ret = __change_page_attr(cpa, checkalias);
785                 if (ret)
786                         return ret;
787
788                 if (checkalias) {
789                         ret = cpa_process_alias(cpa);
790                         if (ret)
791                                 return ret;
792                 }
793
794                 /*
795                  * Adjust the number of pages with the result of the
796                  * CPA operation. Either a large page has been
797                  * preserved or a single page update happened.
798                  */
799                 BUG_ON(cpa->numpages > numpages);
800                 numpages -= cpa->numpages;
801                 if (cpa->flags & CPA_ARRAY)
802                         cpa->curpage++;
803                 else
804                         *cpa->vaddr += cpa->numpages * PAGE_SIZE;
805
806         }
807         return 0;
808 }
809
810 static inline int cache_attr(pgprot_t attr)
811 {
812         return pgprot_val(attr) &
813                 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
814 }
815
816 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
817                                     pgprot_t mask_set, pgprot_t mask_clr,
818                                     int force_split, int array)
819 {
820         struct cpa_data cpa;
821         int ret, cache, checkalias;
822
823         /*
824          * Check, if we are requested to change a not supported
825          * feature:
826          */
827         mask_set = canon_pgprot(mask_set);
828         mask_clr = canon_pgprot(mask_clr);
829         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
830                 return 0;
831
832         /* Ensure we are PAGE_SIZE aligned */
833         if (!array) {
834                 if (*addr & ~PAGE_MASK) {
835                         *addr &= PAGE_MASK;
836                         /*
837                          * People should not be passing in unaligned addresses:
838                          */
839                         WARN_ON_ONCE(1);
840                 }
841         } else {
842                 int i;
843                 for (i = 0; i < numpages; i++) {
844                         if (addr[i] & ~PAGE_MASK) {
845                                 addr[i] &= PAGE_MASK;
846                                 WARN_ON_ONCE(1);
847                         }
848                 }
849         }
850
851         /* Must avoid aliasing mappings in the highmem code */
852         kmap_flush_unused();
853
854         cpa.vaddr = addr;
855         cpa.numpages = numpages;
856         cpa.mask_set = mask_set;
857         cpa.mask_clr = mask_clr;
858         cpa.flags = 0;
859         cpa.curpage = 0;
860         cpa.force_split = force_split;
861
862         if (array)
863                 cpa.flags |= CPA_ARRAY;
864
865         /* No alias checking for _NX bit modifications */
866         checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
867
868         ret = __change_page_attr_set_clr(&cpa, checkalias);
869
870         /*
871          * Check whether we really changed something:
872          */
873         if (!(cpa.flags & CPA_FLUSHTLB))
874                 goto out;
875
876         /*
877          * No need to flush, when we did not set any of the caching
878          * attributes:
879          */
880         cache = cache_attr(mask_set);
881
882         /*
883          * On success we use clflush, when the CPU supports it to
884          * avoid the wbindv. If the CPU does not support it and in the
885          * error case we fall back to cpa_flush_all (which uses
886          * wbindv):
887          */
888         if (!ret && cpu_has_clflush) {
889                 if (cpa.flags & CPA_ARRAY)
890                         cpa_flush_array(addr, numpages, cache);
891                 else
892                         cpa_flush_range(*addr, numpages, cache);
893         } else
894                 cpa_flush_all(cache);
895
896 out:
897         cpa_fill_pool(NULL);
898
899         return ret;
900 }
901
902 static inline int change_page_attr_set(unsigned long *addr, int numpages,
903                                        pgprot_t mask, int array)
904 {
905         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
906                 array);
907 }
908
909 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
910                                          pgprot_t mask, int array)
911 {
912         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
913                 array);
914 }
915
916 int _set_memory_uc(unsigned long addr, int numpages)
917 {
918         /*
919          * for now UC MINUS. see comments in ioremap_nocache()
920          */
921         return change_page_attr_set(&addr, numpages,
922                                     __pgprot(_PAGE_CACHE_UC_MINUS), 0);
923 }
924
925 int set_memory_uc(unsigned long addr, int numpages)
926 {
927         /*
928          * for now UC MINUS. see comments in ioremap_nocache()
929          */
930         if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
931                             _PAGE_CACHE_UC_MINUS, NULL))
932                 return -EINVAL;
933
934         return _set_memory_uc(addr, numpages);
935 }
936 EXPORT_SYMBOL(set_memory_uc);
937
938 int set_memory_array_uc(unsigned long *addr, int addrinarray)
939 {
940         int i;
941         /*
942          * for now UC MINUS. see comments in ioremap_nocache()
943          */
944         for (i = 0; i < addrinarray; i++) {
945                 if (reserve_memtype(addr[i], addr[i] + PAGE_SIZE,
946                             _PAGE_CACHE_UC_MINUS, NULL))
947                         goto out;
948         }
949
950         return change_page_attr_set(addr, addrinarray,
951                                     __pgprot(_PAGE_CACHE_UC_MINUS), 1);
952 out:
953         while (--i >= 0)
954                 free_memtype(addr[i], addr[i] + PAGE_SIZE);
955         return -EINVAL;
956 }
957 EXPORT_SYMBOL(set_memory_array_uc);
958
959 int _set_memory_wc(unsigned long addr, int numpages)
960 {
961         return change_page_attr_set(&addr, numpages,
962                                     __pgprot(_PAGE_CACHE_WC), 0);
963 }
964
965 int set_memory_wc(unsigned long addr, int numpages)
966 {
967         if (!pat_enabled)
968                 return set_memory_uc(addr, numpages);
969
970         if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
971                 _PAGE_CACHE_WC, NULL))
972                 return -EINVAL;
973
974         return _set_memory_wc(addr, numpages);
975 }
976 EXPORT_SYMBOL(set_memory_wc);
977
978 int _set_memory_wb(unsigned long addr, int numpages)
979 {
980         return change_page_attr_clear(&addr, numpages,
981                                       __pgprot(_PAGE_CACHE_MASK), 0);
982 }
983
984 int set_memory_wb(unsigned long addr, int numpages)
985 {
986         free_memtype(addr, addr + numpages * PAGE_SIZE);
987
988         return _set_memory_wb(addr, numpages);
989 }
990 EXPORT_SYMBOL(set_memory_wb);
991
992 int set_memory_array_wb(unsigned long *addr, int addrinarray)
993 {
994         int i;
995         for (i = 0; i < addrinarray; i++)
996                 free_memtype(addr[i], addr[i] + PAGE_SIZE);
997
998         return change_page_attr_clear(addr, addrinarray,
999                                       __pgprot(_PAGE_CACHE_MASK), 1);
1000 }
1001 EXPORT_SYMBOL(set_memory_array_wb);
1002
1003 int set_memory_x(unsigned long addr, int numpages)
1004 {
1005         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1006 }
1007 EXPORT_SYMBOL(set_memory_x);
1008
1009 int set_memory_nx(unsigned long addr, int numpages)
1010 {
1011         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1012 }
1013 EXPORT_SYMBOL(set_memory_nx);
1014
1015 int set_memory_ro(unsigned long addr, int numpages)
1016 {
1017         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1018 }
1019
1020 int set_memory_rw(unsigned long addr, int numpages)
1021 {
1022         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1023 }
1024
1025 int set_memory_np(unsigned long addr, int numpages)
1026 {
1027         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1028 }
1029
1030 int set_memory_4k(unsigned long addr, int numpages)
1031 {
1032         return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1033                                         __pgprot(0), 1, 0);
1034 }
1035
1036 int set_pages_uc(struct page *page, int numpages)
1037 {
1038         unsigned long addr = (unsigned long)page_address(page);
1039
1040         return set_memory_uc(addr, numpages);
1041 }
1042 EXPORT_SYMBOL(set_pages_uc);
1043
1044 int set_pages_wb(struct page *page, int numpages)
1045 {
1046         unsigned long addr = (unsigned long)page_address(page);
1047
1048         return set_memory_wb(addr, numpages);
1049 }
1050 EXPORT_SYMBOL(set_pages_wb);
1051
1052 int set_pages_x(struct page *page, int numpages)
1053 {
1054         unsigned long addr = (unsigned long)page_address(page);
1055
1056         return set_memory_x(addr, numpages);
1057 }
1058 EXPORT_SYMBOL(set_pages_x);
1059
1060 int set_pages_nx(struct page *page, int numpages)
1061 {
1062         unsigned long addr = (unsigned long)page_address(page);
1063
1064         return set_memory_nx(addr, numpages);
1065 }
1066 EXPORT_SYMBOL(set_pages_nx);
1067
1068 int set_pages_ro(struct page *page, int numpages)
1069 {
1070         unsigned long addr = (unsigned long)page_address(page);
1071
1072         return set_memory_ro(addr, numpages);
1073 }
1074
1075 int set_pages_rw(struct page *page, int numpages)
1076 {
1077         unsigned long addr = (unsigned long)page_address(page);
1078
1079         return set_memory_rw(addr, numpages);
1080 }
1081
1082 #ifdef CONFIG_DEBUG_PAGEALLOC
1083
1084 static int __set_pages_p(struct page *page, int numpages)
1085 {
1086         unsigned long tempaddr = (unsigned long) page_address(page);
1087         struct cpa_data cpa = { .vaddr = &tempaddr,
1088                                 .numpages = numpages,
1089                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1090                                 .mask_clr = __pgprot(0),
1091                                 .flags = 0};
1092
1093         return __change_page_attr_set_clr(&cpa, 1);
1094 }
1095
1096 static int __set_pages_np(struct page *page, int numpages)
1097 {
1098         unsigned long tempaddr = (unsigned long) page_address(page);
1099         struct cpa_data cpa = { .vaddr = &tempaddr,
1100                                 .numpages = numpages,
1101                                 .mask_set = __pgprot(0),
1102                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1103                                 .flags = 0};
1104
1105         return __change_page_attr_set_clr(&cpa, 1);
1106 }
1107
1108 void kernel_map_pages(struct page *page, int numpages, int enable)
1109 {
1110         if (PageHighMem(page))
1111                 return;
1112         if (!enable) {
1113                 debug_check_no_locks_freed(page_address(page),
1114                                            numpages * PAGE_SIZE);
1115         }
1116
1117         /*
1118          * If page allocator is not up yet then do not call c_p_a():
1119          */
1120         if (!debug_pagealloc_enabled)
1121                 return;
1122
1123         /*
1124          * The return value is ignored as the calls cannot fail.
1125          * Large pages are kept enabled at boot time, and are
1126          * split up quickly with DEBUG_PAGEALLOC. If a splitup
1127          * fails here (due to temporary memory shortage) no damage
1128          * is done because we just keep the largepage intact up
1129          * to the next attempt when it will likely be split up:
1130          */
1131         if (enable)
1132                 __set_pages_p(page, numpages);
1133         else
1134                 __set_pages_np(page, numpages);
1135
1136         /*
1137          * We should perform an IPI and flush all tlbs,
1138          * but that can deadlock->flush only current cpu:
1139          */
1140         __flush_tlb_all();
1141
1142         /*
1143          * Try to refill the page pool here. We can do this only after
1144          * the tlb flush.
1145          */
1146         cpa_fill_pool(NULL);
1147 }
1148
1149 #ifdef CONFIG_DEBUG_FS
1150 static int dpa_show(struct seq_file *m, void *v)
1151 {
1152         seq_puts(m, "DEBUG_PAGEALLOC\n");
1153         seq_printf(m, "pool_size     : %lu\n", pool_size);
1154         seq_printf(m, "pool_pages    : %lu\n", pool_pages);
1155         seq_printf(m, "pool_low      : %lu\n", pool_low);
1156         seq_printf(m, "pool_used     : %lu\n", pool_used);
1157         seq_printf(m, "pool_failed   : %lu\n", pool_failed);
1158
1159         return 0;
1160 }
1161
1162 static int dpa_open(struct inode *inode, struct file *filp)
1163 {
1164         return single_open(filp, dpa_show, NULL);
1165 }
1166
1167 static const struct file_operations dpa_fops = {
1168         .open           = dpa_open,
1169         .read           = seq_read,
1170         .llseek         = seq_lseek,
1171         .release        = single_release,
1172 };
1173
1174 static int __init debug_pagealloc_proc_init(void)
1175 {
1176         struct dentry *de;
1177
1178         de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL,
1179                                  &dpa_fops);
1180         if (!de)
1181                 return -ENOMEM;
1182
1183         return 0;
1184 }
1185 __initcall(debug_pagealloc_proc_init);
1186 #endif
1187
1188 #ifdef CONFIG_HIBERNATION
1189
1190 bool kernel_page_present(struct page *page)
1191 {
1192         unsigned int level;
1193         pte_t *pte;
1194
1195         if (PageHighMem(page))
1196                 return false;
1197
1198         pte = lookup_address((unsigned long)page_address(page), &level);
1199         return (pte_val(*pte) & _PAGE_PRESENT);
1200 }
1201
1202 #endif /* CONFIG_HIBERNATION */
1203
1204 #endif /* CONFIG_DEBUG_PAGEALLOC */
1205
1206 /*
1207  * The testcases use internal knowledge of the implementation that shouldn't
1208  * be exposed to the rest of the kernel. Include these directly here.
1209  */
1210 #ifdef CONFIG_CPA_DEBUG
1211 #include "pageattr-test.c"
1212 #endif