2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/debugfs.h>
16 #include <asm/processor.h>
17 #include <asm/tlbflush.h>
18 #include <asm/sections.h>
19 #include <asm/uaccess.h>
20 #include <asm/pgalloc.h>
21 #include <asm/proto.h>
25 * The current flushing context - we pass it instead of 5 arguments:
34 unsigned force_split : 1;
38 #define CPA_FLUSHTLB 1
42 static unsigned long direct_pages_count[PG_LEVEL_NUM];
44 void update_page_count(int level, unsigned long pages)
48 /* Protect against CPA */
49 spin_lock_irqsave(&pgd_lock, flags);
50 direct_pages_count[level] += pages;
51 spin_unlock_irqrestore(&pgd_lock, flags);
54 static void split_page_count(int level)
56 direct_pages_count[level]--;
57 direct_pages_count[level - 1] += PTRS_PER_PTE;
60 int arch_report_meminfo(char *page)
62 int n = sprintf(page, "DirectMap4k: %8lu\n"
63 "DirectMap2M: %8lu\n",
64 direct_pages_count[PG_LEVEL_4K],
65 direct_pages_count[PG_LEVEL_2M]);
67 n += sprintf(page + n, "DirectMap1G: %8lu\n",
68 direct_pages_count[PG_LEVEL_1G]);
73 static inline void split_page_count(int level) { }
78 static inline unsigned long highmap_start_pfn(void)
80 return __pa(_text) >> PAGE_SHIFT;
83 static inline unsigned long highmap_end_pfn(void)
85 return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT;
90 #ifdef CONFIG_DEBUG_PAGEALLOC
91 # define debug_pagealloc 1
93 # define debug_pagealloc 0
97 within(unsigned long addr, unsigned long start, unsigned long end)
99 return addr >= start && addr < end;
107 * clflush_cache_range - flush a cache range with clflush
108 * @addr: virtual start address
109 * @size: number of bytes to flush
111 * clflush is an unordered instruction which needs fencing with mfence
112 * to avoid ordering issues.
114 void clflush_cache_range(void *vaddr, unsigned int size)
116 void *vend = vaddr + size - 1;
120 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
123 * Flush any possible final partial cacheline:
130 static void __cpa_flush_all(void *arg)
132 unsigned long cache = (unsigned long)arg;
135 * Flush all to work around Errata in early athlons regarding
136 * large page flushing.
140 if (cache && boot_cpu_data.x86_model >= 4)
144 static void cpa_flush_all(unsigned long cache)
146 BUG_ON(irqs_disabled());
148 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
151 static void __cpa_flush_range(void *arg)
154 * We could optimize that further and do individual per page
155 * tlb invalidates for a low number of pages. Caveat: we must
156 * flush the high aliases on 64bit as well.
161 static void cpa_flush_range(unsigned long start, int numpages, int cache)
163 unsigned int i, level;
166 BUG_ON(irqs_disabled());
167 WARN_ON(PAGE_ALIGN(start) != start);
169 on_each_cpu(__cpa_flush_range, NULL, 1);
175 * We only need to flush on one CPU,
176 * clflush is a MESI-coherent instruction that
177 * will cause all other CPUs to flush the same
180 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
181 pte_t *pte = lookup_address(addr, &level);
184 * Only flush present addresses:
186 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
187 clflush_cache_range((void *) addr, PAGE_SIZE);
191 static void cpa_flush_array(unsigned long *start, int numpages, int cache)
193 unsigned int i, level;
196 BUG_ON(irqs_disabled());
198 on_each_cpu(__cpa_flush_range, NULL, 1);
204 if (numpages >= 1024) {
205 if (boot_cpu_data.x86_model >= 4)
210 * We only need to flush on one CPU,
211 * clflush is a MESI-coherent instruction that
212 * will cause all other CPUs to flush the same
215 for (i = 0, addr = start; i < numpages; i++, addr++) {
216 pte_t *pte = lookup_address(*addr, &level);
219 * Only flush present addresses:
221 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
222 clflush_cache_range((void *) *addr, PAGE_SIZE);
227 * Certain areas of memory on x86 require very specific protection flags,
228 * for example the BIOS area or kernel text. Callers don't always get this
229 * right (again, ioremap() on BIOS memory is not uncommon) so this function
230 * checks and fixes these known static required protection bits.
232 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
235 pgprot_t forbidden = __pgprot(0);
238 * The BIOS area between 640k and 1Mb needs to be executable for
239 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
241 if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
242 pgprot_val(forbidden) |= _PAGE_NX;
245 * The kernel text needs to be executable for obvious reasons
246 * Does not cover __inittext since that is gone later on. On
247 * 64bit we do not enforce !NX on the low mapping
249 if (within(address, (unsigned long)_text, (unsigned long)_etext))
250 pgprot_val(forbidden) |= _PAGE_NX;
253 * The .rodata section needs to be read-only. Using the pfn
254 * catches all aliases.
256 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
257 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
258 pgprot_val(forbidden) |= _PAGE_RW;
260 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
266 * Lookup the page table entry for a virtual address. Return a pointer
267 * to the entry and the level of the mapping.
269 * Note: We return pud and pmd either when the entry is marked large
270 * or when the present bit is not set. Otherwise we would return a
271 * pointer to a nonexisting mapping.
273 pte_t *lookup_address(unsigned long address, unsigned int *level)
275 pgd_t *pgd = pgd_offset_k(address);
279 *level = PG_LEVEL_NONE;
284 pud = pud_offset(pgd, address);
288 *level = PG_LEVEL_1G;
289 if (pud_large(*pud) || !pud_present(*pud))
292 pmd = pmd_offset(pud, address);
296 *level = PG_LEVEL_2M;
297 if (pmd_large(*pmd) || !pmd_present(*pmd))
300 *level = PG_LEVEL_4K;
302 return pte_offset_kernel(pmd, address);
304 EXPORT_SYMBOL_GPL(lookup_address);
307 * Set the new pmd in all the pgds we know about:
309 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
312 set_pte_atomic(kpte, pte);
314 if (!SHARED_KERNEL_PMD) {
317 list_for_each_entry(page, &pgd_list, lru) {
322 pgd = (pgd_t *)page_address(page) + pgd_index(address);
323 pud = pud_offset(pgd, address);
324 pmd = pmd_offset(pud, address);
325 set_pte_atomic((pte_t *)pmd, pte);
332 try_preserve_large_page(pte_t *kpte, unsigned long address,
333 struct cpa_data *cpa)
335 unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
336 pte_t new_pte, old_pte, *tmp;
337 pgprot_t old_prot, new_prot;
341 if (cpa->force_split)
344 spin_lock_irqsave(&pgd_lock, flags);
346 * Check for races, another CPU might have split this page
349 tmp = lookup_address(address, &level);
355 psize = PMD_PAGE_SIZE;
356 pmask = PMD_PAGE_MASK;
360 psize = PUD_PAGE_SIZE;
361 pmask = PUD_PAGE_MASK;
370 * Calculate the number of pages, which fit into this large
371 * page starting at address:
373 nextpage_addr = (address + psize) & pmask;
374 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
375 if (numpages < cpa->numpages)
376 cpa->numpages = numpages;
379 * We are safe now. Check whether the new pgprot is the same:
382 old_prot = new_prot = pte_pgprot(old_pte);
384 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
385 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
388 * old_pte points to the large page base address. So we need
389 * to add the offset of the virtual address:
391 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
394 new_prot = static_protections(new_prot, address, pfn);
397 * We need to check the full range, whether
398 * static_protection() requires a different pgprot for one of
399 * the pages in the range we try to preserve:
401 addr = address + PAGE_SIZE;
403 for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
404 pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
406 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
411 * If there are no changes, return. maxpages has been updated
414 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
420 * We need to change the attributes. Check, whether we can
421 * change the large page in one go. We request a split, when
422 * the address is not aligned and the number of pages is
423 * smaller than the number of pages in the large page. Note
424 * that we limited the number of possible pages already to
425 * the number of pages in the large page.
427 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
429 * The address is aligned and the number of pages
430 * covers the full page.
432 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
433 __set_pmd_pte(kpte, address, new_pte);
434 cpa->flags |= CPA_FLUSHTLB;
439 spin_unlock_irqrestore(&pgd_lock, flags);
444 static LIST_HEAD(page_pool);
445 static unsigned long pool_size, pool_pages, pool_low;
446 static unsigned long pool_used, pool_failed;
448 static void cpa_fill_pool(struct page **ret)
450 gfp_t gfp = GFP_KERNEL;
455 * Avoid recursion (on debug-pagealloc) and also signal
456 * our priority to get to these pagetables:
458 if (current->flags & PF_MEMALLOC)
460 current->flags |= PF_MEMALLOC;
463 * Allocate atomically from atomic contexts:
465 if (in_atomic() || irqs_disabled() || debug_pagealloc)
466 gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN;
468 while (pool_pages < pool_size || (ret && !*ret)) {
469 p = alloc_pages(gfp, 0);
475 * If the call site needs a page right now, provide it:
481 spin_lock_irqsave(&pgd_lock, flags);
482 list_add(&p->lru, &page_pool);
484 spin_unlock_irqrestore(&pgd_lock, flags);
487 current->flags &= ~PF_MEMALLOC;
490 #define SHIFT_MB (20 - PAGE_SHIFT)
491 #define ROUND_MB_GB ((1 << 10) - 1)
492 #define SHIFT_MB_GB 10
493 #define POOL_PAGES_PER_GB 16
495 void __init cpa_init(void)
502 * Calculate the number of pool pages:
504 * Convert totalram (nr of pages) to MiB and round to the next
505 * GiB. Shift MiB to Gib and multiply the result by
508 if (debug_pagealloc) {
509 gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB;
510 pool_size = POOL_PAGES_PER_GB * gb;
514 pool_low = pool_size;
518 "CPA: page pool initialized %lu of %lu pages preallocated\n",
519 pool_pages, pool_size);
522 static int split_large_page(pte_t *kpte, unsigned long address)
524 unsigned long flags, pfn, pfninc = 1;
525 unsigned int i, level;
531 * Get a page from the pool. The pool list is protected by the
532 * pgd_lock, which we have to take anyway for the split
535 spin_lock_irqsave(&pgd_lock, flags);
536 if (list_empty(&page_pool)) {
537 spin_unlock_irqrestore(&pgd_lock, flags);
539 cpa_fill_pool(&base);
542 spin_lock_irqsave(&pgd_lock, flags);
544 base = list_first_entry(&page_pool, struct page, lru);
545 list_del(&base->lru);
548 if (pool_pages < pool_low)
549 pool_low = pool_pages;
553 * Check for races, another CPU might have split this page
556 tmp = lookup_address(address, &level);
560 pbase = (pte_t *)page_address(base);
561 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
562 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
565 if (level == PG_LEVEL_1G) {
566 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
567 pgprot_val(ref_prot) |= _PAGE_PSE;
572 * Get the target pfn from the original entry:
574 pfn = pte_pfn(*kpte);
575 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
576 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
578 if (address >= (unsigned long)__va(0) &&
579 address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
580 split_page_count(level);
583 if (address >= (unsigned long)__va(1UL<<32) &&
584 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
585 split_page_count(level);
589 * Install the new, split up pagetable. Important details here:
591 * On Intel the NX bit of all levels must be cleared to make a
592 * page executable. See section 4.13.2 of Intel 64 and IA-32
593 * Architectures Software Developer's Manual).
595 * Mark the entry present. The current mapping might be
596 * set to not present, which we preserved above.
598 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
599 pgprot_val(ref_prot) |= _PAGE_PRESENT;
600 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
605 * If we dropped out via the lookup_address check under
606 * pgd_lock then stick the page back into the pool:
609 list_add(&base->lru, &page_pool);
613 spin_unlock_irqrestore(&pgd_lock, flags);
618 static int __change_page_attr(struct cpa_data *cpa, int primary)
620 unsigned long address;
623 pte_t *kpte, old_pte;
625 if (cpa->flags & CPA_ARRAY)
626 address = cpa->vaddr[cpa->curpage];
628 address = *cpa->vaddr;
631 kpte = lookup_address(address, &level);
636 if (!pte_val(old_pte)) {
639 printk(KERN_WARNING "CPA: called for zero pte. "
640 "vaddr = %lx cpa->vaddr = %lx\n", address,
646 if (level == PG_LEVEL_4K) {
648 pgprot_t new_prot = pte_pgprot(old_pte);
649 unsigned long pfn = pte_pfn(old_pte);
651 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
652 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
654 new_prot = static_protections(new_prot, address, pfn);
657 * We need to keep the pfn from the existing PTE,
658 * after all we're only going to change it's attributes
659 * not the memory it points to
661 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
664 * Do we really change anything ?
666 if (pte_val(old_pte) != pte_val(new_pte)) {
667 set_pte_atomic(kpte, new_pte);
668 cpa->flags |= CPA_FLUSHTLB;
675 * Check, whether we can keep the large page intact
676 * and just change the pte:
678 do_split = try_preserve_large_page(kpte, address, cpa);
680 * When the range fits into the existing large page,
681 * return. cp->numpages and cpa->tlbflush have been updated in
688 * We have to split the large page:
690 err = split_large_page(kpte, address);
692 cpa->flags |= CPA_FLUSHTLB;
699 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
701 static int cpa_process_alias(struct cpa_data *cpa)
703 struct cpa_data alias_cpa;
705 unsigned long temp_cpa_vaddr, vaddr;
707 if (cpa->pfn >= max_pfn_mapped)
711 if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
715 * No need to redo, when the primary call touched the direct
718 if (cpa->flags & CPA_ARRAY)
719 vaddr = cpa->vaddr[cpa->curpage];
723 if (!(within(vaddr, PAGE_OFFSET,
724 PAGE_OFFSET + (max_low_pfn_mapped << PAGE_SHIFT))
726 || within(vaddr, PAGE_OFFSET + (1UL<<32),
727 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))
732 temp_cpa_vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
733 alias_cpa.vaddr = &temp_cpa_vaddr;
734 alias_cpa.flags &= ~CPA_ARRAY;
737 ret = __change_page_attr_set_clr(&alias_cpa, 0);
744 * No need to redo, when the primary call touched the high
747 if (within(vaddr, (unsigned long) _text, (unsigned long) _end))
751 * If the physical address is inside the kernel map, we need
752 * to touch the high mapped kernel as well:
754 if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
758 temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
759 alias_cpa.vaddr = &temp_cpa_vaddr;
760 alias_cpa.flags &= ~CPA_ARRAY;
763 * The high mapping range is imprecise, so ignore the return value.
765 __change_page_attr_set_clr(&alias_cpa, 0);
770 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
772 int ret, numpages = cpa->numpages;
776 * Store the remaining nr of pages for the large page
777 * preservation check.
779 cpa->numpages = numpages;
780 /* for array changes, we can't use large page */
781 if (cpa->flags & CPA_ARRAY)
784 ret = __change_page_attr(cpa, checkalias);
789 ret = cpa_process_alias(cpa);
795 * Adjust the number of pages with the result of the
796 * CPA operation. Either a large page has been
797 * preserved or a single page update happened.
799 BUG_ON(cpa->numpages > numpages);
800 numpages -= cpa->numpages;
801 if (cpa->flags & CPA_ARRAY)
804 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
810 static inline int cache_attr(pgprot_t attr)
812 return pgprot_val(attr) &
813 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
816 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
817 pgprot_t mask_set, pgprot_t mask_clr,
818 int force_split, int array)
821 int ret, cache, checkalias;
824 * Check, if we are requested to change a not supported
827 mask_set = canon_pgprot(mask_set);
828 mask_clr = canon_pgprot(mask_clr);
829 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
832 /* Ensure we are PAGE_SIZE aligned */
834 if (*addr & ~PAGE_MASK) {
837 * People should not be passing in unaligned addresses:
843 for (i = 0; i < numpages; i++) {
844 if (addr[i] & ~PAGE_MASK) {
845 addr[i] &= PAGE_MASK;
851 /* Must avoid aliasing mappings in the highmem code */
855 cpa.numpages = numpages;
856 cpa.mask_set = mask_set;
857 cpa.mask_clr = mask_clr;
860 cpa.force_split = force_split;
863 cpa.flags |= CPA_ARRAY;
865 /* No alias checking for _NX bit modifications */
866 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
868 ret = __change_page_attr_set_clr(&cpa, checkalias);
871 * Check whether we really changed something:
873 if (!(cpa.flags & CPA_FLUSHTLB))
877 * No need to flush, when we did not set any of the caching
880 cache = cache_attr(mask_set);
883 * On success we use clflush, when the CPU supports it to
884 * avoid the wbindv. If the CPU does not support it and in the
885 * error case we fall back to cpa_flush_all (which uses
888 if (!ret && cpu_has_clflush) {
889 if (cpa.flags & CPA_ARRAY)
890 cpa_flush_array(addr, numpages, cache);
892 cpa_flush_range(*addr, numpages, cache);
894 cpa_flush_all(cache);
902 static inline int change_page_attr_set(unsigned long *addr, int numpages,
903 pgprot_t mask, int array)
905 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
909 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
910 pgprot_t mask, int array)
912 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
916 int _set_memory_uc(unsigned long addr, int numpages)
919 * for now UC MINUS. see comments in ioremap_nocache()
921 return change_page_attr_set(&addr, numpages,
922 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
925 int set_memory_uc(unsigned long addr, int numpages)
928 * for now UC MINUS. see comments in ioremap_nocache()
930 if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
931 _PAGE_CACHE_UC_MINUS, NULL))
934 return _set_memory_uc(addr, numpages);
936 EXPORT_SYMBOL(set_memory_uc);
938 int set_memory_array_uc(unsigned long *addr, int addrinarray)
942 * for now UC MINUS. see comments in ioremap_nocache()
944 for (i = 0; i < addrinarray; i++) {
945 if (reserve_memtype(addr[i], addr[i] + PAGE_SIZE,
946 _PAGE_CACHE_UC_MINUS, NULL))
950 return change_page_attr_set(addr, addrinarray,
951 __pgprot(_PAGE_CACHE_UC_MINUS), 1);
954 free_memtype(addr[i], addr[i] + PAGE_SIZE);
957 EXPORT_SYMBOL(set_memory_array_uc);
959 int _set_memory_wc(unsigned long addr, int numpages)
961 return change_page_attr_set(&addr, numpages,
962 __pgprot(_PAGE_CACHE_WC), 0);
965 int set_memory_wc(unsigned long addr, int numpages)
968 return set_memory_uc(addr, numpages);
970 if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
971 _PAGE_CACHE_WC, NULL))
974 return _set_memory_wc(addr, numpages);
976 EXPORT_SYMBOL(set_memory_wc);
978 int _set_memory_wb(unsigned long addr, int numpages)
980 return change_page_attr_clear(&addr, numpages,
981 __pgprot(_PAGE_CACHE_MASK), 0);
984 int set_memory_wb(unsigned long addr, int numpages)
986 free_memtype(addr, addr + numpages * PAGE_SIZE);
988 return _set_memory_wb(addr, numpages);
990 EXPORT_SYMBOL(set_memory_wb);
992 int set_memory_array_wb(unsigned long *addr, int addrinarray)
995 for (i = 0; i < addrinarray; i++)
996 free_memtype(addr[i], addr[i] + PAGE_SIZE);
998 return change_page_attr_clear(addr, addrinarray,
999 __pgprot(_PAGE_CACHE_MASK), 1);
1001 EXPORT_SYMBOL(set_memory_array_wb);
1003 int set_memory_x(unsigned long addr, int numpages)
1005 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1007 EXPORT_SYMBOL(set_memory_x);
1009 int set_memory_nx(unsigned long addr, int numpages)
1011 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1013 EXPORT_SYMBOL(set_memory_nx);
1015 int set_memory_ro(unsigned long addr, int numpages)
1017 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1020 int set_memory_rw(unsigned long addr, int numpages)
1022 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1025 int set_memory_np(unsigned long addr, int numpages)
1027 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1030 int set_memory_4k(unsigned long addr, int numpages)
1032 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1036 int set_pages_uc(struct page *page, int numpages)
1038 unsigned long addr = (unsigned long)page_address(page);
1040 return set_memory_uc(addr, numpages);
1042 EXPORT_SYMBOL(set_pages_uc);
1044 int set_pages_wb(struct page *page, int numpages)
1046 unsigned long addr = (unsigned long)page_address(page);
1048 return set_memory_wb(addr, numpages);
1050 EXPORT_SYMBOL(set_pages_wb);
1052 int set_pages_x(struct page *page, int numpages)
1054 unsigned long addr = (unsigned long)page_address(page);
1056 return set_memory_x(addr, numpages);
1058 EXPORT_SYMBOL(set_pages_x);
1060 int set_pages_nx(struct page *page, int numpages)
1062 unsigned long addr = (unsigned long)page_address(page);
1064 return set_memory_nx(addr, numpages);
1066 EXPORT_SYMBOL(set_pages_nx);
1068 int set_pages_ro(struct page *page, int numpages)
1070 unsigned long addr = (unsigned long)page_address(page);
1072 return set_memory_ro(addr, numpages);
1075 int set_pages_rw(struct page *page, int numpages)
1077 unsigned long addr = (unsigned long)page_address(page);
1079 return set_memory_rw(addr, numpages);
1082 #ifdef CONFIG_DEBUG_PAGEALLOC
1084 static int __set_pages_p(struct page *page, int numpages)
1086 unsigned long tempaddr = (unsigned long) page_address(page);
1087 struct cpa_data cpa = { .vaddr = &tempaddr,
1088 .numpages = numpages,
1089 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1090 .mask_clr = __pgprot(0),
1093 return __change_page_attr_set_clr(&cpa, 1);
1096 static int __set_pages_np(struct page *page, int numpages)
1098 unsigned long tempaddr = (unsigned long) page_address(page);
1099 struct cpa_data cpa = { .vaddr = &tempaddr,
1100 .numpages = numpages,
1101 .mask_set = __pgprot(0),
1102 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1105 return __change_page_attr_set_clr(&cpa, 1);
1108 void kernel_map_pages(struct page *page, int numpages, int enable)
1110 if (PageHighMem(page))
1113 debug_check_no_locks_freed(page_address(page),
1114 numpages * PAGE_SIZE);
1118 * If page allocator is not up yet then do not call c_p_a():
1120 if (!debug_pagealloc_enabled)
1124 * The return value is ignored as the calls cannot fail.
1125 * Large pages are kept enabled at boot time, and are
1126 * split up quickly with DEBUG_PAGEALLOC. If a splitup
1127 * fails here (due to temporary memory shortage) no damage
1128 * is done because we just keep the largepage intact up
1129 * to the next attempt when it will likely be split up:
1132 __set_pages_p(page, numpages);
1134 __set_pages_np(page, numpages);
1137 * We should perform an IPI and flush all tlbs,
1138 * but that can deadlock->flush only current cpu:
1143 * Try to refill the page pool here. We can do this only after
1146 cpa_fill_pool(NULL);
1149 #ifdef CONFIG_DEBUG_FS
1150 static int dpa_show(struct seq_file *m, void *v)
1152 seq_puts(m, "DEBUG_PAGEALLOC\n");
1153 seq_printf(m, "pool_size : %lu\n", pool_size);
1154 seq_printf(m, "pool_pages : %lu\n", pool_pages);
1155 seq_printf(m, "pool_low : %lu\n", pool_low);
1156 seq_printf(m, "pool_used : %lu\n", pool_used);
1157 seq_printf(m, "pool_failed : %lu\n", pool_failed);
1162 static int dpa_open(struct inode *inode, struct file *filp)
1164 return single_open(filp, dpa_show, NULL);
1167 static const struct file_operations dpa_fops = {
1170 .llseek = seq_lseek,
1171 .release = single_release,
1174 static int __init debug_pagealloc_proc_init(void)
1178 de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL,
1185 __initcall(debug_pagealloc_proc_init);
1188 #ifdef CONFIG_HIBERNATION
1190 bool kernel_page_present(struct page *page)
1195 if (PageHighMem(page))
1198 pte = lookup_address((unsigned long)page_address(page), &level);
1199 return (pte_val(*pte) & _PAGE_PRESENT);
1202 #endif /* CONFIG_HIBERNATION */
1204 #endif /* CONFIG_DEBUG_PAGEALLOC */
1207 * The testcases use internal knowledge of the implementation that shouldn't
1208 * be exposed to the rest of the kernel. Include these directly here.
1210 #ifdef CONFIG_CPA_DEBUG
1211 #include "pageattr-test.c"