2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
20 * The current flushing context - we pass it instead of 5 arguments:
36 within(unsigned long addr, unsigned long start, unsigned long end)
38 return addr >= start && addr < end;
46 * clflush_cache_range - flush a cache range with clflush
47 * @addr: virtual start address
48 * @size: number of bytes to flush
50 * clflush is an unordered instruction which needs fencing with mfence
51 * to avoid ordering issues.
53 void clflush_cache_range(void *vaddr, unsigned int size)
55 void *vend = vaddr + size - 1;
59 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
62 * Flush any possible final partial cacheline:
69 static void __cpa_flush_all(void *arg)
71 unsigned long cache = (unsigned long)arg;
74 * Flush all to work around Errata in early athlons regarding
75 * large page flushing.
79 if (cache && boot_cpu_data.x86_model >= 4)
83 static void cpa_flush_all(unsigned long cache)
85 BUG_ON(irqs_disabled());
87 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
90 static void __cpa_flush_range(void *arg)
93 * We could optimize that further and do individual per page
94 * tlb invalidates for a low number of pages. Caveat: we must
95 * flush the high aliases on 64bit as well.
100 static void cpa_flush_range(unsigned long start, int numpages, int cache)
102 unsigned int i, level;
105 BUG_ON(irqs_disabled());
106 WARN_ON(PAGE_ALIGN(start) != start);
108 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
114 * We only need to flush on one CPU,
115 * clflush is a MESI-coherent instruction that
116 * will cause all other CPUs to flush the same
119 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
120 pte_t *pte = lookup_address(addr, &level);
123 * Only flush present addresses:
125 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
126 clflush_cache_range((void *) addr, PAGE_SIZE);
130 #define HIGH_MAP_START __START_KERNEL_map
131 #define HIGH_MAP_END (__START_KERNEL_map + KERNEL_TEXT_SIZE)
135 * Converts a virtual address to a X86-64 highmap address
137 static unsigned long virt_to_highmap(void *address)
140 return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
142 return (unsigned long)address;
147 * Certain areas of memory on x86 require very specific protection flags,
148 * for example the BIOS area or kernel text. Callers don't always get this
149 * right (again, ioremap() on BIOS memory is not uncommon) so this function
150 * checks and fixes these known static required protection bits.
152 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
154 pgprot_t forbidden = __pgprot(0);
157 * The BIOS area between 640k and 1Mb needs to be executable for
158 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
160 if (within(__pa(address), BIOS_BEGIN, BIOS_END))
161 pgprot_val(forbidden) |= _PAGE_NX;
164 * The kernel text needs to be executable for obvious reasons
165 * Does not cover __inittext since that is gone later on
167 if (within(address, (unsigned long)_text, (unsigned long)_etext))
168 pgprot_val(forbidden) |= _PAGE_NX;
170 * Do the same for the x86-64 high kernel mapping
172 if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
173 pgprot_val(forbidden) |= _PAGE_NX;
176 #ifdef CONFIG_DEBUG_RODATA
177 /* The .rodata section needs to be read-only */
178 if (within(address, (unsigned long)__start_rodata,
179 (unsigned long)__end_rodata))
180 pgprot_val(forbidden) |= _PAGE_RW;
182 * Do the same for the x86-64 high kernel mapping
184 if (within(address, virt_to_highmap(__start_rodata),
185 virt_to_highmap(__end_rodata)))
186 pgprot_val(forbidden) |= _PAGE_RW;
189 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
195 * Lookup the page table entry for a virtual address. Return a pointer
196 * to the entry and the level of the mapping.
198 * Note: We return pud and pmd either when the entry is marked large
199 * or when the present bit is not set. Otherwise we would return a
200 * pointer to a nonexisting mapping.
202 pte_t *lookup_address(unsigned long address, int *level)
204 pgd_t *pgd = pgd_offset_k(address);
208 *level = PG_LEVEL_NONE;
213 pud = pud_offset(pgd, address);
217 *level = PG_LEVEL_1G;
218 if (pud_large(*pud) || !pud_present(*pud))
221 pmd = pmd_offset(pud, address);
225 *level = PG_LEVEL_2M;
226 if (pmd_large(*pmd) || !pmd_present(*pmd))
229 *level = PG_LEVEL_4K;
231 return pte_offset_kernel(pmd, address);
235 * Set the new pmd in all the pgds we know about:
237 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
240 set_pte_atomic(kpte, pte);
242 if (!SHARED_KERNEL_PMD) {
245 list_for_each_entry(page, &pgd_list, lru) {
250 pgd = (pgd_t *)page_address(page) + pgd_index(address);
251 pud = pud_offset(pgd, address);
252 pmd = pmd_offset(pud, address);
253 set_pte_atomic((pte_t *)pmd, pte);
260 try_preserve_large_page(pte_t *kpte, unsigned long address,
261 struct cpa_data *cpa)
263 unsigned long nextpage_addr, numpages, pmask, psize, flags;
264 pte_t new_pte, old_pte, *tmp;
265 pgprot_t old_prot, new_prot;
266 int level, res = CPA_SPLIT;
269 * An Athlon 64 X2 showed hard hangs if we tried to preserve
270 * largepages and changed the PSE entry from RW to RO.
272 * As AMD CPUs have a long series of erratas in this area,
273 * (and none of the known ones seem to explain this hang),
274 * disable this code until the hang can be debugged:
276 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
279 spin_lock_irqsave(&pgd_lock, flags);
281 * Check for races, another CPU might have split this page
284 tmp = lookup_address(address, &level);
290 psize = PMD_PAGE_SIZE;
291 pmask = PMD_PAGE_MASK;
295 psize = PMD_PAGE_SIZE;
296 pmask = PMD_PAGE_MASK;
305 * Calculate the number of pages, which fit into this large
306 * page starting at address:
308 nextpage_addr = (address + psize) & pmask;
309 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
310 if (numpages < cpa->numpages)
311 cpa->numpages = numpages;
314 * We are safe now. Check whether the new pgprot is the same:
317 old_prot = new_prot = pte_pgprot(old_pte);
319 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
320 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
321 new_prot = static_protections(new_prot, address);
324 * If there are no changes, return. maxpages has been updated
327 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
333 * We need to change the attributes. Check, whether we can
334 * change the large page in one go. We request a split, when
335 * the address is not aligned and the number of pages is
336 * smaller than the number of pages in the large page. Note
337 * that we limited the number of possible pages already to
338 * the number of pages in the large page.
340 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
342 * The address is aligned and the number of pages
343 * covers the full page.
345 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
346 __set_pmd_pte(kpte, address, new_pte);
352 spin_unlock_irqrestore(&pgd_lock, flags);
357 static int split_large_page(pte_t *kpte, unsigned long address)
359 unsigned long flags, addr, pfn, pfninc = 1;
360 gfp_t gfp_flags = GFP_KERNEL;
361 unsigned int i, level;
366 #ifdef CONFIG_DEBUG_PAGEALLOC
367 gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
369 base = alloc_pages(gfp_flags, 0);
373 spin_lock_irqsave(&pgd_lock, flags);
375 * Check for races, another CPU might have split this page
378 tmp = lookup_address(address, &level);
382 address = __pa(address);
383 addr = address & PMD_PAGE_MASK;
384 pbase = (pte_t *)page_address(base);
386 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
388 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
391 if (level == PG_LEVEL_1G) {
392 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
393 pgprot_val(ref_prot) |= _PAGE_PSE;
394 addr &= PUD_PAGE_MASK;
399 * Get the target pfn from the original entry:
401 pfn = pte_pfn(*kpte);
402 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
403 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
406 * Install the new, split up pagetable. Important details here:
408 * On Intel the NX bit of all levels must be cleared to make a
409 * page executable. See section 4.13.2 of Intel 64 and IA-32
410 * Architectures Software Developer's Manual).
412 * Mark the entry present. The current mapping might be
413 * set to not present, which we preserved above.
415 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
416 pgprot_val(ref_prot) |= _PAGE_PRESENT;
417 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
421 spin_unlock_irqrestore(&pgd_lock, flags);
424 __free_pages(base, 0);
429 static int __change_page_attr(unsigned long address, struct cpa_data *cpa)
431 struct page *kpte_page;
436 kpte = lookup_address(address, &level);
440 kpte_page = virt_to_page(kpte);
441 BUG_ON(PageLRU(kpte_page));
442 BUG_ON(PageCompound(kpte_page));
444 if (level == PG_LEVEL_4K) {
445 pte_t new_pte, old_pte = *kpte;
446 pgprot_t new_prot = pte_pgprot(old_pte);
448 if(!pte_val(old_pte)) {
449 printk(KERN_WARNING "CPA: called for zero pte. "
450 "vaddr = %lx cpa->vaddr = %lx\n", address,
456 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
457 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
459 new_prot = static_protections(new_prot, address);
462 * We need to keep the pfn from the existing PTE,
463 * after all we're only going to change it's attributes
464 * not the memory it points to
466 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
469 * Do we really change anything ?
471 if (pte_val(old_pte) != pte_val(new_pte)) {
472 set_pte_atomic(kpte, new_pte);
480 * Check, whether we can keep the large page intact
481 * and just change the pte:
483 res = try_preserve_large_page(kpte, address, cpa);
488 * When the range fits into the existing large page,
489 * return. cp->numpages and cpa->tlbflush have been updated in
492 if (res == CPA_NO_SPLIT)
496 * We have to split the large page:
498 res = split_large_page(kpte, address);
506 * change_page_attr_addr - Change page table attributes in linear mapping
507 * @address: Virtual address in linear mapping.
508 * @prot: New page table attribute (PAGE_*)
510 * Change page attributes of a page in the direct mapping. This is a variant
511 * of change_page_attr() that also works on memory holes that do not have
512 * mem_map entry (pfn_valid() is false).
514 * See change_page_attr() documentation for more details.
516 * Modules and drivers should use the set_memory_* APIs instead.
518 static int change_page_attr_addr(struct cpa_data *cpa)
521 unsigned long address = cpa->vaddr;
524 unsigned long phys_addr = __pa(address);
527 * If we are inside the high mapped kernel range, then we
528 * fixup the low mapping first. __va() returns the virtual
529 * address in the linear mapping:
531 if (within(address, HIGH_MAP_START, HIGH_MAP_END))
532 address = (unsigned long) __va(phys_addr);
535 err = __change_page_attr(address, cpa);
541 * If the physical address is inside the kernel map, we need
542 * to touch the high mapped kernel as well:
544 if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
546 * Calc the high mapping address. See __phys_addr()
547 * for the non obvious details.
549 * Note that NX and other required permissions are
550 * checked in static_protections().
552 address = phys_addr + HIGH_MAP_START - phys_base;
555 * Our high aliases are imprecise, because we check
556 * everything between 0 and KERNEL_TEXT_SIZE, so do
557 * not propagate lookup failures back to users:
559 __change_page_attr(address, cpa);
565 static int __change_page_attr_set_clr(struct cpa_data *cpa)
567 int ret, numpages = cpa->numpages;
571 * Store the remaining nr of pages for the large page
572 * preservation check.
574 cpa->numpages = numpages;
575 ret = change_page_attr_addr(cpa);
580 * Adjust the number of pages with the result of the
581 * CPA operation. Either a large page has been
582 * preserved or a single page update happened.
584 BUG_ON(cpa->numpages > numpages);
585 numpages -= cpa->numpages;
586 cpa->vaddr += cpa->numpages * PAGE_SIZE;
591 static inline int cache_attr(pgprot_t attr)
593 return pgprot_val(attr) &
594 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
597 static int change_page_attr_set_clr(unsigned long addr, int numpages,
598 pgprot_t mask_set, pgprot_t mask_clr)
604 * Check, if we are requested to change a not supported
607 mask_set = canon_pgprot(mask_set);
608 mask_clr = canon_pgprot(mask_clr);
609 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
613 cpa.numpages = numpages;
614 cpa.mask_set = mask_set;
615 cpa.mask_clr = mask_clr;
618 ret = __change_page_attr_set_clr(&cpa);
621 * Check whether we really changed something:
627 * No need to flush, when we did not set any of the caching
630 cache = cache_attr(mask_set);
633 * On success we use clflush, when the CPU supports it to
634 * avoid the wbindv. If the CPU does not support it and in the
635 * error case we fall back to cpa_flush_all (which uses
638 if (!ret && cpu_has_clflush)
639 cpa_flush_range(addr, numpages, cache);
641 cpa_flush_all(cache);
646 static inline int change_page_attr_set(unsigned long addr, int numpages,
649 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
652 static inline int change_page_attr_clear(unsigned long addr, int numpages,
655 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
658 int set_memory_uc(unsigned long addr, int numpages)
660 return change_page_attr_set(addr, numpages,
661 __pgprot(_PAGE_PCD | _PAGE_PWT));
663 EXPORT_SYMBOL(set_memory_uc);
665 int set_memory_wb(unsigned long addr, int numpages)
667 return change_page_attr_clear(addr, numpages,
668 __pgprot(_PAGE_PCD | _PAGE_PWT));
670 EXPORT_SYMBOL(set_memory_wb);
672 int set_memory_x(unsigned long addr, int numpages)
674 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
676 EXPORT_SYMBOL(set_memory_x);
678 int set_memory_nx(unsigned long addr, int numpages)
680 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
682 EXPORT_SYMBOL(set_memory_nx);
684 int set_memory_ro(unsigned long addr, int numpages)
686 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
689 int set_memory_rw(unsigned long addr, int numpages)
691 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
694 int set_memory_np(unsigned long addr, int numpages)
696 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
699 int set_pages_uc(struct page *page, int numpages)
701 unsigned long addr = (unsigned long)page_address(page);
703 return set_memory_uc(addr, numpages);
705 EXPORT_SYMBOL(set_pages_uc);
707 int set_pages_wb(struct page *page, int numpages)
709 unsigned long addr = (unsigned long)page_address(page);
711 return set_memory_wb(addr, numpages);
713 EXPORT_SYMBOL(set_pages_wb);
715 int set_pages_x(struct page *page, int numpages)
717 unsigned long addr = (unsigned long)page_address(page);
719 return set_memory_x(addr, numpages);
721 EXPORT_SYMBOL(set_pages_x);
723 int set_pages_nx(struct page *page, int numpages)
725 unsigned long addr = (unsigned long)page_address(page);
727 return set_memory_nx(addr, numpages);
729 EXPORT_SYMBOL(set_pages_nx);
731 int set_pages_ro(struct page *page, int numpages)
733 unsigned long addr = (unsigned long)page_address(page);
735 return set_memory_ro(addr, numpages);
738 int set_pages_rw(struct page *page, int numpages)
740 unsigned long addr = (unsigned long)page_address(page);
742 return set_memory_rw(addr, numpages);
745 #ifdef CONFIG_DEBUG_PAGEALLOC
747 static int __set_pages_p(struct page *page, int numpages)
749 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
750 .numpages = numpages,
751 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
752 .mask_clr = __pgprot(0)};
754 return __change_page_attr_set_clr(&cpa);
757 static int __set_pages_np(struct page *page, int numpages)
759 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
760 .numpages = numpages,
761 .mask_set = __pgprot(0),
762 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
764 return __change_page_attr_set_clr(&cpa);
767 void kernel_map_pages(struct page *page, int numpages, int enable)
769 if (PageHighMem(page))
772 debug_check_no_locks_freed(page_address(page),
773 numpages * PAGE_SIZE);
777 * If page allocator is not up yet then do not call c_p_a():
779 if (!debug_pagealloc_enabled)
783 * The return value is ignored - the calls cannot fail,
784 * large pages are disabled at boot time:
787 __set_pages_p(page, numpages);
789 __set_pages_np(page, numpages);
792 * We should perform an IPI and flush all tlbs,
793 * but that can deadlock->flush only current cpu:
800 * The testcases use internal knowledge of the implementation that shouldn't
801 * be exposed to the rest of the kernel. Include these directly here.
803 #ifdef CONFIG_CPA_DEBUG
804 #include "pageattr-test.c"