2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
11 #include <linux/interrupt.h>
14 #include <asm/processor.h>
15 #include <asm/tlbflush.h>
16 #include <asm/sections.h>
17 #include <asm/uaccess.h>
18 #include <asm/pgalloc.h>
21 * The current flushing context - we pass it instead of 5 arguments:
32 within(unsigned long addr, unsigned long start, unsigned long end)
34 return addr >= start && addr < end;
42 * clflush_cache_range - flush a cache range with clflush
43 * @addr: virtual start address
44 * @size: number of bytes to flush
46 * clflush is an unordered instruction which needs fencing with mfence
47 * to avoid ordering issues.
49 void clflush_cache_range(void *vaddr, unsigned int size)
51 void *vend = vaddr + size - 1;
55 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
58 * Flush any possible final partial cacheline:
65 static void __cpa_flush_all(void *arg)
67 unsigned long cache = (unsigned long)arg;
70 * Flush all to work around Errata in early athlons regarding
71 * large page flushing.
75 if (cache && boot_cpu_data.x86_model >= 4)
79 static void cpa_flush_all(unsigned long cache)
81 BUG_ON(irqs_disabled());
83 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
86 static void __cpa_flush_range(void *arg)
89 * We could optimize that further and do individual per page
90 * tlb invalidates for a low number of pages. Caveat: we must
91 * flush the high aliases on 64bit as well.
96 static void cpa_flush_range(unsigned long start, int numpages, int cache)
98 unsigned int i, level;
101 BUG_ON(irqs_disabled());
102 WARN_ON(PAGE_ALIGN(start) != start);
104 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
110 * We only need to flush on one CPU,
111 * clflush is a MESI-coherent instruction that
112 * will cause all other CPUs to flush the same
115 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
116 pte_t *pte = lookup_address(addr, &level);
119 * Only flush present addresses:
121 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
122 clflush_cache_range((void *) addr, PAGE_SIZE);
126 #define HIGH_MAP_START __START_KERNEL_map
127 #define HIGH_MAP_END (__START_KERNEL_map + KERNEL_TEXT_SIZE)
131 * Converts a virtual address to a X86-64 highmap address
133 static unsigned long virt_to_highmap(void *address)
136 return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
138 return (unsigned long)address;
143 * Certain areas of memory on x86 require very specific protection flags,
144 * for example the BIOS area or kernel text. Callers don't always get this
145 * right (again, ioremap() on BIOS memory is not uncommon) so this function
146 * checks and fixes these known static required protection bits.
148 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
150 pgprot_t forbidden = __pgprot(0);
153 * The BIOS area between 640k and 1Mb needs to be executable for
154 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
156 if (within(__pa(address), BIOS_BEGIN, BIOS_END))
157 pgprot_val(forbidden) |= _PAGE_NX;
160 * The kernel text needs to be executable for obvious reasons
161 * Does not cover __inittext since that is gone later on
163 if (within(address, (unsigned long)_text, (unsigned long)_etext))
164 pgprot_val(forbidden) |= _PAGE_NX;
166 * Do the same for the x86-64 high kernel mapping
168 if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
169 pgprot_val(forbidden) |= _PAGE_NX;
171 /* The .rodata section needs to be read-only */
172 if (within(address, (unsigned long)__start_rodata,
173 (unsigned long)__end_rodata))
174 pgprot_val(forbidden) |= _PAGE_RW;
176 * Do the same for the x86-64 high kernel mapping
178 if (within(address, virt_to_highmap(__start_rodata),
179 virt_to_highmap(__end_rodata)))
180 pgprot_val(forbidden) |= _PAGE_RW;
182 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
188 * Lookup the page table entry for a virtual address. Return a pointer
189 * to the entry and the level of the mapping.
191 * Note: We return pud and pmd either when the entry is marked large
192 * or when the present bit is not set. Otherwise we would return a
193 * pointer to a nonexisting mapping.
195 pte_t *lookup_address(unsigned long address, unsigned int *level)
197 pgd_t *pgd = pgd_offset_k(address);
201 *level = PG_LEVEL_NONE;
206 pud = pud_offset(pgd, address);
210 *level = PG_LEVEL_1G;
211 if (pud_large(*pud) || !pud_present(*pud))
214 pmd = pmd_offset(pud, address);
218 *level = PG_LEVEL_2M;
219 if (pmd_large(*pmd) || !pmd_present(*pmd))
222 *level = PG_LEVEL_4K;
224 return pte_offset_kernel(pmd, address);
228 * Set the new pmd in all the pgds we know about:
230 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
233 set_pte_atomic(kpte, pte);
235 if (!SHARED_KERNEL_PMD) {
238 list_for_each_entry(page, &pgd_list, lru) {
243 pgd = (pgd_t *)page_address(page) + pgd_index(address);
244 pud = pud_offset(pgd, address);
245 pmd = pmd_offset(pud, address);
246 set_pte_atomic((pte_t *)pmd, pte);
253 try_preserve_large_page(pte_t *kpte, unsigned long address,
254 struct cpa_data *cpa)
256 unsigned long nextpage_addr, numpages, pmask, psize, flags;
257 pte_t new_pte, old_pte, *tmp;
258 pgprot_t old_prot, new_prot;
262 spin_lock_irqsave(&pgd_lock, flags);
264 * Check for races, another CPU might have split this page
267 tmp = lookup_address(address, &level);
273 psize = PMD_PAGE_SIZE;
274 pmask = PMD_PAGE_MASK;
278 psize = PMD_PAGE_SIZE;
279 pmask = PMD_PAGE_MASK;
288 * Calculate the number of pages, which fit into this large
289 * page starting at address:
291 nextpage_addr = (address + psize) & pmask;
292 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
293 if (numpages < cpa->numpages)
294 cpa->numpages = numpages;
297 * We are safe now. Check whether the new pgprot is the same:
300 old_prot = new_prot = pte_pgprot(old_pte);
302 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
303 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
304 new_prot = static_protections(new_prot, address);
307 * If there are no changes, return. maxpages has been updated
310 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
316 * We need to change the attributes. Check, whether we can
317 * change the large page in one go. We request a split, when
318 * the address is not aligned and the number of pages is
319 * smaller than the number of pages in the large page. Note
320 * that we limited the number of possible pages already to
321 * the number of pages in the large page.
323 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
325 * The address is aligned and the number of pages
326 * covers the full page.
328 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
329 __set_pmd_pte(kpte, address, new_pte);
335 spin_unlock_irqrestore(&pgd_lock, flags);
340 static LIST_HEAD(page_pool);
341 static unsigned long pool_size, pool_pages, pool_low;
342 static unsigned long pool_used, pool_failed, pool_refill;
344 static void cpa_fill_pool(void)
347 gfp_t gfp = GFP_KERNEL;
349 /* Do not allocate from interrupt context */
350 if (in_irq() || irqs_disabled())
353 * Check unlocked. I does not matter when we have one more
354 * page in the pool. The bit lock avoids recursive pool
357 if (pool_pages >= pool_size || test_and_set_bit_lock(0, &pool_refill))
360 #ifdef CONFIG_DEBUG_PAGEALLOC
363 * gfp = in_atomic() ? GFP_ATOMIC : GFP_KERNEL;
364 * but this fails on !PREEMPT kernels
366 gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN;
369 while (pool_pages < pool_size) {
370 p = alloc_pages(gfp, 0);
375 spin_lock_irq(&pgd_lock);
376 list_add(&p->lru, &page_pool);
378 spin_unlock_irq(&pgd_lock);
380 clear_bit_unlock(0, &pool_refill);
383 #define SHIFT_MB (20 - PAGE_SHIFT)
384 #define ROUND_MB_GB ((1 << 10) - 1)
385 #define SHIFT_MB_GB 10
386 #define POOL_PAGES_PER_GB 16
388 void __init cpa_init(void)
395 * Calculate the number of pool pages:
397 * Convert totalram (nr of pages) to MiB and round to the next
398 * GiB. Shift MiB to Gib and multiply the result by
401 gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB;
402 pool_size = POOL_PAGES_PER_GB * gb;
403 pool_low = pool_size;
407 "CPA: page pool initialized %lu of %lu pages preallocated\n",
408 pool_pages, pool_size);
411 static int split_large_page(pte_t *kpte, unsigned long address)
413 unsigned long flags, pfn, pfninc = 1;
414 gfp_t gfp_flags = GFP_KERNEL;
415 unsigned int i, level;
420 #ifdef CONFIG_DEBUG_PAGEALLOC
421 gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
423 base = alloc_pages(gfp_flags, 0);
427 spin_lock_irqsave(&pgd_lock, flags);
429 * Check for races, another CPU might have split this page
432 tmp = lookup_address(address, &level);
436 pbase = (pte_t *)page_address(base);
438 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
440 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
443 if (level == PG_LEVEL_1G) {
444 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
445 pgprot_val(ref_prot) |= _PAGE_PSE;
450 * Get the target pfn from the original entry:
452 pfn = pte_pfn(*kpte);
453 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
454 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
457 * Install the new, split up pagetable. Important details here:
459 * On Intel the NX bit of all levels must be cleared to make a
460 * page executable. See section 4.13.2 of Intel 64 and IA-32
461 * Architectures Software Developer's Manual).
463 * Mark the entry present. The current mapping might be
464 * set to not present, which we preserved above.
466 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
467 pgprot_val(ref_prot) |= _PAGE_PRESENT;
468 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
472 spin_unlock_irqrestore(&pgd_lock, flags);
475 __free_pages(base, 0);
480 static int __change_page_attr(unsigned long address, struct cpa_data *cpa)
484 struct page *kpte_page;
488 kpte = lookup_address(address, &level);
492 kpte_page = virt_to_page(kpte);
493 BUG_ON(PageLRU(kpte_page));
494 BUG_ON(PageCompound(kpte_page));
496 if (level == PG_LEVEL_4K) {
497 pte_t new_pte, old_pte = *kpte;
498 pgprot_t new_prot = pte_pgprot(old_pte);
500 if(!pte_val(old_pte)) {
501 printk(KERN_WARNING "CPA: called for zero pte. "
502 "vaddr = %lx cpa->vaddr = %lx\n", address,
508 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
509 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
511 new_prot = static_protections(new_prot, address);
514 * We need to keep the pfn from the existing PTE,
515 * after all we're only going to change it's attributes
516 * not the memory it points to
518 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
521 * Do we really change anything ?
523 if (pte_val(old_pte) != pte_val(new_pte)) {
524 set_pte_atomic(kpte, new_pte);
532 * Check, whether we can keep the large page intact
533 * and just change the pte:
535 do_split = try_preserve_large_page(kpte, address, cpa);
537 * When the range fits into the existing large page,
538 * return. cp->numpages and cpa->tlbflush have been updated in
545 * We have to split the large page:
547 err = split_large_page(kpte, address);
557 * change_page_attr_addr - Change page table attributes in linear mapping
558 * @address: Virtual address in linear mapping.
559 * @prot: New page table attribute (PAGE_*)
561 * Change page attributes of a page in the direct mapping. This is a variant
562 * of change_page_attr() that also works on memory holes that do not have
563 * mem_map entry (pfn_valid() is false).
565 * See change_page_attr() documentation for more details.
567 * Modules and drivers should use the set_memory_* APIs instead.
569 static int change_page_attr_addr(struct cpa_data *cpa)
572 unsigned long address = cpa->vaddr;
575 unsigned long phys_addr = __pa(address);
578 * If we are inside the high mapped kernel range, then we
579 * fixup the low mapping first. __va() returns the virtual
580 * address in the linear mapping:
582 if (within(address, HIGH_MAP_START, HIGH_MAP_END))
583 address = (unsigned long) __va(phys_addr);
586 err = __change_page_attr(address, cpa);
592 * If the physical address is inside the kernel map, we need
593 * to touch the high mapped kernel as well:
595 if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
597 * Calc the high mapping address. See __phys_addr()
598 * for the non obvious details.
600 * Note that NX and other required permissions are
601 * checked in static_protections().
603 address = phys_addr + HIGH_MAP_START - phys_base;
606 * Our high aliases are imprecise, because we check
607 * everything between 0 and KERNEL_TEXT_SIZE, so do
608 * not propagate lookup failures back to users:
610 __change_page_attr(address, cpa);
616 static int __change_page_attr_set_clr(struct cpa_data *cpa)
618 int ret, numpages = cpa->numpages;
622 * Store the remaining nr of pages for the large page
623 * preservation check.
625 cpa->numpages = numpages;
626 ret = change_page_attr_addr(cpa);
631 * Adjust the number of pages with the result of the
632 * CPA operation. Either a large page has been
633 * preserved or a single page update happened.
635 BUG_ON(cpa->numpages > numpages);
636 numpages -= cpa->numpages;
637 cpa->vaddr += cpa->numpages * PAGE_SIZE;
642 static inline int cache_attr(pgprot_t attr)
644 return pgprot_val(attr) &
645 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
648 static int change_page_attr_set_clr(unsigned long addr, int numpages,
649 pgprot_t mask_set, pgprot_t mask_clr)
655 * Check, if we are requested to change a not supported
658 mask_set = canon_pgprot(mask_set);
659 mask_clr = canon_pgprot(mask_clr);
660 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
664 cpa.numpages = numpages;
665 cpa.mask_set = mask_set;
666 cpa.mask_clr = mask_clr;
669 ret = __change_page_attr_set_clr(&cpa);
672 * Check whether we really changed something:
678 * No need to flush, when we did not set any of the caching
681 cache = cache_attr(mask_set);
684 * On success we use clflush, when the CPU supports it to
685 * avoid the wbindv. If the CPU does not support it and in the
686 * error case we fall back to cpa_flush_all (which uses
689 if (!ret && cpu_has_clflush)
690 cpa_flush_range(addr, numpages, cache);
692 cpa_flush_all(cache);
699 static inline int change_page_attr_set(unsigned long addr, int numpages,
702 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
705 static inline int change_page_attr_clear(unsigned long addr, int numpages,
708 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
711 int set_memory_uc(unsigned long addr, int numpages)
713 return change_page_attr_set(addr, numpages,
714 __pgprot(_PAGE_PCD | _PAGE_PWT));
716 EXPORT_SYMBOL(set_memory_uc);
718 int set_memory_wb(unsigned long addr, int numpages)
720 return change_page_attr_clear(addr, numpages,
721 __pgprot(_PAGE_PCD | _PAGE_PWT));
723 EXPORT_SYMBOL(set_memory_wb);
725 int set_memory_x(unsigned long addr, int numpages)
727 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
729 EXPORT_SYMBOL(set_memory_x);
731 int set_memory_nx(unsigned long addr, int numpages)
733 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
735 EXPORT_SYMBOL(set_memory_nx);
737 int set_memory_ro(unsigned long addr, int numpages)
739 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
742 int set_memory_rw(unsigned long addr, int numpages)
744 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
747 int set_memory_np(unsigned long addr, int numpages)
749 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
752 int set_pages_uc(struct page *page, int numpages)
754 unsigned long addr = (unsigned long)page_address(page);
756 return set_memory_uc(addr, numpages);
758 EXPORT_SYMBOL(set_pages_uc);
760 int set_pages_wb(struct page *page, int numpages)
762 unsigned long addr = (unsigned long)page_address(page);
764 return set_memory_wb(addr, numpages);
766 EXPORT_SYMBOL(set_pages_wb);
768 int set_pages_x(struct page *page, int numpages)
770 unsigned long addr = (unsigned long)page_address(page);
772 return set_memory_x(addr, numpages);
774 EXPORT_SYMBOL(set_pages_x);
776 int set_pages_nx(struct page *page, int numpages)
778 unsigned long addr = (unsigned long)page_address(page);
780 return set_memory_nx(addr, numpages);
782 EXPORT_SYMBOL(set_pages_nx);
784 int set_pages_ro(struct page *page, int numpages)
786 unsigned long addr = (unsigned long)page_address(page);
788 return set_memory_ro(addr, numpages);
791 int set_pages_rw(struct page *page, int numpages)
793 unsigned long addr = (unsigned long)page_address(page);
795 return set_memory_rw(addr, numpages);
798 #ifdef CONFIG_DEBUG_PAGEALLOC
800 static int __set_pages_p(struct page *page, int numpages)
802 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
803 .numpages = numpages,
804 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
805 .mask_clr = __pgprot(0)};
807 return __change_page_attr_set_clr(&cpa);
810 static int __set_pages_np(struct page *page, int numpages)
812 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
813 .numpages = numpages,
814 .mask_set = __pgprot(0),
815 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
817 return __change_page_attr_set_clr(&cpa);
820 void kernel_map_pages(struct page *page, int numpages, int enable)
822 if (PageHighMem(page))
825 debug_check_no_locks_freed(page_address(page),
826 numpages * PAGE_SIZE);
830 * If page allocator is not up yet then do not call c_p_a():
832 if (!debug_pagealloc_enabled)
836 * The return value is ignored - the calls cannot fail,
837 * large pages are disabled at boot time:
840 __set_pages_p(page, numpages);
842 __set_pages_np(page, numpages);
845 * We should perform an IPI and flush all tlbs,
846 * but that can deadlock->flush only current cpu:
851 * Try to refill the page pool here. We can do this only after
859 * The testcases use internal knowledge of the implementation that shouldn't
860 * be exposed to the rest of the kernel. Include these directly here.
862 #ifdef CONFIG_CPA_DEBUG
863 #include "pageattr-test.c"