arch/x86/mm/pageattr.c

   1 /*
   2  * Copyright 2002 Andi Kleen, SuSE Labs.
   3  * Thanks to Ben LaHaise for precious feedback.
   4  */
   5 #include <linux/highmem.h>
   6 #include <linux/bootmem.h>
   7 #include <linux/module.h>
   8 #include <linux/sched.h>
   9 #include <linux/slab.h>
  10 #include <linux/mm.h>
  11
  12 #include <asm/e820.h>
  13 #include <asm/processor.h>
  14 #include <asm/tlbflush.h>
  15 #include <asm/sections.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/pgalloc.h>
  18
  19 struct cpa_data {
  20         unsigned long   vaddr;
  21         int             numpages;
  22         pgprot_t        mask_set;
  23         pgprot_t        mask_clr;
  24 };
  25
  26 static inline int
  27 within(unsigned long addr, unsigned long start, unsigned long end)
  28 {
  29         return addr >= start && addr < end;
  30 }
  31
  32 /*
  33  * Flushing functions
  34  */
  35
  36 /**
  37  * clflush_cache_range - flush a cache range with clflush
  38  * @addr:       virtual start address
  39  * @size:       number of bytes to flush
  40  *
  41  * clflush is an unordered instruction which needs fencing with mfence
  42  * to avoid ordering issues.
  43  */
  44 void clflush_cache_range(void *vaddr, unsigned int size)
  45 {
  46         void *vend = vaddr + size - 1;
  47
  48         mb();
  49
  50         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
  51                 clflush(vaddr);
  52         /*
  53          * Flush any possible final partial cacheline:
  54          */
  55         clflush(vend);
  56
  57         mb();
  58 }
  59
  60 static void __cpa_flush_all(void *arg)
  61 {
  62         unsigned long cache = (unsigned long)arg;
  63
  64         /*
  65          * Flush all to work around Errata in early athlons regarding
  66          * large page flushing.
  67          */
  68         __flush_tlb_all();
  69
  70         if (cache && boot_cpu_data.x86_model >= 4)
  71                 wbinvd();
  72 }
  73
  74 static void cpa_flush_all(unsigned long cache)
  75 {
  76         BUG_ON(irqs_disabled());
  77
  78         on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
  79 }
  80
  81 static void __cpa_flush_range(void *arg)
  82 {
  83         /*
  84          * We could optimize that further and do individual per page
  85          * tlb invalidates for a low number of pages. Caveat: we must
  86          * flush the high aliases on 64bit as well.
  87          */
  88         __flush_tlb_all();
  89 }
  90
  91 static void cpa_flush_range(unsigned long start, int numpages, int cache)
  92 {
  93         unsigned int i, level;
  94         unsigned long addr;
  95
  96         BUG_ON(irqs_disabled());
  97         WARN_ON(PAGE_ALIGN(start) != start);
  98
  99         on_each_cpu(__cpa_flush_range, NULL, 1, 1);
 100
 101         if (!cache)
 102                 return;
 103
 104         /*
 105          * We only need to flush on one CPU,
 106          * clflush is a MESI-coherent instruction that
 107          * will cause all other CPUs to flush the same
 108          * cachelines:
 109          */
 110         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
 111                 pte_t *pte = lookup_address(addr, &level);
 112
 113                 /*
 114                  * Only flush present addresses:
 115                  */
 116                 if (pte && pte_present(*pte))
 117                         clflush_cache_range((void *) addr, PAGE_SIZE);
 118         }
 119 }
 120
 121 #define HIGH_MAP_START  __START_KERNEL_map
 122 #define HIGH_MAP_END    (__START_KERNEL_map + KERNEL_TEXT_SIZE)
 123
 124
 125 /*
 126  * Converts a virtual address to a X86-64 highmap address
 127  */
 128 static unsigned long virt_to_highmap(void *address)
 129 {
 130 #ifdef CONFIG_X86_64
 131         return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
 132 #else
 133         return (unsigned long)address;
 134 #endif
 135 }
 136
 137 /*
 138  * Certain areas of memory on x86 require very specific protection flags,
 139  * for example the BIOS area or kernel text. Callers don't always get this
 140  * right (again, ioremap() on BIOS memory is not uncommon) so this function
 141  * checks and fixes these known static required protection bits.
 142  */
 143 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
 144 {
 145         pgprot_t forbidden = __pgprot(0);
 146
 147         /*
 148          * The BIOS area between 640k and 1Mb needs to be executable for
 149          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
 150          */
 151         if (within(__pa(address), BIOS_BEGIN, BIOS_END))
 152                 pgprot_val(forbidden) |= _PAGE_NX;
 153
 154         /*
 155          * The kernel text needs to be executable for obvious reasons
 156          * Does not cover __inittext since that is gone later on
 157          */
 158         if (within(address, (unsigned long)_text, (unsigned long)_etext))
 159                 pgprot_val(forbidden) |= _PAGE_NX;
 160         /*
 161          * Do the same for the x86-64 high kernel mapping
 162          */
 163         if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
 164                 pgprot_val(forbidden) |= _PAGE_NX;
 165
 166
 167 #ifdef CONFIG_DEBUG_RODATA
 168         /* The .rodata section needs to be read-only */
 169         if (within(address, (unsigned long)__start_rodata,
 170                                 (unsigned long)__end_rodata))
 171                 pgprot_val(forbidden) |= _PAGE_RW;
 172         /*
 173          * Do the same for the x86-64 high kernel mapping
 174          */
 175         if (within(address, virt_to_highmap(__start_rodata),
 176                                 virt_to_highmap(__end_rodata)))
 177                 pgprot_val(forbidden) |= _PAGE_RW;
 178 #endif
 179
 180         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
 181
 182         return prot;
 183 }
 184
 185 pte_t *lookup_address(unsigned long address, int *level)
 186 {
 187         pgd_t *pgd = pgd_offset_k(address);
 188         pud_t *pud;
 189         pmd_t *pmd;
 190
 191         *level = PG_LEVEL_NONE;
 192
 193         if (pgd_none(*pgd))
 194                 return NULL;
 195         pud = pud_offset(pgd, address);
 196         if (pud_none(*pud))
 197                 return NULL;
 198         pmd = pmd_offset(pud, address);
 199         if (pmd_none(*pmd))
 200                 return NULL;
 201
 202         *level = PG_LEVEL_2M;
 203         if (pmd_large(*pmd))
 204                 return (pte_t *)pmd;
 205
 206         *level = PG_LEVEL_4K;
 207         return pte_offset_kernel(pmd, address);
 208 }
 209
 210 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
 211 {
 212         /* change init_mm */
 213         set_pte_atomic(kpte, pte);
 214 #ifdef CONFIG_X86_32
 215         if (!SHARED_KERNEL_PMD) {
 216                 struct page *page;
 217
 218                 list_for_each_entry(page, &pgd_list, lru) {
 219                         pgd_t *pgd;
 220                         pud_t *pud;
 221                         pmd_t *pmd;
 222
 223                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
 224                         pud = pud_offset(pgd, address);
 225                         pmd = pmd_offset(pud, address);
 226                         set_pte_atomic((pte_t *)pmd, pte);
 227                 }
 228         }
 229 #endif
 230 }
 231
 232 static int split_large_page(pte_t *kpte, unsigned long address)
 233 {
 234         pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
 235         gfp_t gfp_flags = GFP_KERNEL;
 236         unsigned long flags, addr, pfn;
 237         pte_t *pbase, *tmp;
 238         struct page *base;
 239         unsigned int i, level;
 240
 241 #ifdef CONFIG_DEBUG_PAGEALLOC
 242         gfp_flags = __GFP_HIGH | __GFP_NOFAIL | __GFP_NOWARN;
 243         gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
 244 #endif
 245         base = alloc_pages(gfp_flags, 0);
 246         if (!base)
 247                 return -ENOMEM;
 248
 249         spin_lock_irqsave(&pgd_lock, flags);
 250         /*
 251          * Check for races, another CPU might have split this page
 252          * up for us already:
 253          */
 254         tmp = lookup_address(address, &level);
 255         if (tmp != kpte) {
 256                 WARN_ON_ONCE(1);
 257                 goto out_unlock;
 258         }
 259
 260         address = __pa(address);
 261         addr = address & LARGE_PAGE_MASK;
 262         pbase = (pte_t *)page_address(base);
 263 #ifdef CONFIG_X86_32
 264         paravirt_alloc_pt(&init_mm, page_to_pfn(base));
 265 #endif
 266
 267         /*
 268          * Get the target pfn from the original entry:
 269          */
 270         pfn = pte_pfn(*kpte);
 271         for (i = 0; i < PTRS_PER_PTE; i++, pfn++)
 272                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
 273
 274         /*
 275          * Install the new, split up pagetable. Important detail here:
 276          *
 277          * On Intel the NX bit of all levels must be cleared to make a
 278          * page executable. See section 4.13.2 of Intel 64 and IA-32
 279          * Architectures Software Developer's Manual).
 280          */
 281         ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
 282         __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
 283         base = NULL;
 284
 285 out_unlock:
 286         spin_unlock_irqrestore(&pgd_lock, flags);
 287
 288         if (base)
 289                 __free_pages(base, 0);
 290
 291         return 0;
 292 }
 293
 294 static int __change_page_attr(unsigned long address, struct cpa_data *cpa)
 295 {
 296         struct page *kpte_page;
 297         int level, err = 0;
 298         pte_t *kpte;
 299
 300 repeat:
 301         kpte = lookup_address(address, &level);
 302         if (!kpte)
 303                 return -EINVAL;
 304
 305         kpte_page = virt_to_page(kpte);
 306         BUG_ON(PageLRU(kpte_page));
 307         BUG_ON(PageCompound(kpte_page));
 308
 309         if (level == PG_LEVEL_4K) {
 310                 pte_t new_pte, old_pte = *kpte;
 311                 pgprot_t new_prot = pte_pgprot(old_pte);
 312
 313                 if(!pte_val(old_pte)) {
 314                         printk(KERN_WARNING "CPA: called for zero pte. "
 315                                "vaddr = %lx cpa->vaddr = %lx\n", address,
 316                                 cpa->vaddr);
 317                         WARN_ON(1);
 318                         return -EINVAL;
 319                 }
 320
 321                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
 322                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
 323
 324                 new_prot = static_protections(new_prot, address);
 325
 326                 /*
 327                  * We need to keep the pfn from the existing PTE,
 328                  * after all we're only going to change it's attributes
 329                  * not the memory it points to
 330                  */
 331                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
 332                 set_pte_atomic(kpte, new_pte);
 333         } else {
 334                 err = split_large_page(kpte, address);
 335                 if (!err)
 336                         goto repeat;
 337         }
 338         return err;
 339 }
 340
 341 /**
 342  * change_page_attr_addr - Change page table attributes in linear mapping
 343  * @address: Virtual address in linear mapping.
 344  * @prot:    New page table attribute (PAGE_*)
 345  *
 346  * Change page attributes of a page in the direct mapping. This is a variant
 347  * of change_page_attr() that also works on memory holes that do not have
 348  * mem_map entry (pfn_valid() is false).
 349  *
 350  * See change_page_attr() documentation for more details.
 351  *
 352  * Modules and drivers should use the set_memory_* APIs instead.
 353  */
 354
 355 static int change_page_attr_addr(struct cpa_data *cpa)
 356 {
 357         int err;
 358         unsigned long address = cpa->vaddr;
 359
 360 #ifdef CONFIG_X86_64
 361         unsigned long phys_addr = __pa(address);
 362
 363         /*
 364          * If we are inside the high mapped kernel range, then we
 365          * fixup the low mapping first. __va() returns the virtual
 366          * address in the linear mapping:
 367          */
 368         if (within(address, HIGH_MAP_START, HIGH_MAP_END))
 369                 address = (unsigned long) __va(phys_addr);
 370 #endif
 371
 372         err = __change_page_attr(address, cpa);
 373         if (err)
 374                 return err;
 375
 376 #ifdef CONFIG_X86_64
 377         /*
 378          * If the physical address is inside the kernel map, we need
 379          * to touch the high mapped kernel as well:
 380          */
 381         if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
 382                 /*
 383                  * Calc the high mapping address. See __phys_addr()
 384                  * for the non obvious details.
 385                  *
 386                  * Note that NX and other required permissions are
 387                  * checked in static_protections().
 388                  */
 389                 address = phys_addr + HIGH_MAP_START - phys_base;
 390
 391                 /*
 392                  * Our high aliases are imprecise, because we check
 393                  * everything between 0 and KERNEL_TEXT_SIZE, so do
 394                  * not propagate lookup failures back to users:
 395                  */
 396                 __change_page_attr(address, cpa);
 397         }
 398 #endif
 399         return err;
 400 }
 401
 402 static int __change_page_attr_set_clr(struct cpa_data *cpa)
 403 {
 404         unsigned int i;
 405         int ret;
 406
 407         for (i = 0; i < cpa->numpages ; i++, cpa->vaddr += PAGE_SIZE) {
 408                 ret = change_page_attr_addr(cpa);
 409                 if (ret)
 410                         return ret;
 411         }
 412
 413         return 0;
 414 }
 415
 416 static inline int cache_attr(pgprot_t attr)
 417 {
 418         return pgprot_val(attr) &
 419                 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
 420 }
 421
 422 static int change_page_attr_set_clr(unsigned long addr, int numpages,
 423                                     pgprot_t mask_set, pgprot_t mask_clr)
 424 {
 425         struct cpa_data cpa;
 426         int ret, cache;
 427
 428         /*
 429          * Check, if we are requested to change a not supported
 430          * feature:
 431          */
 432         mask_set = canon_pgprot(mask_set);
 433         mask_clr = canon_pgprot(mask_clr);
 434         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
 435                 return 0;
 436
 437         cpa.vaddr = addr;
 438         cpa.numpages = numpages;
 439         cpa.mask_set = mask_set;
 440         cpa.mask_clr = mask_clr;
 441
 442         ret = __change_page_attr_set_clr(&cpa);
 443
 444         /*
 445          * No need to flush, when we did not set any of the caching
 446          * attributes:
 447          */
 448         cache = cache_attr(mask_set);
 449
 450         /*
 451          * On success we use clflush, when the CPU supports it to
 452          * avoid the wbindv. If the CPU does not support it and in the
 453          * error case we fall back to cpa_flush_all (which uses
 454          * wbindv):
 455          */
 456         if (!ret && cpu_has_clflush)
 457                 cpa_flush_range(addr, numpages, cache);
 458         else
 459                 cpa_flush_all(cache);
 460
 461         return ret;
 462 }
 463
 464 static inline int change_page_attr_set(unsigned long addr, int numpages,
 465                                        pgprot_t mask)
 466 {
 467         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
 468 }
 469
 470 static inline int change_page_attr_clear(unsigned long addr, int numpages,
 471                                          pgprot_t mask)
 472 {
 473         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
 474 }
 475
 476 int set_memory_uc(unsigned long addr, int numpages)
 477 {
 478         return change_page_attr_set(addr, numpages,
 479                                     __pgprot(_PAGE_PCD | _PAGE_PWT));
 480 }
 481 EXPORT_SYMBOL(set_memory_uc);
 482
 483 int set_memory_wb(unsigned long addr, int numpages)
 484 {
 485         return change_page_attr_clear(addr, numpages,
 486                                       __pgprot(_PAGE_PCD | _PAGE_PWT));
 487 }
 488 EXPORT_SYMBOL(set_memory_wb);
 489
 490 int set_memory_x(unsigned long addr, int numpages)
 491 {
 492         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
 493 }
 494 EXPORT_SYMBOL(set_memory_x);
 495
 496 int set_memory_nx(unsigned long addr, int numpages)
 497 {
 498         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
 499 }
 500 EXPORT_SYMBOL(set_memory_nx);
 501
 502 int set_memory_ro(unsigned long addr, int numpages)
 503 {
 504         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
 505 }
 506
 507 int set_memory_rw(unsigned long addr, int numpages)
 508 {
 509         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
 510 }
 511
 512 int set_memory_np(unsigned long addr, int numpages)
 513 {
 514         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
 515 }
 516
 517 int set_pages_uc(struct page *page, int numpages)
 518 {
 519         unsigned long addr = (unsigned long)page_address(page);
 520
 521         return set_memory_uc(addr, numpages);
 522 }
 523 EXPORT_SYMBOL(set_pages_uc);
 524
 525 int set_pages_wb(struct page *page, int numpages)
 526 {
 527         unsigned long addr = (unsigned long)page_address(page);
 528
 529         return set_memory_wb(addr, numpages);
 530 }
 531 EXPORT_SYMBOL(set_pages_wb);
 532
 533 int set_pages_x(struct page *page, int numpages)
 534 {
 535         unsigned long addr = (unsigned long)page_address(page);
 536
 537         return set_memory_x(addr, numpages);
 538 }
 539 EXPORT_SYMBOL(set_pages_x);
 540
 541 int set_pages_nx(struct page *page, int numpages)
 542 {
 543         unsigned long addr = (unsigned long)page_address(page);
 544
 545         return set_memory_nx(addr, numpages);
 546 }
 547 EXPORT_SYMBOL(set_pages_nx);
 548
 549 int set_pages_ro(struct page *page, int numpages)
 550 {
 551         unsigned long addr = (unsigned long)page_address(page);
 552
 553         return set_memory_ro(addr, numpages);
 554 }
 555
 556 int set_pages_rw(struct page *page, int numpages)
 557 {
 558         unsigned long addr = (unsigned long)page_address(page);
 559
 560         return set_memory_rw(addr, numpages);
 561 }
 562
 563 #ifdef CONFIG_DEBUG_PAGEALLOC
 564
 565 static int __set_pages_p(struct page *page, int numpages)
 566 {
 567         struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
 568                                 .numpages = numpages,
 569                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
 570                                 .mask_clr = __pgprot(0)};
 571
 572         return __change_page_attr_set_clr(&cpa);
 573 }
 574
 575 static int __set_pages_np(struct page *page, int numpages)
 576 {
 577         struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
 578                                 .numpages = numpages,
 579                                 .mask_set = __pgprot(0),
 580                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
 581
 582         return __change_page_attr_set_clr(&cpa);
 583 }
 584
 585 void kernel_map_pages(struct page *page, int numpages, int enable)
 586 {
 587         if (PageHighMem(page))
 588                 return;
 589         if (!enable) {
 590                 debug_check_no_locks_freed(page_address(page),
 591                                            numpages * PAGE_SIZE);
 592         }
 593
 594         /*
 595          * If page allocator is not up yet then do not call c_p_a():
 596          */
 597         if (!debug_pagealloc_enabled)
 598                 return;
 599
 600         /*
 601          * The return value is ignored - the calls cannot fail,
 602          * large pages are disabled at boot time:
 603          */
 604         if (enable)
 605                 __set_pages_p(page, numpages);
 606         else
 607                 __set_pages_np(page, numpages);
 608
 609         /*
 610          * We should perform an IPI and flush all tlbs,
 611          * but that can deadlock->flush only current cpu:
 612          */
 613         __flush_tlb_all();
 614 }
 615 #endif
 616
 617 /*
 618  * The testcases use internal knowledge of the implementation that shouldn't
 619  * be exposed to the rest of the kernel. Include these directly here.
 620  */
 621 #ifdef CONFIG_CPA_DEBUG
 622 #include "pageattr-test.c"
 623 #endif