arch/x86/mm/pageattr.c

   1 /*
   2  * Copyright 2002 Andi Kleen, SuSE Labs.
   3  * Thanks to Ben LaHaise for precious feedback.
   4  */
   5 #include <linux/highmem.h>
   6 #include <linux/bootmem.h>
   7 #include <linux/module.h>
   8 #include <linux/sched.h>
   9 #include <linux/slab.h>
  10 #include <linux/mm.h>
  11
  12 #include <asm/e820.h>
  13 #include <asm/processor.h>
  14 #include <asm/tlbflush.h>
  15 #include <asm/sections.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/pgalloc.h>
  18
  19 static inline int
  20 within(unsigned long addr, unsigned long start, unsigned long end)
  21 {
  22         return addr >= start && addr < end;
  23 }
  24
  25 /*
  26  * Flushing functions
  27  */
  28
  29 /**
  30  * clflush_cache_range - flush a cache range with clflush
  31  * @addr:       virtual start address
  32  * @size:       number of bytes to flush
  33  *
  34  * clflush is an unordered instruction which needs fencing with mfence
  35  * to avoid ordering issues.
  36  */
  37 void clflush_cache_range(void *vaddr, unsigned int size)
  38 {
  39         void *vend = vaddr + size - 1;
  40
  41         mb();
  42
  43         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
  44                 clflush(vaddr);
  45         /*
  46          * Flush any possible final partial cacheline:
  47          */
  48         clflush(vend);
  49
  50         mb();
  51 }
  52
  53 static void __cpa_flush_all(void *arg)
  54 {
  55         /*
  56          * Flush all to work around Errata in early athlons regarding
  57          * large page flushing.
  58          */
  59         __flush_tlb_all();
  60
  61         if (boot_cpu_data.x86_model >= 4)
  62                 wbinvd();
  63 }
  64
  65 static void cpa_flush_all(void)
  66 {
  67         BUG_ON(irqs_disabled());
  68
  69         on_each_cpu(__cpa_flush_all, NULL, 1, 1);
  70 }
  71
  72 static void __cpa_flush_range(void *arg)
  73 {
  74         /*
  75          * We could optimize that further and do individual per page
  76          * tlb invalidates for a low number of pages. Caveat: we must
  77          * flush the high aliases on 64bit as well.
  78          */
  79         __flush_tlb_all();
  80 }
  81
  82 static void cpa_flush_range(unsigned long start, int numpages)
  83 {
  84         unsigned int i, level;
  85         unsigned long addr;
  86
  87         BUG_ON(irqs_disabled());
  88         WARN_ON(PAGE_ALIGN(start) != start);
  89
  90         on_each_cpu(__cpa_flush_range, NULL, 1, 1);
  91
  92         /*
  93          * We only need to flush on one CPU,
  94          * clflush is a MESI-coherent instruction that
  95          * will cause all other CPUs to flush the same
  96          * cachelines:
  97          */
  98         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
  99                 pte_t *pte = lookup_address(addr, &level);
 100
 101                 /*
 102                  * Only flush present addresses:
 103                  */
 104                 if (pte && pte_present(*pte))
 105                         clflush_cache_range((void *) addr, PAGE_SIZE);
 106         }
 107 }
 108
 109 #define HIGH_MAP_START  __START_KERNEL_map
 110 #define HIGH_MAP_END    (__START_KERNEL_map + KERNEL_TEXT_SIZE)
 111
 112
 113 /*
 114  * Converts a virtual address to a X86-64 highmap address
 115  */
 116 static unsigned long virt_to_highmap(void *address)
 117 {
 118 #ifdef CONFIG_X86_64
 119         return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
 120 #else
 121         return (unsigned long)address;
 122 #endif
 123 }
 124
 125 /*
 126  * Certain areas of memory on x86 require very specific protection flags,
 127  * for example the BIOS area or kernel text. Callers don't always get this
 128  * right (again, ioremap() on BIOS memory is not uncommon) so this function
 129  * checks and fixes these known static required protection bits.
 130  */
 131 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
 132 {
 133         pgprot_t forbidden = __pgprot(0);
 134
 135         /*
 136          * The BIOS area between 640k and 1Mb needs to be executable for
 137          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
 138          */
 139         if (within(__pa(address), BIOS_BEGIN, BIOS_END))
 140                 pgprot_val(forbidden) |= _PAGE_NX;
 141
 142         /*
 143          * The kernel text needs to be executable for obvious reasons
 144          * Does not cover __inittext since that is gone later on
 145          */
 146         if (within(address, (unsigned long)_text, (unsigned long)_etext))
 147                 pgprot_val(forbidden) |= _PAGE_NX;
 148         /*
 149          * Do the same for the x86-64 high kernel mapping
 150          */
 151         if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
 152                 pgprot_val(forbidden) |= _PAGE_NX;
 153
 154
 155 #ifdef CONFIG_DEBUG_RODATA
 156         /* The .rodata section needs to be read-only */
 157         if (within(address, (unsigned long)__start_rodata,
 158                                 (unsigned long)__end_rodata))
 159                 pgprot_val(forbidden) |= _PAGE_RW;
 160         /*
 161          * Do the same for the x86-64 high kernel mapping
 162          */
 163         if (within(address, virt_to_highmap(__start_rodata),
 164                                 virt_to_highmap(__end_rodata)))
 165                 pgprot_val(forbidden) |= _PAGE_RW;
 166 #endif
 167
 168         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
 169
 170         return prot;
 171 }
 172
 173 pte_t *lookup_address(unsigned long address, int *level)
 174 {
 175         pgd_t *pgd = pgd_offset_k(address);
 176         pud_t *pud;
 177         pmd_t *pmd;
 178
 179         *level = PG_LEVEL_NONE;
 180
 181         if (pgd_none(*pgd))
 182                 return NULL;
 183         pud = pud_offset(pgd, address);
 184         if (pud_none(*pud))
 185                 return NULL;
 186         pmd = pmd_offset(pud, address);
 187         if (pmd_none(*pmd))
 188                 return NULL;
 189
 190         *level = PG_LEVEL_2M;
 191         if (pmd_large(*pmd))
 192                 return (pte_t *)pmd;
 193
 194         *level = PG_LEVEL_4K;
 195         return pte_offset_kernel(pmd, address);
 196 }
 197
 198 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
 199 {
 200         /* change init_mm */
 201         set_pte_atomic(kpte, pte);
 202 #ifdef CONFIG_X86_32
 203         if (!SHARED_KERNEL_PMD) {
 204                 struct page *page;
 205
 206                 list_for_each_entry(page, &pgd_list, lru) {
 207                         pgd_t *pgd;
 208                         pud_t *pud;
 209                         pmd_t *pmd;
 210
 211                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
 212                         pud = pud_offset(pgd, address);
 213                         pmd = pmd_offset(pud, address);
 214                         set_pte_atomic((pte_t *)pmd, pte);
 215                 }
 216         }
 217 #endif
 218 }
 219
 220 static int split_large_page(pte_t *kpte, unsigned long address)
 221 {
 222         pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
 223         gfp_t gfp_flags = GFP_KERNEL;
 224         unsigned long flags, addr, pfn;
 225         pte_t *pbase, *tmp;
 226         struct page *base;
 227         unsigned int i, level;
 228
 229 #ifdef CONFIG_DEBUG_PAGEALLOC
 230         gfp_flags = __GFP_HIGH | __GFP_NOFAIL | __GFP_NOWARN;
 231         gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
 232 #endif
 233         base = alloc_pages(gfp_flags, 0);
 234         if (!base)
 235                 return -ENOMEM;
 236
 237         spin_lock_irqsave(&pgd_lock, flags);
 238         /*
 239          * Check for races, another CPU might have split this page
 240          * up for us already:
 241          */
 242         tmp = lookup_address(address, &level);
 243         if (tmp != kpte) {
 244                 WARN_ON_ONCE(1);
 245                 goto out_unlock;
 246         }
 247
 248         address = __pa(address);
 249         addr = address & LARGE_PAGE_MASK;
 250         pbase = (pte_t *)page_address(base);
 251 #ifdef CONFIG_X86_32
 252         paravirt_alloc_pt(&init_mm, page_to_pfn(base));
 253 #endif
 254
 255         /*
 256          * Get the target pfn from the original entry:
 257          */
 258         pfn = pte_pfn(*kpte);
 259         for (i = 0; i < PTRS_PER_PTE; i++, pfn++)
 260                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
 261
 262         /*
 263          * Install the new, split up pagetable. Important detail here:
 264          *
 265          * On Intel the NX bit of all levels must be cleared to make a
 266          * page executable. See section 4.13.2 of Intel 64 and IA-32
 267          * Architectures Software Developer's Manual).
 268          */
 269         ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
 270         __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
 271         base = NULL;
 272
 273 out_unlock:
 274         spin_unlock_irqrestore(&pgd_lock, flags);
 275
 276         if (base)
 277                 __free_pages(base, 0);
 278
 279         return 0;
 280 }
 281
 282 static int
 283 __change_page_attr(unsigned long address, pgprot_t mask_set, pgprot_t mask_clr)
 284 {
 285         struct page *kpte_page;
 286         int level, err = 0;
 287         pte_t *kpte;
 288
 289 repeat:
 290         kpte = lookup_address(address, &level);
 291         if (!kpte)
 292                 return -EINVAL;
 293
 294         kpte_page = virt_to_page(kpte);
 295         BUG_ON(PageLRU(kpte_page));
 296         BUG_ON(PageCompound(kpte_page));
 297
 298         if (level == PG_LEVEL_4K) {
 299                 pte_t new_pte, old_pte = *kpte;
 300                 pgprot_t new_prot = pte_pgprot(old_pte);
 301
 302                 if(!pte_val(old_pte)) {
 303                         WARN_ON_ONCE(1);
 304                         return -EINVAL;
 305                 }
 306
 307                 pgprot_val(new_prot) &= ~pgprot_val(mask_clr);
 308                 pgprot_val(new_prot) |= pgprot_val(mask_set);
 309
 310                 new_prot = static_protections(new_prot, address);
 311
 312                 /*
 313                  * We need to keep the pfn from the existing PTE,
 314                  * after all we're only going to change it's attributes
 315                  * not the memory it points to
 316                  */
 317                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
 318                 set_pte_atomic(kpte, new_pte);
 319         } else {
 320                 err = split_large_page(kpte, address);
 321                 if (!err)
 322                         goto repeat;
 323         }
 324         return err;
 325 }
 326
 327 /**
 328  * change_page_attr_addr - Change page table attributes in linear mapping
 329  * @address: Virtual address in linear mapping.
 330  * @prot:    New page table attribute (PAGE_*)
 331  *
 332  * Change page attributes of a page in the direct mapping. This is a variant
 333  * of change_page_attr() that also works on memory holes that do not have
 334  * mem_map entry (pfn_valid() is false).
 335  *
 336  * See change_page_attr() documentation for more details.
 337  *
 338  * Modules and drivers should use the set_memory_* APIs instead.
 339  */
 340
 341
 342 static int
 343 change_page_attr_addr(unsigned long address, pgprot_t mask_set,
 344                       pgprot_t mask_clr)
 345 {
 346         int err;
 347
 348 #ifdef CONFIG_X86_64
 349         unsigned long phys_addr = __pa(address);
 350
 351         /*
 352          * If we are inside the high mapped kernel range, then we
 353          * fixup the low mapping first. __va() returns the virtual
 354          * address in the linear mapping:
 355          */
 356         if (within(address, HIGH_MAP_START, HIGH_MAP_END))
 357                 address = (unsigned long) __va(phys_addr);
 358 #endif
 359
 360         err = __change_page_attr(address, mask_set, mask_clr);
 361         if (err)
 362                 return err;
 363
 364 #ifdef CONFIG_X86_64
 365         /*
 366          * If the physical address is inside the kernel map, we need
 367          * to touch the high mapped kernel as well:
 368          */
 369         if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
 370                 /*
 371                  * Calc the high mapping address. See __phys_addr()
 372                  * for the non obvious details.
 373                  *
 374                  * Note that NX and other required permissions are
 375                  * checked in static_protections().
 376                  */
 377                 address = phys_addr + HIGH_MAP_START - phys_base;
 378
 379                 /*
 380                  * Our high aliases are imprecise, because we check
 381                  * everything between 0 and KERNEL_TEXT_SIZE, so do
 382                  * not propagate lookup failures back to users:
 383                  */
 384                 __change_page_attr(address, mask_set, mask_clr);
 385         }
 386 #endif
 387         return err;
 388 }
 389
 390 static int __change_page_attr_set_clr(unsigned long addr, int numpages,
 391                                       pgprot_t mask_set, pgprot_t mask_clr)
 392 {
 393         unsigned int i;
 394         int ret;
 395
 396         for (i = 0; i < numpages ; i++, addr += PAGE_SIZE) {
 397                 ret = change_page_attr_addr(addr, mask_set, mask_clr);
 398                 if (ret)
 399                         return ret;
 400         }
 401
 402         return 0;
 403 }
 404
 405 static int change_page_attr_set_clr(unsigned long addr, int numpages,
 406                                     pgprot_t mask_set, pgprot_t mask_clr)
 407 {
 408         int ret = __change_page_attr_set_clr(addr, numpages, mask_set,
 409                                              mask_clr);
 410
 411         /*
 412          * On success we use clflush, when the CPU supports it to
 413          * avoid the wbindv. If the CPU does not support it and in the
 414          * error case we fall back to cpa_flush_all (which uses
 415          * wbindv):
 416          */
 417         if (!ret && cpu_has_clflush)
 418                 cpa_flush_range(addr, numpages);
 419         else
 420                 cpa_flush_all();
 421
 422         return ret;
 423 }
 424
 425 static inline int change_page_attr_set(unsigned long addr, int numpages,
 426                                        pgprot_t mask)
 427 {
 428         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
 429 }
 430
 431 static inline int change_page_attr_clear(unsigned long addr, int numpages,
 432                                          pgprot_t mask)
 433 {
 434         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
 435 }
 436
 437 int set_memory_uc(unsigned long addr, int numpages)
 438 {
 439         return change_page_attr_set(addr, numpages,
 440                                     __pgprot(_PAGE_PCD | _PAGE_PWT));
 441 }
 442 EXPORT_SYMBOL(set_memory_uc);
 443
 444 int set_memory_wb(unsigned long addr, int numpages)
 445 {
 446         return change_page_attr_clear(addr, numpages,
 447                                       __pgprot(_PAGE_PCD | _PAGE_PWT));
 448 }
 449 EXPORT_SYMBOL(set_memory_wb);
 450
 451 int set_memory_x(unsigned long addr, int numpages)
 452 {
 453         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
 454 }
 455 EXPORT_SYMBOL(set_memory_x);
 456
 457 int set_memory_nx(unsigned long addr, int numpages)
 458 {
 459         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
 460 }
 461 EXPORT_SYMBOL(set_memory_nx);
 462
 463 int set_memory_ro(unsigned long addr, int numpages)
 464 {
 465         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
 466 }
 467
 468 int set_memory_rw(unsigned long addr, int numpages)
 469 {
 470         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
 471 }
 472
 473 int set_memory_np(unsigned long addr, int numpages)
 474 {
 475         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
 476 }
 477
 478 int set_pages_uc(struct page *page, int numpages)
 479 {
 480         unsigned long addr = (unsigned long)page_address(page);
 481
 482         return set_memory_uc(addr, numpages);
 483 }
 484 EXPORT_SYMBOL(set_pages_uc);
 485
 486 int set_pages_wb(struct page *page, int numpages)
 487 {
 488         unsigned long addr = (unsigned long)page_address(page);
 489
 490         return set_memory_wb(addr, numpages);
 491 }
 492 EXPORT_SYMBOL(set_pages_wb);
 493
 494 int set_pages_x(struct page *page, int numpages)
 495 {
 496         unsigned long addr = (unsigned long)page_address(page);
 497
 498         return set_memory_x(addr, numpages);
 499 }
 500 EXPORT_SYMBOL(set_pages_x);
 501
 502 int set_pages_nx(struct page *page, int numpages)
 503 {
 504         unsigned long addr = (unsigned long)page_address(page);
 505
 506         return set_memory_nx(addr, numpages);
 507 }
 508 EXPORT_SYMBOL(set_pages_nx);
 509
 510 int set_pages_ro(struct page *page, int numpages)
 511 {
 512         unsigned long addr = (unsigned long)page_address(page);
 513
 514         return set_memory_ro(addr, numpages);
 515 }
 516
 517 int set_pages_rw(struct page *page, int numpages)
 518 {
 519         unsigned long addr = (unsigned long)page_address(page);
 520
 521         return set_memory_rw(addr, numpages);
 522 }
 523
 524
 525 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_CPA_DEBUG)
 526 static inline int __change_page_attr_set(unsigned long addr, int numpages,
 527                                          pgprot_t mask)
 528 {
 529         return __change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
 530 }
 531
 532 static inline int __change_page_attr_clear(unsigned long addr, int numpages,
 533                                            pgprot_t mask)
 534 {
 535         return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
 536 }
 537 #endif
 538
 539 #ifdef CONFIG_DEBUG_PAGEALLOC
 540
 541 static int __set_pages_p(struct page *page, int numpages)
 542 {
 543         unsigned long addr = (unsigned long)page_address(page);
 544
 545         return __change_page_attr_set(addr, numpages,
 546                                       __pgprot(_PAGE_PRESENT | _PAGE_RW));
 547 }
 548
 549 static int __set_pages_np(struct page *page, int numpages)
 550 {
 551         unsigned long addr = (unsigned long)page_address(page);
 552
 553         return __change_page_attr_clear(addr, numpages,
 554                                         __pgprot(_PAGE_PRESENT));
 555 }
 556
 557 void kernel_map_pages(struct page *page, int numpages, int enable)
 558 {
 559         if (PageHighMem(page))
 560                 return;
 561         if (!enable) {
 562                 debug_check_no_locks_freed(page_address(page),
 563                                            numpages * PAGE_SIZE);
 564         }
 565
 566         /*
 567          * If page allocator is not up yet then do not call c_p_a():
 568          */
 569         if (!debug_pagealloc_enabled)
 570                 return;
 571
 572         /*
 573          * The return value is ignored - the calls cannot fail,
 574          * large pages are disabled at boot time:
 575          */
 576         if (enable)
 577                 __set_pages_p(page, numpages);
 578         else
 579                 __set_pages_np(page, numpages);
 580
 581         /*
 582          * We should perform an IPI and flush all tlbs,
 583          * but that can deadlock->flush only current cpu:
 584          */
 585         __flush_tlb_all();
 586 }
 587 #endif
 588
 589 /*
 590  * The testcases use internal knowledge of the implementation that shouldn't
 591  * be exposed to the rest of the kernel. Include these directly here.
 592  */
 593 #ifdef CONFIG_CPA_DEBUG
 594 #include "pageattr-test.c"
 595 #endif