2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
33 within(unsigned long addr, unsigned long start, unsigned long end)
35 return addr >= start && addr < end;
43 * clflush_cache_range - flush a cache range with clflush
44 * @addr: virtual start address
45 * @size: number of bytes to flush
47 * clflush is an unordered instruction which needs fencing with mfence
48 * to avoid ordering issues.
50 void clflush_cache_range(void *vaddr, unsigned int size)
52 void *vend = vaddr + size - 1;
56 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
59 * Flush any possible final partial cacheline:
66 static void __cpa_flush_all(void *arg)
68 unsigned long cache = (unsigned long)arg;
71 * Flush all to work around Errata in early athlons regarding
72 * large page flushing.
76 if (cache && boot_cpu_data.x86_model >= 4)
80 static void cpa_flush_all(unsigned long cache)
82 BUG_ON(irqs_disabled());
84 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
87 static void __cpa_flush_range(void *arg)
90 * We could optimize that further and do individual per page
91 * tlb invalidates for a low number of pages. Caveat: we must
92 * flush the high aliases on 64bit as well.
97 static void cpa_flush_range(unsigned long start, int numpages, int cache)
99 unsigned int i, level;
102 BUG_ON(irqs_disabled());
103 WARN_ON(PAGE_ALIGN(start) != start);
105 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
111 * We only need to flush on one CPU,
112 * clflush is a MESI-coherent instruction that
113 * will cause all other CPUs to flush the same
116 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
117 pte_t *pte = lookup_address(addr, &level);
120 * Only flush present addresses:
122 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
123 clflush_cache_range((void *) addr, PAGE_SIZE);
127 #define HIGH_MAP_START __START_KERNEL_map
128 #define HIGH_MAP_END (__START_KERNEL_map + KERNEL_TEXT_SIZE)
132 * Converts a virtual address to a X86-64 highmap address
134 static unsigned long virt_to_highmap(void *address)
137 return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
139 return (unsigned long)address;
144 * Certain areas of memory on x86 require very specific protection flags,
145 * for example the BIOS area or kernel text. Callers don't always get this
146 * right (again, ioremap() on BIOS memory is not uncommon) so this function
147 * checks and fixes these known static required protection bits.
149 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
151 pgprot_t forbidden = __pgprot(0);
154 * The BIOS area between 640k and 1Mb needs to be executable for
155 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
157 if (within(__pa(address), BIOS_BEGIN, BIOS_END))
158 pgprot_val(forbidden) |= _PAGE_NX;
161 * The kernel text needs to be executable for obvious reasons
162 * Does not cover __inittext since that is gone later on
164 if (within(address, (unsigned long)_text, (unsigned long)_etext))
165 pgprot_val(forbidden) |= _PAGE_NX;
167 * Do the same for the x86-64 high kernel mapping
169 if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
170 pgprot_val(forbidden) |= _PAGE_NX;
173 #ifdef CONFIG_DEBUG_RODATA
174 /* The .rodata section needs to be read-only */
175 if (within(address, (unsigned long)__start_rodata,
176 (unsigned long)__end_rodata))
177 pgprot_val(forbidden) |= _PAGE_RW;
179 * Do the same for the x86-64 high kernel mapping
181 if (within(address, virt_to_highmap(__start_rodata),
182 virt_to_highmap(__end_rodata)))
183 pgprot_val(forbidden) |= _PAGE_RW;
186 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
192 * Lookup the page table entry for a virtual address. Return a pointer
193 * to the entry and the level of the mapping.
195 * Note: We return pud and pmd either when the entry is marked large
196 * or when the present bit is not set. Otherwise we would return a
197 * pointer to a nonexisting mapping.
199 pte_t *lookup_address(unsigned long address, int *level)
201 pgd_t *pgd = pgd_offset_k(address);
205 *level = PG_LEVEL_NONE;
209 pud = pud_offset(pgd, address);
213 *level = PG_LEVEL_1G;
214 if (pud_large(*pud) || !pud_present(*pud))
217 pmd = pmd_offset(pud, address);
221 *level = PG_LEVEL_2M;
222 if (pmd_large(*pmd) || !pmd_present(*pmd))
225 *level = PG_LEVEL_4K;
226 return pte_offset_kernel(pmd, address);
229 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
232 set_pte_atomic(kpte, pte);
234 if (!SHARED_KERNEL_PMD) {
237 list_for_each_entry(page, &pgd_list, lru) {
242 pgd = (pgd_t *)page_address(page) + pgd_index(address);
243 pud = pud_offset(pgd, address);
244 pmd = pmd_offset(pud, address);
245 set_pte_atomic((pte_t *)pmd, pte);
251 static int try_preserve_large_page(pte_t *kpte, unsigned long address,
252 struct cpa_data *cpa)
254 unsigned long nextpage_addr, numpages, pmask, psize, flags;
255 pte_t new_pte, old_pte, *tmp;
256 pgprot_t old_prot, new_prot;
257 int level, res = CPA_SPLIT;
260 * An Athlon 64 X2 showed hard hangs if we tried to preserve
261 * largepages and changed the PSE entry from RW to RO.
263 * As AMD CPUs have a long series of erratas in this area,
264 * (and none of the known ones seem to explain this hang),
265 * disable this code until the hang can be debugged:
267 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
270 spin_lock_irqsave(&pgd_lock, flags);
272 * Check for races, another CPU might have split this page
275 tmp = lookup_address(address, &level);
281 psize = PMD_PAGE_SIZE;
282 pmask = PMD_PAGE_MASK;
286 psize = PMD_PAGE_SIZE;
287 pmask = PMD_PAGE_MASK;
296 * Calculate the number of pages, which fit into this large
297 * page starting at address:
299 nextpage_addr = (address + psize) & pmask;
300 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
301 if (numpages < cpa->numpages)
302 cpa->numpages = numpages;
305 * We are safe now. Check whether the new pgprot is the same:
308 old_prot = new_prot = pte_pgprot(old_pte);
310 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
311 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
312 new_prot = static_protections(new_prot, address);
315 * If there are no changes, return. maxpages has been updated
318 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
324 * We need to change the attributes. Check, whether we can
325 * change the large page in one go. We request a split, when
326 * the address is not aligned and the number of pages is
327 * smaller than the number of pages in the large page. Note
328 * that we limited the number of possible pages already to
329 * the number of pages in the large page.
331 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
333 * The address is aligned and the number of pages
334 * covers the full page.
336 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
337 __set_pmd_pte(kpte, address, new_pte);
343 spin_unlock_irqrestore(&pgd_lock, flags);
347 static int split_large_page(pte_t *kpte, unsigned long address)
350 gfp_t gfp_flags = GFP_KERNEL;
351 unsigned long flags, addr, pfn, pfninc = 1;
354 unsigned int i, level;
356 #ifdef CONFIG_DEBUG_PAGEALLOC
357 gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
359 base = alloc_pages(gfp_flags, 0);
363 spin_lock_irqsave(&pgd_lock, flags);
365 * Check for races, another CPU might have split this page
368 tmp = lookup_address(address, &level);
372 address = __pa(address);
373 addr = address & PMD_PAGE_MASK;
374 pbase = (pte_t *)page_address(base);
376 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
378 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
381 if (level == PG_LEVEL_1G) {
382 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
383 pgprot_val(ref_prot) |= _PAGE_PSE;
384 addr &= PUD_PAGE_MASK;
389 * Get the target pfn from the original entry:
391 pfn = pte_pfn(*kpte);
392 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
393 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
396 * Install the new, split up pagetable. Important details here:
398 * On Intel the NX bit of all levels must be cleared to make a
399 * page executable. See section 4.13.2 of Intel 64 and IA-32
400 * Architectures Software Developer's Manual).
402 * Mark the entry present. The current mapping might be
403 * set to not present, which we preserved above.
405 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
406 pgprot_val(ref_prot) |= _PAGE_PRESENT;
407 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
411 spin_unlock_irqrestore(&pgd_lock, flags);
414 __free_pages(base, 0);
419 static int __change_page_attr(unsigned long address, struct cpa_data *cpa)
421 struct page *kpte_page;
426 kpte = lookup_address(address, &level);
430 kpte_page = virt_to_page(kpte);
431 BUG_ON(PageLRU(kpte_page));
432 BUG_ON(PageCompound(kpte_page));
434 if (level == PG_LEVEL_4K) {
435 pte_t new_pte, old_pte = *kpte;
436 pgprot_t new_prot = pte_pgprot(old_pte);
438 if(!pte_val(old_pte)) {
439 printk(KERN_WARNING "CPA: called for zero pte. "
440 "vaddr = %lx cpa->vaddr = %lx\n", address,
446 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
447 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
449 new_prot = static_protections(new_prot, address);
452 * We need to keep the pfn from the existing PTE,
453 * after all we're only going to change it's attributes
454 * not the memory it points to
456 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
459 * Do we really change anything ?
461 if (pte_val(old_pte) != pte_val(new_pte)) {
462 set_pte_atomic(kpte, new_pte);
470 * Check, whether we can keep the large page intact
471 * and just change the pte:
473 res = try_preserve_large_page(kpte, address, cpa);
478 * When the range fits into the existing large page,
479 * return. cp->numpages and cpa->tlbflush have been updated in
482 if (res == CPA_NO_SPLIT)
486 * We have to split the large page:
488 res = split_large_page(kpte, address);
496 * change_page_attr_addr - Change page table attributes in linear mapping
497 * @address: Virtual address in linear mapping.
498 * @prot: New page table attribute (PAGE_*)
500 * Change page attributes of a page in the direct mapping. This is a variant
501 * of change_page_attr() that also works on memory holes that do not have
502 * mem_map entry (pfn_valid() is false).
504 * See change_page_attr() documentation for more details.
506 * Modules and drivers should use the set_memory_* APIs instead.
509 static int change_page_attr_addr(struct cpa_data *cpa)
512 unsigned long address = cpa->vaddr;
515 unsigned long phys_addr = __pa(address);
518 * If we are inside the high mapped kernel range, then we
519 * fixup the low mapping first. __va() returns the virtual
520 * address in the linear mapping:
522 if (within(address, HIGH_MAP_START, HIGH_MAP_END))
523 address = (unsigned long) __va(phys_addr);
526 err = __change_page_attr(address, cpa);
532 * If the physical address is inside the kernel map, we need
533 * to touch the high mapped kernel as well:
535 if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
537 * Calc the high mapping address. See __phys_addr()
538 * for the non obvious details.
540 * Note that NX and other required permissions are
541 * checked in static_protections().
543 address = phys_addr + HIGH_MAP_START - phys_base;
546 * Our high aliases are imprecise, because we check
547 * everything between 0 and KERNEL_TEXT_SIZE, so do
548 * not propagate lookup failures back to users:
550 __change_page_attr(address, cpa);
556 static int __change_page_attr_set_clr(struct cpa_data *cpa)
558 int ret, numpages = cpa->numpages;
562 * Store the remaining nr of pages for the large page
563 * preservation check.
565 cpa->numpages = numpages;
566 ret = change_page_attr_addr(cpa);
571 * Adjust the number of pages with the result of the
572 * CPA operation. Either a large page has been
573 * preserved or a single page update happened.
575 BUG_ON(cpa->numpages > numpages);
576 numpages -= cpa->numpages;
577 cpa->vaddr += cpa->numpages * PAGE_SIZE;
582 static inline int cache_attr(pgprot_t attr)
584 return pgprot_val(attr) &
585 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
588 static int change_page_attr_set_clr(unsigned long addr, int numpages,
589 pgprot_t mask_set, pgprot_t mask_clr)
595 * Check, if we are requested to change a not supported
598 mask_set = canon_pgprot(mask_set);
599 mask_clr = canon_pgprot(mask_clr);
600 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
604 cpa.numpages = numpages;
605 cpa.mask_set = mask_set;
606 cpa.mask_clr = mask_clr;
609 ret = __change_page_attr_set_clr(&cpa);
612 * Check whether we really changed something:
618 * No need to flush, when we did not set any of the caching
621 cache = cache_attr(mask_set);
624 * On success we use clflush, when the CPU supports it to
625 * avoid the wbindv. If the CPU does not support it and in the
626 * error case we fall back to cpa_flush_all (which uses
629 if (!ret && cpu_has_clflush)
630 cpa_flush_range(addr, numpages, cache);
632 cpa_flush_all(cache);
637 static inline int change_page_attr_set(unsigned long addr, int numpages,
640 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
643 static inline int change_page_attr_clear(unsigned long addr, int numpages,
646 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
649 int set_memory_uc(unsigned long addr, int numpages)
651 return change_page_attr_set(addr, numpages,
652 __pgprot(_PAGE_PCD | _PAGE_PWT));
654 EXPORT_SYMBOL(set_memory_uc);
656 int set_memory_wb(unsigned long addr, int numpages)
658 return change_page_attr_clear(addr, numpages,
659 __pgprot(_PAGE_PCD | _PAGE_PWT));
661 EXPORT_SYMBOL(set_memory_wb);
663 int set_memory_x(unsigned long addr, int numpages)
665 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
667 EXPORT_SYMBOL(set_memory_x);
669 int set_memory_nx(unsigned long addr, int numpages)
671 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
673 EXPORT_SYMBOL(set_memory_nx);
675 int set_memory_ro(unsigned long addr, int numpages)
677 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
680 int set_memory_rw(unsigned long addr, int numpages)
682 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
685 int set_memory_np(unsigned long addr, int numpages)
687 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
690 int set_pages_uc(struct page *page, int numpages)
692 unsigned long addr = (unsigned long)page_address(page);
694 return set_memory_uc(addr, numpages);
696 EXPORT_SYMBOL(set_pages_uc);
698 int set_pages_wb(struct page *page, int numpages)
700 unsigned long addr = (unsigned long)page_address(page);
702 return set_memory_wb(addr, numpages);
704 EXPORT_SYMBOL(set_pages_wb);
706 int set_pages_x(struct page *page, int numpages)
708 unsigned long addr = (unsigned long)page_address(page);
710 return set_memory_x(addr, numpages);
712 EXPORT_SYMBOL(set_pages_x);
714 int set_pages_nx(struct page *page, int numpages)
716 unsigned long addr = (unsigned long)page_address(page);
718 return set_memory_nx(addr, numpages);
720 EXPORT_SYMBOL(set_pages_nx);
722 int set_pages_ro(struct page *page, int numpages)
724 unsigned long addr = (unsigned long)page_address(page);
726 return set_memory_ro(addr, numpages);
729 int set_pages_rw(struct page *page, int numpages)
731 unsigned long addr = (unsigned long)page_address(page);
733 return set_memory_rw(addr, numpages);
736 #ifdef CONFIG_DEBUG_PAGEALLOC
738 static int __set_pages_p(struct page *page, int numpages)
740 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
741 .numpages = numpages,
742 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
743 .mask_clr = __pgprot(0)};
745 return __change_page_attr_set_clr(&cpa);
748 static int __set_pages_np(struct page *page, int numpages)
750 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
751 .numpages = numpages,
752 .mask_set = __pgprot(0),
753 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
755 return __change_page_attr_set_clr(&cpa);
758 void kernel_map_pages(struct page *page, int numpages, int enable)
760 if (PageHighMem(page))
763 debug_check_no_locks_freed(page_address(page),
764 numpages * PAGE_SIZE);
768 * If page allocator is not up yet then do not call c_p_a():
770 if (!debug_pagealloc_enabled)
774 * The return value is ignored - the calls cannot fail,
775 * large pages are disabled at boot time:
778 __set_pages_p(page, numpages);
780 __set_pages_np(page, numpages);
783 * We should perform an IPI and flush all tlbs,
784 * but that can deadlock->flush only current cpu:
791 * The testcases use internal knowledge of the implementation that shouldn't
792 * be exposed to the rest of the kernel. Include these directly here.
794 #ifdef CONFIG_CPA_DEBUG
795 #include "pageattr-test.c"