2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/pci.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
39 #include <asm/uaccess.h>
43 #define MAX_IO_MSRS 256
44 #define CR0_RESERVED_BITS \
45 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
46 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
47 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
48 #define CR4_RESERVED_BITS \
49 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
50 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
51 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
52 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
54 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
56 * - enable syscall per default because its emulated by KVM
57 * - enable LME and LMA per default on 64 bit KVM
60 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
62 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
65 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
66 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
68 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
69 struct kvm_cpuid_entry2 __user *entries);
71 struct kvm_x86_ops *kvm_x86_ops;
72 EXPORT_SYMBOL_GPL(kvm_x86_ops);
74 struct kvm_stats_debugfs_item debugfs_entries[] = {
75 { "pf_fixed", VCPU_STAT(pf_fixed) },
76 { "pf_guest", VCPU_STAT(pf_guest) },
77 { "tlb_flush", VCPU_STAT(tlb_flush) },
78 { "invlpg", VCPU_STAT(invlpg) },
79 { "exits", VCPU_STAT(exits) },
80 { "io_exits", VCPU_STAT(io_exits) },
81 { "mmio_exits", VCPU_STAT(mmio_exits) },
82 { "signal_exits", VCPU_STAT(signal_exits) },
83 { "irq_window", VCPU_STAT(irq_window_exits) },
84 { "nmi_window", VCPU_STAT(nmi_window_exits) },
85 { "halt_exits", VCPU_STAT(halt_exits) },
86 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
87 { "hypercalls", VCPU_STAT(hypercalls) },
88 { "request_irq", VCPU_STAT(request_irq_exits) },
89 { "irq_exits", VCPU_STAT(irq_exits) },
90 { "host_state_reload", VCPU_STAT(host_state_reload) },
91 { "efer_reload", VCPU_STAT(efer_reload) },
92 { "fpu_reload", VCPU_STAT(fpu_reload) },
93 { "insn_emulation", VCPU_STAT(insn_emulation) },
94 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
95 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
96 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
97 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
98 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
99 { "mmu_flooded", VM_STAT(mmu_flooded) },
100 { "mmu_recycled", VM_STAT(mmu_recycled) },
101 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
102 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
103 { "largepages", VM_STAT(lpages) },
107 static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
110 struct list_head *ptr;
111 struct kvm_assigned_dev_kernel *match;
113 list_for_each(ptr, head) {
114 match = list_entry(ptr, struct kvm_assigned_dev_kernel, list);
115 if (match->assigned_dev_id == assigned_dev_id)
121 static void kvm_assigned_dev_interrupt_work_handler(struct work_struct *work)
123 struct kvm_assigned_dev_kernel *assigned_dev;
125 assigned_dev = container_of(work, struct kvm_assigned_dev_kernel,
128 /* This is taken to safely inject irq inside the guest. When
129 * the interrupt injection (or the ioapic code) uses a
130 * finer-grained lock, update this
132 mutex_lock(&assigned_dev->kvm->lock);
133 kvm_set_irq(assigned_dev->kvm,
134 assigned_dev->guest_irq, 1);
135 mutex_unlock(&assigned_dev->kvm->lock);
136 kvm_put_kvm(assigned_dev->kvm);
139 /* FIXME: Implement the OR logic needed to make shared interrupts on
140 * this line behave properly
142 static irqreturn_t kvm_assigned_dev_intr(int irq, void *dev_id)
144 struct kvm_assigned_dev_kernel *assigned_dev =
145 (struct kvm_assigned_dev_kernel *) dev_id;
147 kvm_get_kvm(assigned_dev->kvm);
148 schedule_work(&assigned_dev->interrupt_work);
149 disable_irq_nosync(irq);
153 /* Ack the irq line for an assigned device */
154 static void kvm_assigned_dev_ack_irq(struct kvm_irq_ack_notifier *kian)
156 struct kvm_assigned_dev_kernel *dev;
161 dev = container_of(kian, struct kvm_assigned_dev_kernel,
163 kvm_set_irq(dev->kvm, dev->guest_irq, 0);
164 enable_irq(dev->host_irq);
167 static int kvm_vm_ioctl_assign_irq(struct kvm *kvm,
168 struct kvm_assigned_irq
172 struct kvm_assigned_dev_kernel *match;
174 mutex_lock(&kvm->lock);
176 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
177 assigned_irq->assigned_dev_id);
179 mutex_unlock(&kvm->lock);
183 if (match->irq_requested) {
184 match->guest_irq = assigned_irq->guest_irq;
185 match->ack_notifier.gsi = assigned_irq->guest_irq;
186 mutex_unlock(&kvm->lock);
190 INIT_WORK(&match->interrupt_work,
191 kvm_assigned_dev_interrupt_work_handler);
193 if (irqchip_in_kernel(kvm)) {
194 if (!capable(CAP_SYS_RAWIO)) {
199 if (assigned_irq->host_irq)
200 match->host_irq = assigned_irq->host_irq;
202 match->host_irq = match->dev->irq;
203 match->guest_irq = assigned_irq->guest_irq;
204 match->ack_notifier.gsi = assigned_irq->guest_irq;
205 match->ack_notifier.irq_acked = kvm_assigned_dev_ack_irq;
206 kvm_register_irq_ack_notifier(kvm, &match->ack_notifier);
208 /* Even though this is PCI, we don't want to use shared
209 * interrupts. Sharing host devices with guest-assigned devices
210 * on the same interrupt line is not a happy situation: there
211 * are going to be long delays in accepting, acking, etc.
213 if (request_irq(match->host_irq, kvm_assigned_dev_intr, 0,
214 "kvm_assigned_device", (void *)match)) {
215 printk(KERN_INFO "%s: couldn't allocate irq for pv "
216 "device\n", __func__);
222 match->irq_requested = true;
224 mutex_unlock(&kvm->lock);
228 static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
229 struct kvm_assigned_pci_dev *assigned_dev)
232 struct kvm_assigned_dev_kernel *match;
235 mutex_lock(&kvm->lock);
237 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
238 assigned_dev->assigned_dev_id);
240 /* device already assigned */
245 match = kzalloc(sizeof(struct kvm_assigned_dev_kernel), GFP_KERNEL);
247 printk(KERN_INFO "%s: Couldn't allocate memory\n",
252 dev = pci_get_bus_and_slot(assigned_dev->busnr,
253 assigned_dev->devfn);
255 printk(KERN_INFO "%s: host device not found\n", __func__);
259 if (pci_enable_device(dev)) {
260 printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
264 r = pci_request_regions(dev, "kvm_assigned_device");
266 printk(KERN_INFO "%s: Could not get access to device regions\n",
270 match->assigned_dev_id = assigned_dev->assigned_dev_id;
271 match->host_busnr = assigned_dev->busnr;
272 match->host_devfn = assigned_dev->devfn;
277 list_add(&match->list, &kvm->arch.assigned_dev_head);
280 mutex_unlock(&kvm->lock);
283 pci_disable_device(dev);
288 mutex_unlock(&kvm->lock);
292 static void kvm_free_assigned_devices(struct kvm *kvm)
294 struct list_head *ptr, *ptr2;
295 struct kvm_assigned_dev_kernel *assigned_dev;
297 list_for_each_safe(ptr, ptr2, &kvm->arch.assigned_dev_head) {
298 assigned_dev = list_entry(ptr,
299 struct kvm_assigned_dev_kernel,
302 if (irqchip_in_kernel(kvm) && assigned_dev->irq_requested) {
303 free_irq(assigned_dev->host_irq,
304 (void *)assigned_dev);
306 kvm_unregister_irq_ack_notifier(kvm,
311 if (cancel_work_sync(&assigned_dev->interrupt_work))
312 /* We had pending work. That means we will have to take
313 * care of kvm_put_kvm.
317 pci_release_regions(assigned_dev->dev);
318 pci_disable_device(assigned_dev->dev);
319 pci_dev_put(assigned_dev->dev);
321 list_del(&assigned_dev->list);
326 unsigned long segment_base(u16 selector)
328 struct descriptor_table gdt;
329 struct desc_struct *d;
330 unsigned long table_base;
336 asm("sgdt %0" : "=m"(gdt));
337 table_base = gdt.base;
339 if (selector & 4) { /* from ldt */
342 asm("sldt %0" : "=g"(ldt_selector));
343 table_base = segment_base(ldt_selector);
345 d = (struct desc_struct *)(table_base + (selector & ~7));
346 v = d->base0 | ((unsigned long)d->base1 << 16) |
347 ((unsigned long)d->base2 << 24);
349 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
350 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
354 EXPORT_SYMBOL_GPL(segment_base);
356 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
358 if (irqchip_in_kernel(vcpu->kvm))
359 return vcpu->arch.apic_base;
361 return vcpu->arch.apic_base;
363 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
365 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
367 /* TODO: reserve bits check */
368 if (irqchip_in_kernel(vcpu->kvm))
369 kvm_lapic_set_base(vcpu, data);
371 vcpu->arch.apic_base = data;
373 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
375 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
377 WARN_ON(vcpu->arch.exception.pending);
378 vcpu->arch.exception.pending = true;
379 vcpu->arch.exception.has_error_code = false;
380 vcpu->arch.exception.nr = nr;
382 EXPORT_SYMBOL_GPL(kvm_queue_exception);
384 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
387 ++vcpu->stat.pf_guest;
388 if (vcpu->arch.exception.pending) {
389 if (vcpu->arch.exception.nr == PF_VECTOR) {
390 printk(KERN_DEBUG "kvm: inject_page_fault:"
391 " double fault 0x%lx\n", addr);
392 vcpu->arch.exception.nr = DF_VECTOR;
393 vcpu->arch.exception.error_code = 0;
394 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
395 /* triple fault -> shutdown */
396 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
400 vcpu->arch.cr2 = addr;
401 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
404 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
406 vcpu->arch.nmi_pending = 1;
408 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
410 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
412 WARN_ON(vcpu->arch.exception.pending);
413 vcpu->arch.exception.pending = true;
414 vcpu->arch.exception.has_error_code = true;
415 vcpu->arch.exception.nr = nr;
416 vcpu->arch.exception.error_code = error_code;
418 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
420 static void __queue_exception(struct kvm_vcpu *vcpu)
422 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
423 vcpu->arch.exception.has_error_code,
424 vcpu->arch.exception.error_code);
428 * Load the pae pdptrs. Return true is they are all valid.
430 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
432 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
433 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
436 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
438 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
439 offset * sizeof(u64), sizeof(pdpte));
444 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
445 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
452 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
457 EXPORT_SYMBOL_GPL(load_pdptrs);
459 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
461 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
465 if (is_long_mode(vcpu) || !is_pae(vcpu))
468 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
471 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
477 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
479 if (cr0 & CR0_RESERVED_BITS) {
480 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
481 cr0, vcpu->arch.cr0);
482 kvm_inject_gp(vcpu, 0);
486 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
487 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
488 kvm_inject_gp(vcpu, 0);
492 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
493 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
494 "and a clear PE flag\n");
495 kvm_inject_gp(vcpu, 0);
499 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
501 if ((vcpu->arch.shadow_efer & EFER_LME)) {
505 printk(KERN_DEBUG "set_cr0: #GP, start paging "
506 "in long mode while PAE is disabled\n");
507 kvm_inject_gp(vcpu, 0);
510 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
512 printk(KERN_DEBUG "set_cr0: #GP, start paging "
513 "in long mode while CS.L == 1\n");
514 kvm_inject_gp(vcpu, 0);
520 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
521 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
523 kvm_inject_gp(vcpu, 0);
529 kvm_x86_ops->set_cr0(vcpu, cr0);
530 vcpu->arch.cr0 = cr0;
532 kvm_mmu_reset_context(vcpu);
535 EXPORT_SYMBOL_GPL(kvm_set_cr0);
537 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
539 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
540 KVMTRACE_1D(LMSW, vcpu,
541 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
544 EXPORT_SYMBOL_GPL(kvm_lmsw);
546 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
548 if (cr4 & CR4_RESERVED_BITS) {
549 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
550 kvm_inject_gp(vcpu, 0);
554 if (is_long_mode(vcpu)) {
555 if (!(cr4 & X86_CR4_PAE)) {
556 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
558 kvm_inject_gp(vcpu, 0);
561 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
562 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
563 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
564 kvm_inject_gp(vcpu, 0);
568 if (cr4 & X86_CR4_VMXE) {
569 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
570 kvm_inject_gp(vcpu, 0);
573 kvm_x86_ops->set_cr4(vcpu, cr4);
574 vcpu->arch.cr4 = cr4;
575 kvm_mmu_reset_context(vcpu);
577 EXPORT_SYMBOL_GPL(kvm_set_cr4);
579 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
581 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
582 kvm_mmu_flush_tlb(vcpu);
586 if (is_long_mode(vcpu)) {
587 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
588 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
589 kvm_inject_gp(vcpu, 0);
594 if (cr3 & CR3_PAE_RESERVED_BITS) {
596 "set_cr3: #GP, reserved bits\n");
597 kvm_inject_gp(vcpu, 0);
600 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
601 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
603 kvm_inject_gp(vcpu, 0);
608 * We don't check reserved bits in nonpae mode, because
609 * this isn't enforced, and VMware depends on this.
614 * Does the new cr3 value map to physical memory? (Note, we
615 * catch an invalid cr3 even in real-mode, because it would
616 * cause trouble later on when we turn on paging anyway.)
618 * A real CPU would silently accept an invalid cr3 and would
619 * attempt to use it - with largely undefined (and often hard
620 * to debug) behavior on the guest side.
622 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
623 kvm_inject_gp(vcpu, 0);
625 vcpu->arch.cr3 = cr3;
626 vcpu->arch.mmu.new_cr3(vcpu);
629 EXPORT_SYMBOL_GPL(kvm_set_cr3);
631 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
633 if (cr8 & CR8_RESERVED_BITS) {
634 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
635 kvm_inject_gp(vcpu, 0);
638 if (irqchip_in_kernel(vcpu->kvm))
639 kvm_lapic_set_tpr(vcpu, cr8);
641 vcpu->arch.cr8 = cr8;
643 EXPORT_SYMBOL_GPL(kvm_set_cr8);
645 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
647 if (irqchip_in_kernel(vcpu->kvm))
648 return kvm_lapic_get_cr8(vcpu);
650 return vcpu->arch.cr8;
652 EXPORT_SYMBOL_GPL(kvm_get_cr8);
655 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
656 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
658 * This list is modified at module load time to reflect the
659 * capabilities of the host cpu.
661 static u32 msrs_to_save[] = {
662 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
665 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
667 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
668 MSR_IA32_PERF_STATUS,
671 static unsigned num_msrs_to_save;
673 static u32 emulated_msrs[] = {
674 MSR_IA32_MISC_ENABLE,
677 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
679 if (efer & efer_reserved_bits) {
680 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
682 kvm_inject_gp(vcpu, 0);
687 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
688 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
689 kvm_inject_gp(vcpu, 0);
693 kvm_x86_ops->set_efer(vcpu, efer);
696 efer |= vcpu->arch.shadow_efer & EFER_LMA;
698 vcpu->arch.shadow_efer = efer;
701 void kvm_enable_efer_bits(u64 mask)
703 efer_reserved_bits &= ~mask;
705 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
709 * Writes msr value into into the appropriate "register".
710 * Returns 0 on success, non-0 otherwise.
711 * Assumes vcpu_load() was already called.
713 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
715 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
719 * Adapt set_msr() to msr_io()'s calling convention
721 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
723 return kvm_set_msr(vcpu, index, *data);
726 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
729 struct pvclock_wall_clock wc;
730 struct timespec now, sys, boot;
737 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
740 * The guest calculates current wall clock time by adding
741 * system time (updated by kvm_write_guest_time below) to the
742 * wall clock specified here. guest system time equals host
743 * system time for us, thus we must fill in host boot time here.
745 now = current_kernel_time();
747 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
749 wc.sec = boot.tv_sec;
750 wc.nsec = boot.tv_nsec;
751 wc.version = version;
753 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
756 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
759 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
761 uint32_t quotient, remainder;
763 /* Don't try to replace with do_div(), this one calculates
764 * "(dividend << 32) / divisor" */
766 : "=a" (quotient), "=d" (remainder)
767 : "0" (0), "1" (dividend), "r" (divisor) );
771 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
773 uint64_t nsecs = 1000000000LL;
778 tps64 = tsc_khz * 1000LL;
779 while (tps64 > nsecs*2) {
784 tps32 = (uint32_t)tps64;
785 while (tps32 <= (uint32_t)nsecs) {
790 hv_clock->tsc_shift = shift;
791 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
793 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
794 __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
795 hv_clock->tsc_to_system_mul);
798 static void kvm_write_guest_time(struct kvm_vcpu *v)
802 struct kvm_vcpu_arch *vcpu = &v->arch;
805 if ((!vcpu->time_page))
808 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
809 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
810 vcpu->hv_clock_tsc_khz = tsc_khz;
813 /* Keep irq disabled to prevent changes to the clock */
814 local_irq_save(flags);
815 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
816 &vcpu->hv_clock.tsc_timestamp);
818 local_irq_restore(flags);
820 /* With all the info we got, fill in the values */
822 vcpu->hv_clock.system_time = ts.tv_nsec +
823 (NSEC_PER_SEC * (u64)ts.tv_sec);
825 * The interface expects us to write an even number signaling that the
826 * update is finished. Since the guest won't see the intermediate
827 * state, we just increase by 2 at the end.
829 vcpu->hv_clock.version += 2;
831 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
833 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
834 sizeof(vcpu->hv_clock));
836 kunmap_atomic(shared_kaddr, KM_USER0);
838 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
841 static bool msr_mtrr_valid(unsigned msr)
844 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
845 case MSR_MTRRfix64K_00000:
846 case MSR_MTRRfix16K_80000:
847 case MSR_MTRRfix16K_A0000:
848 case MSR_MTRRfix4K_C0000:
849 case MSR_MTRRfix4K_C8000:
850 case MSR_MTRRfix4K_D0000:
851 case MSR_MTRRfix4K_D8000:
852 case MSR_MTRRfix4K_E0000:
853 case MSR_MTRRfix4K_E8000:
854 case MSR_MTRRfix4K_F0000:
855 case MSR_MTRRfix4K_F8000:
856 case MSR_MTRRdefType:
857 case MSR_IA32_CR_PAT:
865 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
867 if (!msr_mtrr_valid(msr))
870 vcpu->arch.mtrr[msr - 0x200] = data;
874 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
878 set_efer(vcpu, data);
880 case MSR_IA32_MC0_STATUS:
881 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
884 case MSR_IA32_MCG_STATUS:
885 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
888 case MSR_IA32_MCG_CTL:
889 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
892 case MSR_IA32_DEBUGCTLMSR:
894 /* We support the non-activated case already */
896 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
897 /* Values other than LBR and BTF are vendor-specific,
898 thus reserved and should throw a #GP */
901 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
904 case MSR_IA32_UCODE_REV:
905 case MSR_IA32_UCODE_WRITE:
907 case 0x200 ... 0x2ff:
908 return set_msr_mtrr(vcpu, msr, data);
909 case MSR_IA32_APICBASE:
910 kvm_set_apic_base(vcpu, data);
912 case MSR_IA32_MISC_ENABLE:
913 vcpu->arch.ia32_misc_enable_msr = data;
915 case MSR_KVM_WALL_CLOCK:
916 vcpu->kvm->arch.wall_clock = data;
917 kvm_write_wall_clock(vcpu->kvm, data);
919 case MSR_KVM_SYSTEM_TIME: {
920 if (vcpu->arch.time_page) {
921 kvm_release_page_dirty(vcpu->arch.time_page);
922 vcpu->arch.time_page = NULL;
925 vcpu->arch.time = data;
927 /* we verify if the enable bit is set... */
931 /* ...but clean it before doing the actual write */
932 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
934 down_read(¤t->mm->mmap_sem);
935 vcpu->arch.time_page =
936 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
937 up_read(¤t->mm->mmap_sem);
939 if (is_error_page(vcpu->arch.time_page)) {
940 kvm_release_page_clean(vcpu->arch.time_page);
941 vcpu->arch.time_page = NULL;
944 kvm_write_guest_time(vcpu);
948 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
953 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
957 * Reads an msr value (of 'msr_index') into 'pdata'.
958 * Returns 0 on success, non-0 otherwise.
959 * Assumes vcpu_load() was already called.
961 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
963 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
966 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
968 if (!msr_mtrr_valid(msr))
971 *pdata = vcpu->arch.mtrr[msr - 0x200];
975 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
980 case 0xc0010010: /* SYSCFG */
981 case 0xc0010015: /* HWCR */
982 case MSR_IA32_PLATFORM_ID:
983 case MSR_IA32_P5_MC_ADDR:
984 case MSR_IA32_P5_MC_TYPE:
985 case MSR_IA32_MC0_CTL:
986 case MSR_IA32_MCG_STATUS:
987 case MSR_IA32_MCG_CAP:
988 case MSR_IA32_MCG_CTL:
989 case MSR_IA32_MC0_MISC:
990 case MSR_IA32_MC0_MISC+4:
991 case MSR_IA32_MC0_MISC+8:
992 case MSR_IA32_MC0_MISC+12:
993 case MSR_IA32_MC0_MISC+16:
994 case MSR_IA32_MC0_MISC+20:
995 case MSR_IA32_UCODE_REV:
996 case MSR_IA32_EBL_CR_POWERON:
997 case MSR_IA32_DEBUGCTLMSR:
998 case MSR_IA32_LASTBRANCHFROMIP:
999 case MSR_IA32_LASTBRANCHTOIP:
1000 case MSR_IA32_LASTINTFROMIP:
1001 case MSR_IA32_LASTINTTOIP:
1005 data = 0x500 | KVM_NR_VAR_MTRR;
1007 case 0x200 ... 0x2ff:
1008 return get_msr_mtrr(vcpu, msr, pdata);
1009 case 0xcd: /* fsb frequency */
1012 case MSR_IA32_APICBASE:
1013 data = kvm_get_apic_base(vcpu);
1015 case MSR_IA32_MISC_ENABLE:
1016 data = vcpu->arch.ia32_misc_enable_msr;
1018 case MSR_IA32_PERF_STATUS:
1019 /* TSC increment by tick */
1021 /* CPU multiplier */
1022 data |= (((uint64_t)4ULL) << 40);
1025 data = vcpu->arch.shadow_efer;
1027 case MSR_KVM_WALL_CLOCK:
1028 data = vcpu->kvm->arch.wall_clock;
1030 case MSR_KVM_SYSTEM_TIME:
1031 data = vcpu->arch.time;
1034 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1040 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1043 * Read or write a bunch of msrs. All parameters are kernel addresses.
1045 * @return number of msrs set successfully.
1047 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1048 struct kvm_msr_entry *entries,
1049 int (*do_msr)(struct kvm_vcpu *vcpu,
1050 unsigned index, u64 *data))
1056 down_read(&vcpu->kvm->slots_lock);
1057 for (i = 0; i < msrs->nmsrs; ++i)
1058 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1060 up_read(&vcpu->kvm->slots_lock);
1068 * Read or write a bunch of msrs. Parameters are user addresses.
1070 * @return number of msrs set successfully.
1072 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1073 int (*do_msr)(struct kvm_vcpu *vcpu,
1074 unsigned index, u64 *data),
1077 struct kvm_msrs msrs;
1078 struct kvm_msr_entry *entries;
1083 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1087 if (msrs.nmsrs >= MAX_IO_MSRS)
1091 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1092 entries = vmalloc(size);
1097 if (copy_from_user(entries, user_msrs->entries, size))
1100 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1105 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1116 int kvm_dev_ioctl_check_extension(long ext)
1121 case KVM_CAP_IRQCHIP:
1123 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1124 case KVM_CAP_USER_MEMORY:
1125 case KVM_CAP_SET_TSS_ADDR:
1126 case KVM_CAP_EXT_CPUID:
1127 case KVM_CAP_CLOCKSOURCE:
1129 case KVM_CAP_NOP_IO_DELAY:
1130 case KVM_CAP_MP_STATE:
1131 case KVM_CAP_SYNC_MMU:
1134 case KVM_CAP_COALESCED_MMIO:
1135 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1138 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1140 case KVM_CAP_NR_VCPUS:
1143 case KVM_CAP_NR_MEMSLOTS:
1144 r = KVM_MEMORY_SLOTS;
1146 case KVM_CAP_PV_MMU:
1157 long kvm_arch_dev_ioctl(struct file *filp,
1158 unsigned int ioctl, unsigned long arg)
1160 void __user *argp = (void __user *)arg;
1164 case KVM_GET_MSR_INDEX_LIST: {
1165 struct kvm_msr_list __user *user_msr_list = argp;
1166 struct kvm_msr_list msr_list;
1170 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1173 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1174 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1177 if (n < num_msrs_to_save)
1180 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1181 num_msrs_to_save * sizeof(u32)))
1183 if (copy_to_user(user_msr_list->indices
1184 + num_msrs_to_save * sizeof(u32),
1186 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1191 case KVM_GET_SUPPORTED_CPUID: {
1192 struct kvm_cpuid2 __user *cpuid_arg = argp;
1193 struct kvm_cpuid2 cpuid;
1196 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1198 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1199 cpuid_arg->entries);
1204 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1216 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1218 kvm_x86_ops->vcpu_load(vcpu, cpu);
1219 kvm_write_guest_time(vcpu);
1222 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1224 kvm_x86_ops->vcpu_put(vcpu);
1225 kvm_put_guest_fpu(vcpu);
1228 static int is_efer_nx(void)
1232 rdmsrl(MSR_EFER, efer);
1233 return efer & EFER_NX;
1236 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1239 struct kvm_cpuid_entry2 *e, *entry;
1242 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1243 e = &vcpu->arch.cpuid_entries[i];
1244 if (e->function == 0x80000001) {
1249 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1250 entry->edx &= ~(1 << 20);
1251 printk(KERN_INFO "kvm: guest NX capability removed\n");
1255 /* when an old userspace process fills a new kernel module */
1256 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1257 struct kvm_cpuid *cpuid,
1258 struct kvm_cpuid_entry __user *entries)
1261 struct kvm_cpuid_entry *cpuid_entries;
1264 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1267 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1271 if (copy_from_user(cpuid_entries, entries,
1272 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1274 for (i = 0; i < cpuid->nent; i++) {
1275 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1276 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1277 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1278 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1279 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1280 vcpu->arch.cpuid_entries[i].index = 0;
1281 vcpu->arch.cpuid_entries[i].flags = 0;
1282 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1283 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1284 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1286 vcpu->arch.cpuid_nent = cpuid->nent;
1287 cpuid_fix_nx_cap(vcpu);
1291 vfree(cpuid_entries);
1296 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1297 struct kvm_cpuid2 *cpuid,
1298 struct kvm_cpuid_entry2 __user *entries)
1303 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1306 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1307 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1309 vcpu->arch.cpuid_nent = cpuid->nent;
1316 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1317 struct kvm_cpuid2 *cpuid,
1318 struct kvm_cpuid_entry2 __user *entries)
1323 if (cpuid->nent < vcpu->arch.cpuid_nent)
1326 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1327 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1332 cpuid->nent = vcpu->arch.cpuid_nent;
1336 static inline u32 bit(int bitno)
1338 return 1 << (bitno & 31);
1341 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1344 entry->function = function;
1345 entry->index = index;
1346 cpuid_count(entry->function, entry->index,
1347 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1351 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1352 u32 index, int *nent, int maxnent)
1354 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1355 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1356 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1357 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1358 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1359 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1360 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1361 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1362 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1363 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1364 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1365 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1366 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1367 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1368 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1369 bit(X86_FEATURE_PGE) |
1370 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1371 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1372 bit(X86_FEATURE_SYSCALL) |
1373 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1374 #ifdef CONFIG_X86_64
1375 bit(X86_FEATURE_LM) |
1377 bit(X86_FEATURE_MMXEXT) |
1378 bit(X86_FEATURE_3DNOWEXT) |
1379 bit(X86_FEATURE_3DNOW);
1380 const u32 kvm_supported_word3_x86_features =
1381 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1382 const u32 kvm_supported_word6_x86_features =
1383 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1385 /* all func 2 cpuid_count() should be called on the same cpu */
1387 do_cpuid_1_ent(entry, function, index);
1392 entry->eax = min(entry->eax, (u32)0xb);
1395 entry->edx &= kvm_supported_word0_x86_features;
1396 entry->ecx &= kvm_supported_word3_x86_features;
1398 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1399 * may return different values. This forces us to get_cpu() before
1400 * issuing the first command, and also to emulate this annoying behavior
1401 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1403 int t, times = entry->eax & 0xff;
1405 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1406 for (t = 1; t < times && *nent < maxnent; ++t) {
1407 do_cpuid_1_ent(&entry[t], function, 0);
1408 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1413 /* function 4 and 0xb have additional index. */
1417 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1418 /* read more entries until cache_type is zero */
1419 for (i = 1; *nent < maxnent; ++i) {
1420 cache_type = entry[i - 1].eax & 0x1f;
1423 do_cpuid_1_ent(&entry[i], function, i);
1425 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1433 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1434 /* read more entries until level_type is zero */
1435 for (i = 1; *nent < maxnent; ++i) {
1436 level_type = entry[i - 1].ecx & 0xff;
1439 do_cpuid_1_ent(&entry[i], function, i);
1441 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1447 entry->eax = min(entry->eax, 0x8000001a);
1450 entry->edx &= kvm_supported_word1_x86_features;
1451 entry->ecx &= kvm_supported_word6_x86_features;
1457 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1458 struct kvm_cpuid_entry2 __user *entries)
1460 struct kvm_cpuid_entry2 *cpuid_entries;
1461 int limit, nent = 0, r = -E2BIG;
1464 if (cpuid->nent < 1)
1467 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1471 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1472 limit = cpuid_entries[0].eax;
1473 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1474 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1475 &nent, cpuid->nent);
1477 if (nent >= cpuid->nent)
1480 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1481 limit = cpuid_entries[nent - 1].eax;
1482 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1483 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1484 &nent, cpuid->nent);
1486 if (copy_to_user(entries, cpuid_entries,
1487 nent * sizeof(struct kvm_cpuid_entry2)))
1493 vfree(cpuid_entries);
1498 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1499 struct kvm_lapic_state *s)
1502 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1508 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1509 struct kvm_lapic_state *s)
1512 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1513 kvm_apic_post_state_restore(vcpu);
1519 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1520 struct kvm_interrupt *irq)
1522 if (irq->irq < 0 || irq->irq >= 256)
1524 if (irqchip_in_kernel(vcpu->kvm))
1528 set_bit(irq->irq, vcpu->arch.irq_pending);
1529 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1536 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1537 struct kvm_tpr_access_ctl *tac)
1541 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1545 long kvm_arch_vcpu_ioctl(struct file *filp,
1546 unsigned int ioctl, unsigned long arg)
1548 struct kvm_vcpu *vcpu = filp->private_data;
1549 void __user *argp = (void __user *)arg;
1551 struct kvm_lapic_state *lapic = NULL;
1554 case KVM_GET_LAPIC: {
1555 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1560 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1564 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1569 case KVM_SET_LAPIC: {
1570 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1575 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1577 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1583 case KVM_INTERRUPT: {
1584 struct kvm_interrupt irq;
1587 if (copy_from_user(&irq, argp, sizeof irq))
1589 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1595 case KVM_SET_CPUID: {
1596 struct kvm_cpuid __user *cpuid_arg = argp;
1597 struct kvm_cpuid cpuid;
1600 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1602 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1607 case KVM_SET_CPUID2: {
1608 struct kvm_cpuid2 __user *cpuid_arg = argp;
1609 struct kvm_cpuid2 cpuid;
1612 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1614 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1615 cpuid_arg->entries);
1620 case KVM_GET_CPUID2: {
1621 struct kvm_cpuid2 __user *cpuid_arg = argp;
1622 struct kvm_cpuid2 cpuid;
1625 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1627 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1628 cpuid_arg->entries);
1632 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1638 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1641 r = msr_io(vcpu, argp, do_set_msr, 0);
1643 case KVM_TPR_ACCESS_REPORTING: {
1644 struct kvm_tpr_access_ctl tac;
1647 if (copy_from_user(&tac, argp, sizeof tac))
1649 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1653 if (copy_to_user(argp, &tac, sizeof tac))
1658 case KVM_SET_VAPIC_ADDR: {
1659 struct kvm_vapic_addr va;
1662 if (!irqchip_in_kernel(vcpu->kvm))
1665 if (copy_from_user(&va, argp, sizeof va))
1668 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1680 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1684 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1686 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1690 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1691 u32 kvm_nr_mmu_pages)
1693 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1696 down_write(&kvm->slots_lock);
1698 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1699 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1701 up_write(&kvm->slots_lock);
1705 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1707 return kvm->arch.n_alloc_mmu_pages;
1710 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1713 struct kvm_mem_alias *alias;
1715 for (i = 0; i < kvm->arch.naliases; ++i) {
1716 alias = &kvm->arch.aliases[i];
1717 if (gfn >= alias->base_gfn
1718 && gfn < alias->base_gfn + alias->npages)
1719 return alias->target_gfn + gfn - alias->base_gfn;
1725 * Set a new alias region. Aliases map a portion of physical memory into
1726 * another portion. This is useful for memory windows, for example the PC
1729 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1730 struct kvm_memory_alias *alias)
1733 struct kvm_mem_alias *p;
1736 /* General sanity checks */
1737 if (alias->memory_size & (PAGE_SIZE - 1))
1739 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1741 if (alias->slot >= KVM_ALIAS_SLOTS)
1743 if (alias->guest_phys_addr + alias->memory_size
1744 < alias->guest_phys_addr)
1746 if (alias->target_phys_addr + alias->memory_size
1747 < alias->target_phys_addr)
1750 down_write(&kvm->slots_lock);
1751 spin_lock(&kvm->mmu_lock);
1753 p = &kvm->arch.aliases[alias->slot];
1754 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1755 p->npages = alias->memory_size >> PAGE_SHIFT;
1756 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1758 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1759 if (kvm->arch.aliases[n - 1].npages)
1761 kvm->arch.naliases = n;
1763 spin_unlock(&kvm->mmu_lock);
1764 kvm_mmu_zap_all(kvm);
1766 up_write(&kvm->slots_lock);
1774 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1779 switch (chip->chip_id) {
1780 case KVM_IRQCHIP_PIC_MASTER:
1781 memcpy(&chip->chip.pic,
1782 &pic_irqchip(kvm)->pics[0],
1783 sizeof(struct kvm_pic_state));
1785 case KVM_IRQCHIP_PIC_SLAVE:
1786 memcpy(&chip->chip.pic,
1787 &pic_irqchip(kvm)->pics[1],
1788 sizeof(struct kvm_pic_state));
1790 case KVM_IRQCHIP_IOAPIC:
1791 memcpy(&chip->chip.ioapic,
1792 ioapic_irqchip(kvm),
1793 sizeof(struct kvm_ioapic_state));
1802 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1807 switch (chip->chip_id) {
1808 case KVM_IRQCHIP_PIC_MASTER:
1809 memcpy(&pic_irqchip(kvm)->pics[0],
1811 sizeof(struct kvm_pic_state));
1813 case KVM_IRQCHIP_PIC_SLAVE:
1814 memcpy(&pic_irqchip(kvm)->pics[1],
1816 sizeof(struct kvm_pic_state));
1818 case KVM_IRQCHIP_IOAPIC:
1819 memcpy(ioapic_irqchip(kvm),
1821 sizeof(struct kvm_ioapic_state));
1827 kvm_pic_update_irq(pic_irqchip(kvm));
1831 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1835 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1839 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1843 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1844 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1849 * Get (and clear) the dirty memory log for a memory slot.
1851 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1852 struct kvm_dirty_log *log)
1856 struct kvm_memory_slot *memslot;
1859 down_write(&kvm->slots_lock);
1861 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1865 /* If nothing is dirty, don't bother messing with page tables. */
1867 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1868 kvm_flush_remote_tlbs(kvm);
1869 memslot = &kvm->memslots[log->slot];
1870 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1871 memset(memslot->dirty_bitmap, 0, n);
1875 up_write(&kvm->slots_lock);
1879 long kvm_arch_vm_ioctl(struct file *filp,
1880 unsigned int ioctl, unsigned long arg)
1882 struct kvm *kvm = filp->private_data;
1883 void __user *argp = (void __user *)arg;
1886 * This union makes it completely explicit to gcc-3.x
1887 * that these two variables' stack usage should be
1888 * combined, not added together.
1891 struct kvm_pit_state ps;
1892 struct kvm_memory_alias alias;
1896 case KVM_SET_TSS_ADDR:
1897 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1901 case KVM_SET_MEMORY_REGION: {
1902 struct kvm_memory_region kvm_mem;
1903 struct kvm_userspace_memory_region kvm_userspace_mem;
1906 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1908 kvm_userspace_mem.slot = kvm_mem.slot;
1909 kvm_userspace_mem.flags = kvm_mem.flags;
1910 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1911 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1912 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1917 case KVM_SET_NR_MMU_PAGES:
1918 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1922 case KVM_GET_NR_MMU_PAGES:
1923 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1925 case KVM_SET_MEMORY_ALIAS:
1927 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1929 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1933 case KVM_CREATE_IRQCHIP:
1935 kvm->arch.vpic = kvm_create_pic(kvm);
1936 if (kvm->arch.vpic) {
1937 r = kvm_ioapic_init(kvm);
1939 kfree(kvm->arch.vpic);
1940 kvm->arch.vpic = NULL;
1946 case KVM_CREATE_PIT:
1948 kvm->arch.vpit = kvm_create_pit(kvm);
1952 case KVM_IRQ_LINE: {
1953 struct kvm_irq_level irq_event;
1956 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1958 if (irqchip_in_kernel(kvm)) {
1959 mutex_lock(&kvm->lock);
1960 kvm_set_irq(kvm, irq_event.irq, irq_event.level);
1961 mutex_unlock(&kvm->lock);
1966 case KVM_GET_IRQCHIP: {
1967 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1968 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1974 if (copy_from_user(chip, argp, sizeof *chip))
1975 goto get_irqchip_out;
1977 if (!irqchip_in_kernel(kvm))
1978 goto get_irqchip_out;
1979 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1981 goto get_irqchip_out;
1983 if (copy_to_user(argp, chip, sizeof *chip))
1984 goto get_irqchip_out;
1992 case KVM_SET_IRQCHIP: {
1993 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1994 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2000 if (copy_from_user(chip, argp, sizeof *chip))
2001 goto set_irqchip_out;
2003 if (!irqchip_in_kernel(kvm))
2004 goto set_irqchip_out;
2005 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2007 goto set_irqchip_out;
2015 case KVM_ASSIGN_PCI_DEVICE: {
2016 struct kvm_assigned_pci_dev assigned_dev;
2019 if (copy_from_user(&assigned_dev, argp, sizeof assigned_dev))
2021 r = kvm_vm_ioctl_assign_device(kvm, &assigned_dev);
2026 case KVM_ASSIGN_IRQ: {
2027 struct kvm_assigned_irq assigned_irq;
2030 if (copy_from_user(&assigned_irq, argp, sizeof assigned_irq))
2032 r = kvm_vm_ioctl_assign_irq(kvm, &assigned_irq);
2039 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2042 if (!kvm->arch.vpit)
2044 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2048 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2055 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2058 if (!kvm->arch.vpit)
2060 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2073 static void kvm_init_msr_list(void)
2078 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2079 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2082 msrs_to_save[j] = msrs_to_save[i];
2085 num_msrs_to_save = j;
2089 * Only apic need an MMIO device hook, so shortcut now..
2091 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2092 gpa_t addr, int len,
2095 struct kvm_io_device *dev;
2097 if (vcpu->arch.apic) {
2098 dev = &vcpu->arch.apic->dev;
2099 if (dev->in_range(dev, addr, len, is_write))
2106 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2107 gpa_t addr, int len,
2110 struct kvm_io_device *dev;
2112 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2114 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2119 int emulator_read_std(unsigned long addr,
2122 struct kvm_vcpu *vcpu)
2125 int r = X86EMUL_CONTINUE;
2128 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2129 unsigned offset = addr & (PAGE_SIZE-1);
2130 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
2133 if (gpa == UNMAPPED_GVA) {
2134 r = X86EMUL_PROPAGATE_FAULT;
2137 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
2139 r = X86EMUL_UNHANDLEABLE;
2150 EXPORT_SYMBOL_GPL(emulator_read_std);
2152 static int emulator_read_emulated(unsigned long addr,
2155 struct kvm_vcpu *vcpu)
2157 struct kvm_io_device *mmio_dev;
2160 if (vcpu->mmio_read_completed) {
2161 memcpy(val, vcpu->mmio_data, bytes);
2162 vcpu->mmio_read_completed = 0;
2163 return X86EMUL_CONTINUE;
2166 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2168 /* For APIC access vmexit */
2169 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2172 if (emulator_read_std(addr, val, bytes, vcpu)
2173 == X86EMUL_CONTINUE)
2174 return X86EMUL_CONTINUE;
2175 if (gpa == UNMAPPED_GVA)
2176 return X86EMUL_PROPAGATE_FAULT;
2180 * Is this MMIO handled locally?
2182 mutex_lock(&vcpu->kvm->lock);
2183 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2185 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2186 mutex_unlock(&vcpu->kvm->lock);
2187 return X86EMUL_CONTINUE;
2189 mutex_unlock(&vcpu->kvm->lock);
2191 vcpu->mmio_needed = 1;
2192 vcpu->mmio_phys_addr = gpa;
2193 vcpu->mmio_size = bytes;
2194 vcpu->mmio_is_write = 0;
2196 return X86EMUL_UNHANDLEABLE;
2199 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2200 const void *val, int bytes)
2204 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2207 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
2211 static int emulator_write_emulated_onepage(unsigned long addr,
2214 struct kvm_vcpu *vcpu)
2216 struct kvm_io_device *mmio_dev;
2219 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2221 if (gpa == UNMAPPED_GVA) {
2222 kvm_inject_page_fault(vcpu, addr, 2);
2223 return X86EMUL_PROPAGATE_FAULT;
2226 /* For APIC access vmexit */
2227 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2230 if (emulator_write_phys(vcpu, gpa, val, bytes))
2231 return X86EMUL_CONTINUE;
2235 * Is this MMIO handled locally?
2237 mutex_lock(&vcpu->kvm->lock);
2238 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2240 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2241 mutex_unlock(&vcpu->kvm->lock);
2242 return X86EMUL_CONTINUE;
2244 mutex_unlock(&vcpu->kvm->lock);
2246 vcpu->mmio_needed = 1;
2247 vcpu->mmio_phys_addr = gpa;
2248 vcpu->mmio_size = bytes;
2249 vcpu->mmio_is_write = 1;
2250 memcpy(vcpu->mmio_data, val, bytes);
2252 return X86EMUL_CONTINUE;
2255 int emulator_write_emulated(unsigned long addr,
2258 struct kvm_vcpu *vcpu)
2260 /* Crossing a page boundary? */
2261 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2264 now = -addr & ~PAGE_MASK;
2265 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2266 if (rc != X86EMUL_CONTINUE)
2272 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2274 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2276 static int emulator_cmpxchg_emulated(unsigned long addr,
2280 struct kvm_vcpu *vcpu)
2282 static int reported;
2286 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2288 #ifndef CONFIG_X86_64
2289 /* guests cmpxchg8b have to be emulated atomically */
2296 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2298 if (gpa == UNMAPPED_GVA ||
2299 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2302 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2307 down_read(¤t->mm->mmap_sem);
2308 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2309 up_read(¤t->mm->mmap_sem);
2311 kaddr = kmap_atomic(page, KM_USER0);
2312 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2313 kunmap_atomic(kaddr, KM_USER0);
2314 kvm_release_page_dirty(page);
2319 return emulator_write_emulated(addr, new, bytes, vcpu);
2322 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2324 return kvm_x86_ops->get_segment_base(vcpu, seg);
2327 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2329 return X86EMUL_CONTINUE;
2332 int emulate_clts(struct kvm_vcpu *vcpu)
2334 KVMTRACE_0D(CLTS, vcpu, handler);
2335 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2336 return X86EMUL_CONTINUE;
2339 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2341 struct kvm_vcpu *vcpu = ctxt->vcpu;
2345 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2346 return X86EMUL_CONTINUE;
2348 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2349 return X86EMUL_UNHANDLEABLE;
2353 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2355 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2358 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2360 /* FIXME: better handling */
2361 return X86EMUL_UNHANDLEABLE;
2363 return X86EMUL_CONTINUE;
2366 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2369 unsigned long rip = kvm_rip_read(vcpu);
2370 unsigned long rip_linear;
2372 if (!printk_ratelimit())
2375 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2377 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
2379 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2380 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2382 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2384 static struct x86_emulate_ops emulate_ops = {
2385 .read_std = emulator_read_std,
2386 .read_emulated = emulator_read_emulated,
2387 .write_emulated = emulator_write_emulated,
2388 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2391 static void cache_all_regs(struct kvm_vcpu *vcpu)
2393 kvm_register_read(vcpu, VCPU_REGS_RAX);
2394 kvm_register_read(vcpu, VCPU_REGS_RSP);
2395 kvm_register_read(vcpu, VCPU_REGS_RIP);
2396 vcpu->arch.regs_dirty = ~0;
2399 int emulate_instruction(struct kvm_vcpu *vcpu,
2400 struct kvm_run *run,
2406 struct decode_cache *c;
2408 kvm_clear_exception_queue(vcpu);
2409 vcpu->arch.mmio_fault_cr2 = cr2;
2411 * TODO: fix x86_emulate.c to use guest_read/write_register
2412 * instead of direct ->regs accesses, can save hundred cycles
2413 * on Intel for instructions that don't read/change RSP, for
2416 cache_all_regs(vcpu);
2418 vcpu->mmio_is_write = 0;
2419 vcpu->arch.pio.string = 0;
2421 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2423 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2425 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2426 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2427 vcpu->arch.emulate_ctxt.mode =
2428 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2429 ? X86EMUL_MODE_REAL : cs_l
2430 ? X86EMUL_MODE_PROT64 : cs_db
2431 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2433 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2435 /* Reject the instructions other than VMCALL/VMMCALL when
2436 * try to emulate invalid opcode */
2437 c = &vcpu->arch.emulate_ctxt.decode;
2438 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2439 (!(c->twobyte && c->b == 0x01 &&
2440 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2441 c->modrm_mod == 3 && c->modrm_rm == 1)))
2442 return EMULATE_FAIL;
2444 ++vcpu->stat.insn_emulation;
2446 ++vcpu->stat.insn_emulation_fail;
2447 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2448 return EMULATE_DONE;
2449 return EMULATE_FAIL;
2453 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2455 if (vcpu->arch.pio.string)
2456 return EMULATE_DO_MMIO;
2458 if ((r || vcpu->mmio_is_write) && run) {
2459 run->exit_reason = KVM_EXIT_MMIO;
2460 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2461 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2462 run->mmio.len = vcpu->mmio_size;
2463 run->mmio.is_write = vcpu->mmio_is_write;
2467 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2468 return EMULATE_DONE;
2469 if (!vcpu->mmio_needed) {
2470 kvm_report_emulation_failure(vcpu, "mmio");
2471 return EMULATE_FAIL;
2473 return EMULATE_DO_MMIO;
2476 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2478 if (vcpu->mmio_is_write) {
2479 vcpu->mmio_needed = 0;
2480 return EMULATE_DO_MMIO;
2483 return EMULATE_DONE;
2485 EXPORT_SYMBOL_GPL(emulate_instruction);
2487 static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2491 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2492 if (vcpu->arch.pio.guest_pages[i]) {
2493 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2494 vcpu->arch.pio.guest_pages[i] = NULL;
2498 static int pio_copy_data(struct kvm_vcpu *vcpu)
2500 void *p = vcpu->arch.pio_data;
2503 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
2505 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
2508 free_pio_guest_pages(vcpu);
2511 q += vcpu->arch.pio.guest_page_offset;
2512 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2513 if (vcpu->arch.pio.in)
2514 memcpy(q, p, bytes);
2516 memcpy(p, q, bytes);
2517 q -= vcpu->arch.pio.guest_page_offset;
2519 free_pio_guest_pages(vcpu);
2523 int complete_pio(struct kvm_vcpu *vcpu)
2525 struct kvm_pio_request *io = &vcpu->arch.pio;
2532 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2533 memcpy(&val, vcpu->arch.pio_data, io->size);
2534 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2538 r = pio_copy_data(vcpu);
2545 delta *= io->cur_count;
2547 * The size of the register should really depend on
2548 * current address size.
2550 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2552 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2558 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2560 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2562 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2564 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2568 io->count -= io->cur_count;
2574 static void kernel_pio(struct kvm_io_device *pio_dev,
2575 struct kvm_vcpu *vcpu,
2578 /* TODO: String I/O for in kernel device */
2580 mutex_lock(&vcpu->kvm->lock);
2581 if (vcpu->arch.pio.in)
2582 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2583 vcpu->arch.pio.size,
2586 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2587 vcpu->arch.pio.size,
2589 mutex_unlock(&vcpu->kvm->lock);
2592 static void pio_string_write(struct kvm_io_device *pio_dev,
2593 struct kvm_vcpu *vcpu)
2595 struct kvm_pio_request *io = &vcpu->arch.pio;
2596 void *pd = vcpu->arch.pio_data;
2599 mutex_lock(&vcpu->kvm->lock);
2600 for (i = 0; i < io->cur_count; i++) {
2601 kvm_iodevice_write(pio_dev, io->port,
2606 mutex_unlock(&vcpu->kvm->lock);
2609 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2610 gpa_t addr, int len,
2613 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2616 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2617 int size, unsigned port)
2619 struct kvm_io_device *pio_dev;
2622 vcpu->run->exit_reason = KVM_EXIT_IO;
2623 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2624 vcpu->run->io.size = vcpu->arch.pio.size = size;
2625 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2626 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2627 vcpu->run->io.port = vcpu->arch.pio.port = port;
2628 vcpu->arch.pio.in = in;
2629 vcpu->arch.pio.string = 0;
2630 vcpu->arch.pio.down = 0;
2631 vcpu->arch.pio.guest_page_offset = 0;
2632 vcpu->arch.pio.rep = 0;
2634 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2635 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2638 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2641 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2642 memcpy(vcpu->arch.pio_data, &val, 4);
2644 kvm_x86_ops->skip_emulated_instruction(vcpu);
2646 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2648 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2654 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2656 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2657 int size, unsigned long count, int down,
2658 gva_t address, int rep, unsigned port)
2660 unsigned now, in_page;
2664 struct kvm_io_device *pio_dev;
2666 vcpu->run->exit_reason = KVM_EXIT_IO;
2667 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2668 vcpu->run->io.size = vcpu->arch.pio.size = size;
2669 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2670 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2671 vcpu->run->io.port = vcpu->arch.pio.port = port;
2672 vcpu->arch.pio.in = in;
2673 vcpu->arch.pio.string = 1;
2674 vcpu->arch.pio.down = down;
2675 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2676 vcpu->arch.pio.rep = rep;
2678 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2679 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2682 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2686 kvm_x86_ops->skip_emulated_instruction(vcpu);
2691 in_page = PAGE_SIZE - offset_in_page(address);
2693 in_page = offset_in_page(address) + size;
2694 now = min(count, (unsigned long)in_page / size);
2697 * String I/O straddles page boundary. Pin two guest pages
2698 * so that we satisfy atomicity constraints. Do just one
2699 * transaction to avoid complexity.
2706 * String I/O in reverse. Yuck. Kill the guest, fix later.
2708 pr_unimpl(vcpu, "guest string pio down\n");
2709 kvm_inject_gp(vcpu, 0);
2712 vcpu->run->io.count = now;
2713 vcpu->arch.pio.cur_count = now;
2715 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2716 kvm_x86_ops->skip_emulated_instruction(vcpu);
2718 for (i = 0; i < nr_pages; ++i) {
2719 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
2720 vcpu->arch.pio.guest_pages[i] = page;
2722 kvm_inject_gp(vcpu, 0);
2723 free_pio_guest_pages(vcpu);
2728 pio_dev = vcpu_find_pio_dev(vcpu, port,
2729 vcpu->arch.pio.cur_count,
2730 !vcpu->arch.pio.in);
2731 if (!vcpu->arch.pio.in) {
2732 /* string PIO write */
2733 ret = pio_copy_data(vcpu);
2734 if (ret >= 0 && pio_dev) {
2735 pio_string_write(pio_dev, vcpu);
2737 if (vcpu->arch.pio.count == 0)
2741 pr_unimpl(vcpu, "no string pio read support yet, "
2742 "port %x size %d count %ld\n",
2747 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2749 int kvm_arch_init(void *opaque)
2752 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2755 printk(KERN_ERR "kvm: already loaded the other module\n");
2760 if (!ops->cpu_has_kvm_support()) {
2761 printk(KERN_ERR "kvm: no hardware support\n");
2765 if (ops->disabled_by_bios()) {
2766 printk(KERN_ERR "kvm: disabled by bios\n");
2771 r = kvm_mmu_module_init();
2775 kvm_init_msr_list();
2778 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2779 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2780 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2781 PT_DIRTY_MASK, PT64_NX_MASK, 0);
2788 void kvm_arch_exit(void)
2791 kvm_mmu_module_exit();
2794 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2796 ++vcpu->stat.halt_exits;
2797 KVMTRACE_0D(HLT, vcpu, handler);
2798 if (irqchip_in_kernel(vcpu->kvm)) {
2799 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2800 up_read(&vcpu->kvm->slots_lock);
2801 kvm_vcpu_block(vcpu);
2802 down_read(&vcpu->kvm->slots_lock);
2803 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
2807 vcpu->run->exit_reason = KVM_EXIT_HLT;
2811 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2813 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2816 if (is_long_mode(vcpu))
2819 return a0 | ((gpa_t)a1 << 32);
2822 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2824 unsigned long nr, a0, a1, a2, a3, ret;
2827 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2828 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2829 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2830 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2831 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2833 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2835 if (!is_long_mode(vcpu)) {
2844 case KVM_HC_VAPIC_POLL_IRQ:
2848 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2854 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2855 ++vcpu->stat.hypercalls;
2858 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2860 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2862 char instruction[3];
2864 unsigned long rip = kvm_rip_read(vcpu);
2868 * Blow out the MMU to ensure that no other VCPU has an active mapping
2869 * to ensure that the updated hypercall appears atomically across all
2872 kvm_mmu_zap_all(vcpu->kvm);
2874 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2875 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2876 != X86EMUL_CONTINUE)
2882 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2884 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2887 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2889 struct descriptor_table dt = { limit, base };
2891 kvm_x86_ops->set_gdt(vcpu, &dt);
2894 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2896 struct descriptor_table dt = { limit, base };
2898 kvm_x86_ops->set_idt(vcpu, &dt);
2901 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2902 unsigned long *rflags)
2904 kvm_lmsw(vcpu, msw);
2905 *rflags = kvm_x86_ops->get_rflags(vcpu);
2908 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2910 unsigned long value;
2912 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2915 value = vcpu->arch.cr0;
2918 value = vcpu->arch.cr2;
2921 value = vcpu->arch.cr3;
2924 value = vcpu->arch.cr4;
2927 value = kvm_get_cr8(vcpu);
2930 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2933 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2934 (u32)((u64)value >> 32), handler);
2939 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2940 unsigned long *rflags)
2942 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2943 (u32)((u64)val >> 32), handler);
2947 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2948 *rflags = kvm_x86_ops->get_rflags(vcpu);
2951 vcpu->arch.cr2 = val;
2954 kvm_set_cr3(vcpu, val);
2957 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2960 kvm_set_cr8(vcpu, val & 0xfUL);
2963 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2967 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2969 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2970 int j, nent = vcpu->arch.cpuid_nent;
2972 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2973 /* when no next entry is found, the current entry[i] is reselected */
2974 for (j = i + 1; j == i; j = (j + 1) % nent) {
2975 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2976 if (ej->function == e->function) {
2977 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2981 return 0; /* silence gcc, even though control never reaches here */
2984 /* find an entry with matching function, matching index (if needed), and that
2985 * should be read next (if it's stateful) */
2986 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2987 u32 function, u32 index)
2989 if (e->function != function)
2991 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2993 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2994 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2999 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3002 u32 function, index;
3003 struct kvm_cpuid_entry2 *e, *best;
3005 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3006 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3007 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3008 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3009 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3010 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3012 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3013 e = &vcpu->arch.cpuid_entries[i];
3014 if (is_matching_cpuid_entry(e, function, index)) {
3015 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3016 move_to_next_stateful_cpuid_entry(vcpu, i);
3021 * Both basic or both extended?
3023 if (((e->function ^ function) & 0x80000000) == 0)
3024 if (!best || e->function > best->function)
3028 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3029 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3030 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3031 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3033 kvm_x86_ops->skip_emulated_instruction(vcpu);
3034 KVMTRACE_5D(CPUID, vcpu, function,
3035 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3036 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3037 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3038 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3040 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3043 * Check if userspace requested an interrupt window, and that the
3044 * interrupt window is open.
3046 * No need to exit to userspace if we already have an interrupt queued.
3048 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3049 struct kvm_run *kvm_run)
3051 return (!vcpu->arch.irq_summary &&
3052 kvm_run->request_interrupt_window &&
3053 vcpu->arch.interrupt_window_open &&
3054 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3057 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3058 struct kvm_run *kvm_run)
3060 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3061 kvm_run->cr8 = kvm_get_cr8(vcpu);
3062 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3063 if (irqchip_in_kernel(vcpu->kvm))
3064 kvm_run->ready_for_interrupt_injection = 1;
3066 kvm_run->ready_for_interrupt_injection =
3067 (vcpu->arch.interrupt_window_open &&
3068 vcpu->arch.irq_summary == 0);
3071 static void vapic_enter(struct kvm_vcpu *vcpu)
3073 struct kvm_lapic *apic = vcpu->arch.apic;
3076 if (!apic || !apic->vapic_addr)
3079 down_read(¤t->mm->mmap_sem);
3080 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3081 up_read(¤t->mm->mmap_sem);
3083 vcpu->arch.apic->vapic_page = page;
3086 static void vapic_exit(struct kvm_vcpu *vcpu)
3088 struct kvm_lapic *apic = vcpu->arch.apic;
3090 if (!apic || !apic->vapic_addr)
3093 down_read(&vcpu->kvm->slots_lock);
3094 kvm_release_page_dirty(apic->vapic_page);
3095 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3096 up_read(&vcpu->kvm->slots_lock);
3099 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3103 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3104 pr_debug("vcpu %d received sipi with vector # %x\n",
3105 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3106 kvm_lapic_reset(vcpu);
3107 r = kvm_x86_ops->vcpu_reset(vcpu);
3110 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3113 down_read(&vcpu->kvm->slots_lock);
3118 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3119 kvm_mmu_unload(vcpu);
3121 r = kvm_mmu_reload(vcpu);
3125 if (vcpu->requests) {
3126 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3127 __kvm_migrate_timers(vcpu);
3128 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3129 kvm_x86_ops->tlb_flush(vcpu);
3130 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3132 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3136 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3137 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3143 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3144 kvm_inject_pending_timer_irqs(vcpu);
3148 kvm_x86_ops->prepare_guest_switch(vcpu);
3149 kvm_load_guest_fpu(vcpu);
3151 local_irq_disable();
3153 if (vcpu->requests || need_resched()) {
3160 if (signal_pending(current)) {
3164 kvm_run->exit_reason = KVM_EXIT_INTR;
3165 ++vcpu->stat.signal_exits;
3169 if (vcpu->guest_debug.enabled)
3170 kvm_x86_ops->guest_debug_pre(vcpu);
3172 vcpu->guest_mode = 1;
3174 * Make sure that guest_mode assignment won't happen after
3175 * testing the pending IRQ vector bitmap.
3179 if (vcpu->arch.exception.pending)
3180 __queue_exception(vcpu);
3181 else if (irqchip_in_kernel(vcpu->kvm))
3182 kvm_x86_ops->inject_pending_irq(vcpu);
3184 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3186 kvm_lapic_sync_to_vapic(vcpu);
3188 up_read(&vcpu->kvm->slots_lock);
3193 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3194 kvm_x86_ops->run(vcpu, kvm_run);
3196 vcpu->guest_mode = 0;
3202 * We must have an instruction between local_irq_enable() and
3203 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3204 * the interrupt shadow. The stat.exits increment will do nicely.
3205 * But we need to prevent reordering, hence this barrier():
3213 down_read(&vcpu->kvm->slots_lock);
3216 * Profile KVM exit RIPs:
3218 if (unlikely(prof_on == KVM_PROFILING)) {
3219 unsigned long rip = kvm_rip_read(vcpu);
3220 profile_hit(KVM_PROFILING, (void *)rip);
3223 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3224 vcpu->arch.exception.pending = false;
3226 kvm_lapic_sync_from_vapic(vcpu);
3228 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3231 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3233 kvm_run->exit_reason = KVM_EXIT_INTR;
3234 ++vcpu->stat.request_irq_exits;
3237 if (!need_resched())
3242 up_read(&vcpu->kvm->slots_lock);
3245 down_read(&vcpu->kvm->slots_lock);
3249 post_kvm_run_save(vcpu, kvm_run);
3256 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3263 if (vcpu->sigset_active)
3264 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3266 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3267 kvm_vcpu_block(vcpu);
3272 /* re-sync apic's tpr */
3273 if (!irqchip_in_kernel(vcpu->kvm))
3274 kvm_set_cr8(vcpu, kvm_run->cr8);
3276 if (vcpu->arch.pio.cur_count) {
3277 r = complete_pio(vcpu);
3281 #if CONFIG_HAS_IOMEM
3282 if (vcpu->mmio_needed) {
3283 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3284 vcpu->mmio_read_completed = 1;
3285 vcpu->mmio_needed = 0;
3287 down_read(&vcpu->kvm->slots_lock);
3288 r = emulate_instruction(vcpu, kvm_run,
3289 vcpu->arch.mmio_fault_cr2, 0,
3290 EMULTYPE_NO_DECODE);
3291 up_read(&vcpu->kvm->slots_lock);
3292 if (r == EMULATE_DO_MMIO) {
3294 * Read-modify-write. Back to userspace.
3301 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3302 kvm_register_write(vcpu, VCPU_REGS_RAX,
3303 kvm_run->hypercall.ret);
3305 r = __vcpu_run(vcpu, kvm_run);
3308 if (vcpu->sigset_active)
3309 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3315 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3319 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3320 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3321 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3322 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3323 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3324 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3325 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3326 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3327 #ifdef CONFIG_X86_64
3328 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3329 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3330 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3331 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3332 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3333 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3334 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3335 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3338 regs->rip = kvm_rip_read(vcpu);
3339 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3342 * Don't leak debug flags in case they were set for guest debugging
3344 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
3345 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3352 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3356 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3357 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3358 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3359 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3360 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3361 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3362 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3363 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3364 #ifdef CONFIG_X86_64
3365 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3366 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3367 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3368 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3369 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3370 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3371 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3372 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3376 kvm_rip_write(vcpu, regs->rip);
3377 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3380 vcpu->arch.exception.pending = false;
3387 void kvm_get_segment(struct kvm_vcpu *vcpu,
3388 struct kvm_segment *var, int seg)
3390 kvm_x86_ops->get_segment(vcpu, var, seg);
3393 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3395 struct kvm_segment cs;
3397 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3401 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3403 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3404 struct kvm_sregs *sregs)
3406 struct descriptor_table dt;
3411 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3412 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3413 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3414 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3415 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3416 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3418 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3419 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3421 kvm_x86_ops->get_idt(vcpu, &dt);
3422 sregs->idt.limit = dt.limit;
3423 sregs->idt.base = dt.base;
3424 kvm_x86_ops->get_gdt(vcpu, &dt);
3425 sregs->gdt.limit = dt.limit;
3426 sregs->gdt.base = dt.base;
3428 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3429 sregs->cr0 = vcpu->arch.cr0;
3430 sregs->cr2 = vcpu->arch.cr2;
3431 sregs->cr3 = vcpu->arch.cr3;
3432 sregs->cr4 = vcpu->arch.cr4;
3433 sregs->cr8 = kvm_get_cr8(vcpu);
3434 sregs->efer = vcpu->arch.shadow_efer;
3435 sregs->apic_base = kvm_get_apic_base(vcpu);
3437 if (irqchip_in_kernel(vcpu->kvm)) {
3438 memset(sregs->interrupt_bitmap, 0,
3439 sizeof sregs->interrupt_bitmap);
3440 pending_vec = kvm_x86_ops->get_irq(vcpu);
3441 if (pending_vec >= 0)
3442 set_bit(pending_vec,
3443 (unsigned long *)sregs->interrupt_bitmap);
3445 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3446 sizeof sregs->interrupt_bitmap);
3453 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3454 struct kvm_mp_state *mp_state)
3457 mp_state->mp_state = vcpu->arch.mp_state;
3462 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3463 struct kvm_mp_state *mp_state)
3466 vcpu->arch.mp_state = mp_state->mp_state;
3471 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3472 struct kvm_segment *var, int seg)
3474 kvm_x86_ops->set_segment(vcpu, var, seg);
3477 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3478 struct kvm_segment *kvm_desct)
3480 kvm_desct->base = seg_desc->base0;
3481 kvm_desct->base |= seg_desc->base1 << 16;
3482 kvm_desct->base |= seg_desc->base2 << 24;
3483 kvm_desct->limit = seg_desc->limit0;
3484 kvm_desct->limit |= seg_desc->limit << 16;
3486 kvm_desct->limit <<= 12;
3487 kvm_desct->limit |= 0xfff;
3489 kvm_desct->selector = selector;
3490 kvm_desct->type = seg_desc->type;
3491 kvm_desct->present = seg_desc->p;
3492 kvm_desct->dpl = seg_desc->dpl;
3493 kvm_desct->db = seg_desc->d;
3494 kvm_desct->s = seg_desc->s;
3495 kvm_desct->l = seg_desc->l;
3496 kvm_desct->g = seg_desc->g;
3497 kvm_desct->avl = seg_desc->avl;
3499 kvm_desct->unusable = 1;
3501 kvm_desct->unusable = 0;
3502 kvm_desct->padding = 0;
3505 static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
3507 struct descriptor_table *dtable)
3509 if (selector & 1 << 2) {
3510 struct kvm_segment kvm_seg;
3512 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3514 if (kvm_seg.unusable)
3517 dtable->limit = kvm_seg.limit;
3518 dtable->base = kvm_seg.base;
3521 kvm_x86_ops->get_gdt(vcpu, dtable);
3524 /* allowed just for 8 bytes segments */
3525 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3526 struct desc_struct *seg_desc)
3529 struct descriptor_table dtable;
3530 u16 index = selector >> 3;
3532 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3534 if (dtable.limit < index * 8 + 7) {
3535 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3538 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3540 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3543 /* allowed just for 8 bytes segments */
3544 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3545 struct desc_struct *seg_desc)
3548 struct descriptor_table dtable;
3549 u16 index = selector >> 3;
3551 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3553 if (dtable.limit < index * 8 + 7)
3555 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3557 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3560 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3561 struct desc_struct *seg_desc)
3565 base_addr = seg_desc->base0;
3566 base_addr |= (seg_desc->base1 << 16);
3567 base_addr |= (seg_desc->base2 << 24);
3569 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3572 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3574 struct kvm_segment kvm_seg;
3576 kvm_get_segment(vcpu, &kvm_seg, seg);
3577 return kvm_seg.selector;
3580 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3582 struct kvm_segment *kvm_seg)
3584 struct desc_struct seg_desc;
3586 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3588 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3592 int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3594 struct kvm_segment segvar = {
3595 .base = selector << 4,
3597 .selector = selector,
3608 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3612 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3613 int type_bits, int seg)
3615 struct kvm_segment kvm_seg;
3617 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3618 return kvm_load_realmode_segment(vcpu, selector, seg);
3619 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3621 kvm_seg.type |= type_bits;
3623 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3624 seg != VCPU_SREG_LDTR)
3626 kvm_seg.unusable = 1;
3628 kvm_set_segment(vcpu, &kvm_seg, seg);
3632 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3633 struct tss_segment_32 *tss)
3635 tss->cr3 = vcpu->arch.cr3;
3636 tss->eip = kvm_rip_read(vcpu);
3637 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3638 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3639 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3640 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3641 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3642 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3643 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3644 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3645 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3646 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3647 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3648 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3649 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3650 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3651 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3652 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3653 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3656 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3657 struct tss_segment_32 *tss)
3659 kvm_set_cr3(vcpu, tss->cr3);
3661 kvm_rip_write(vcpu, tss->eip);
3662 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3664 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3665 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3666 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3667 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3668 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3669 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3670 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3671 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3673 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3676 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3679 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3682 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3685 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3688 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3691 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3696 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3697 struct tss_segment_16 *tss)
3699 tss->ip = kvm_rip_read(vcpu);
3700 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3701 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3702 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3703 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3704 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3705 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3706 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3707 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3708 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3710 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3711 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3712 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3713 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3714 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3715 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3718 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3719 struct tss_segment_16 *tss)
3721 kvm_rip_write(vcpu, tss->ip);
3722 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3723 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3724 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3725 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3726 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3727 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3728 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3729 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3730 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3732 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3735 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3738 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3741 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3744 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3749 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3751 struct desc_struct *nseg_desc)
3753 struct tss_segment_16 tss_segment_16;
3756 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3757 sizeof tss_segment_16))
3760 save_state_to_tss16(vcpu, &tss_segment_16);
3762 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3763 sizeof tss_segment_16))
3766 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3767 &tss_segment_16, sizeof tss_segment_16))
3770 if (load_state_from_tss16(vcpu, &tss_segment_16))
3778 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3780 struct desc_struct *nseg_desc)
3782 struct tss_segment_32 tss_segment_32;
3785 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3786 sizeof tss_segment_32))
3789 save_state_to_tss32(vcpu, &tss_segment_32);
3791 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3792 sizeof tss_segment_32))
3795 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3796 &tss_segment_32, sizeof tss_segment_32))
3799 if (load_state_from_tss32(vcpu, &tss_segment_32))
3807 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3809 struct kvm_segment tr_seg;
3810 struct desc_struct cseg_desc;
3811 struct desc_struct nseg_desc;
3813 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3814 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3816 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3818 /* FIXME: Handle errors. Failure to read either TSS or their
3819 * descriptors should generate a pagefault.
3821 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3824 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3827 if (reason != TASK_SWITCH_IRET) {
3830 cpl = kvm_x86_ops->get_cpl(vcpu);
3831 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3832 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3837 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3838 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3842 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3843 cseg_desc.type &= ~(1 << 1); //clear the B flag
3844 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3847 if (reason == TASK_SWITCH_IRET) {
3848 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3849 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3852 kvm_x86_ops->skip_emulated_instruction(vcpu);
3854 if (nseg_desc.type & 8)
3855 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3858 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3861 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3862 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3863 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3866 if (reason != TASK_SWITCH_IRET) {
3867 nseg_desc.type |= (1 << 1);
3868 save_guest_segment_descriptor(vcpu, tss_selector,
3872 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3873 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3875 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3879 EXPORT_SYMBOL_GPL(kvm_task_switch);
3881 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3882 struct kvm_sregs *sregs)
3884 int mmu_reset_needed = 0;
3885 int i, pending_vec, max_bits;
3886 struct descriptor_table dt;
3890 dt.limit = sregs->idt.limit;
3891 dt.base = sregs->idt.base;
3892 kvm_x86_ops->set_idt(vcpu, &dt);
3893 dt.limit = sregs->gdt.limit;
3894 dt.base = sregs->gdt.base;
3895 kvm_x86_ops->set_gdt(vcpu, &dt);
3897 vcpu->arch.cr2 = sregs->cr2;
3898 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3899 vcpu->arch.cr3 = sregs->cr3;
3901 kvm_set_cr8(vcpu, sregs->cr8);
3903 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3904 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3905 kvm_set_apic_base(vcpu, sregs->apic_base);
3907 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3909 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3910 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3911 vcpu->arch.cr0 = sregs->cr0;
3913 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3914 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3915 if (!is_long_mode(vcpu) && is_pae(vcpu))
3916 load_pdptrs(vcpu, vcpu->arch.cr3);
3918 if (mmu_reset_needed)
3919 kvm_mmu_reset_context(vcpu);
3921 if (!irqchip_in_kernel(vcpu->kvm)) {
3922 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3923 sizeof vcpu->arch.irq_pending);
3924 vcpu->arch.irq_summary = 0;
3925 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3926 if (vcpu->arch.irq_pending[i])
3927 __set_bit(i, &vcpu->arch.irq_summary);
3929 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3930 pending_vec = find_first_bit(
3931 (const unsigned long *)sregs->interrupt_bitmap,
3933 /* Only pending external irq is handled here */
3934 if (pending_vec < max_bits) {
3935 kvm_x86_ops->set_irq(vcpu, pending_vec);
3936 pr_debug("Set back pending irq %d\n",
3941 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3942 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3943 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3944 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3945 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3946 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3948 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3949 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3956 int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3957 struct kvm_debug_guest *dbg)
3963 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3971 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3972 * we have asm/x86/processor.h
3983 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3984 #ifdef CONFIG_X86_64
3985 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3987 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3992 * Translate a guest virtual address to a guest physical address.
3994 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3995 struct kvm_translation *tr)
3997 unsigned long vaddr = tr->linear_address;
4001 down_read(&vcpu->kvm->slots_lock);
4002 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4003 up_read(&vcpu->kvm->slots_lock);
4004 tr->physical_address = gpa;
4005 tr->valid = gpa != UNMAPPED_GVA;
4013 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4015 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4019 memcpy(fpu->fpr, fxsave->st_space, 128);
4020 fpu->fcw = fxsave->cwd;
4021 fpu->fsw = fxsave->swd;
4022 fpu->ftwx = fxsave->twd;
4023 fpu->last_opcode = fxsave->fop;
4024 fpu->last_ip = fxsave->rip;
4025 fpu->last_dp = fxsave->rdp;
4026 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4033 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4035 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4039 memcpy(fxsave->st_space, fpu->fpr, 128);
4040 fxsave->cwd = fpu->fcw;
4041 fxsave->swd = fpu->fsw;
4042 fxsave->twd = fpu->ftwx;
4043 fxsave->fop = fpu->last_opcode;
4044 fxsave->rip = fpu->last_ip;
4045 fxsave->rdp = fpu->last_dp;
4046 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4053 void fx_init(struct kvm_vcpu *vcpu)
4055 unsigned after_mxcsr_mask;
4058 * Touch the fpu the first time in non atomic context as if
4059 * this is the first fpu instruction the exception handler
4060 * will fire before the instruction returns and it'll have to
4061 * allocate ram with GFP_KERNEL.
4064 kvm_fx_save(&vcpu->arch.host_fx_image);
4066 /* Initialize guest FPU by resetting ours and saving into guest's */
4068 kvm_fx_save(&vcpu->arch.host_fx_image);
4070 kvm_fx_save(&vcpu->arch.guest_fx_image);
4071 kvm_fx_restore(&vcpu->arch.host_fx_image);
4074 vcpu->arch.cr0 |= X86_CR0_ET;
4075 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4076 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4077 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4078 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4080 EXPORT_SYMBOL_GPL(fx_init);
4082 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4084 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4087 vcpu->guest_fpu_loaded = 1;
4088 kvm_fx_save(&vcpu->arch.host_fx_image);
4089 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4091 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4093 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4095 if (!vcpu->guest_fpu_loaded)
4098 vcpu->guest_fpu_loaded = 0;
4099 kvm_fx_save(&vcpu->arch.guest_fx_image);
4100 kvm_fx_restore(&vcpu->arch.host_fx_image);
4101 ++vcpu->stat.fpu_reload;
4103 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4105 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4107 kvm_x86_ops->vcpu_free(vcpu);
4110 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4113 return kvm_x86_ops->vcpu_create(kvm, id);
4116 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4120 /* We do fxsave: this must be aligned. */
4121 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4124 r = kvm_arch_vcpu_reset(vcpu);
4126 r = kvm_mmu_setup(vcpu);
4133 kvm_x86_ops->vcpu_free(vcpu);
4137 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4140 kvm_mmu_unload(vcpu);
4143 kvm_x86_ops->vcpu_free(vcpu);
4146 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4148 return kvm_x86_ops->vcpu_reset(vcpu);
4151 void kvm_arch_hardware_enable(void *garbage)
4153 kvm_x86_ops->hardware_enable(garbage);
4156 void kvm_arch_hardware_disable(void *garbage)
4158 kvm_x86_ops->hardware_disable(garbage);
4161 int kvm_arch_hardware_setup(void)
4163 return kvm_x86_ops->hardware_setup();
4166 void kvm_arch_hardware_unsetup(void)
4168 kvm_x86_ops->hardware_unsetup();
4171 void kvm_arch_check_processor_compat(void *rtn)
4173 kvm_x86_ops->check_processor_compatibility(rtn);
4176 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4182 BUG_ON(vcpu->kvm == NULL);
4185 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4186 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4187 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4189 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4191 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4196 vcpu->arch.pio_data = page_address(page);
4198 r = kvm_mmu_create(vcpu);
4200 goto fail_free_pio_data;
4202 if (irqchip_in_kernel(kvm)) {
4203 r = kvm_create_lapic(vcpu);
4205 goto fail_mmu_destroy;
4211 kvm_mmu_destroy(vcpu);
4213 free_page((unsigned long)vcpu->arch.pio_data);
4218 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4220 kvm_free_lapic(vcpu);
4221 down_read(&vcpu->kvm->slots_lock);
4222 kvm_mmu_destroy(vcpu);
4223 up_read(&vcpu->kvm->slots_lock);
4224 free_page((unsigned long)vcpu->arch.pio_data);
4227 struct kvm *kvm_arch_create_vm(void)
4229 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4232 return ERR_PTR(-ENOMEM);
4234 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4235 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4240 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4243 kvm_mmu_unload(vcpu);
4247 static void kvm_free_vcpus(struct kvm *kvm)
4252 * Unpin any mmu pages first.
4254 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4256 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4257 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4258 if (kvm->vcpus[i]) {
4259 kvm_arch_vcpu_free(kvm->vcpus[i]);
4260 kvm->vcpus[i] = NULL;
4266 void kvm_arch_destroy_vm(struct kvm *kvm)
4268 kvm_free_assigned_devices(kvm);
4270 kfree(kvm->arch.vpic);
4271 kfree(kvm->arch.vioapic);
4272 kvm_free_vcpus(kvm);
4273 kvm_free_physmem(kvm);
4274 if (kvm->arch.apic_access_page)
4275 put_page(kvm->arch.apic_access_page);
4276 if (kvm->arch.ept_identity_pagetable)
4277 put_page(kvm->arch.ept_identity_pagetable);
4281 int kvm_arch_set_memory_region(struct kvm *kvm,
4282 struct kvm_userspace_memory_region *mem,
4283 struct kvm_memory_slot old,
4286 int npages = mem->memory_size >> PAGE_SHIFT;
4287 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4289 /*To keep backward compatibility with older userspace,
4290 *x86 needs to hanlde !user_alloc case.
4293 if (npages && !old.rmap) {
4294 unsigned long userspace_addr;
4296 down_write(¤t->mm->mmap_sem);
4297 userspace_addr = do_mmap(NULL, 0,
4299 PROT_READ | PROT_WRITE,
4300 MAP_PRIVATE | MAP_ANONYMOUS,
4302 up_write(¤t->mm->mmap_sem);
4304 if (IS_ERR((void *)userspace_addr))
4305 return PTR_ERR((void *)userspace_addr);
4307 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4308 spin_lock(&kvm->mmu_lock);
4309 memslot->userspace_addr = userspace_addr;
4310 spin_unlock(&kvm->mmu_lock);
4312 if (!old.user_alloc && old.rmap) {
4315 down_write(¤t->mm->mmap_sem);
4316 ret = do_munmap(current->mm, old.userspace_addr,
4317 old.npages * PAGE_SIZE);
4318 up_write(¤t->mm->mmap_sem);
4321 "kvm_vm_ioctl_set_memory_region: "
4322 "failed to munmap memory\n");
4327 if (!kvm->arch.n_requested_mmu_pages) {
4328 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4329 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4332 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4333 kvm_flush_remote_tlbs(kvm);
4338 void kvm_arch_flush_shadow(struct kvm *kvm)
4340 kvm_mmu_zap_all(kvm);
4343 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4345 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4346 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
4349 static void vcpu_kick_intr(void *info)
4352 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4353 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4357 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4359 int ipi_pcpu = vcpu->cpu;
4360 int cpu = get_cpu();
4362 if (waitqueue_active(&vcpu->wq)) {
4363 wake_up_interruptible(&vcpu->wq);
4364 ++vcpu->stat.halt_wakeup;
4367 * We may be called synchronously with irqs disabled in guest mode,
4368 * So need not to call smp_call_function_single() in that case.
4370 if (vcpu->guest_mode && vcpu->cpu != cpu)
4371 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);