2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
57 #include <asm/trampoline.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
64 #include <asm/genapic.h>
65 #include <asm/setup.h>
66 #include <linux/mc146818rtc.h>
68 #include <mach_apic.h>
69 #include <mach_wakecpu.h>
70 #include <smpboot_hooks.h>
73 u8 apicid_2_node[MAX_APICID];
74 static int low_mappings;
77 /* State of each CPU */
78 DEFINE_PER_CPU(int, cpu_state) = { 0 };
80 /* Store all idle threads, this can be reused instead of creating
81 * a new thread. Also avoids complicated thread destroy functionality
84 #ifdef CONFIG_HOTPLUG_CPU
86 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
87 * removed after init for !CONFIG_HOTPLUG_CPU.
89 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
90 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
91 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
93 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
94 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
95 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
98 /* Number of siblings per CPU package */
99 int smp_num_siblings = 1;
100 EXPORT_SYMBOL(smp_num_siblings);
102 /* Last level cache ID of each logical CPU */
103 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
105 cpumask_t cpu_callin_map;
106 cpumask_t cpu_callout_map;
108 /* representing HT siblings of each logical CPU */
109 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
110 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
112 /* representing HT and core siblings of each logical CPU */
113 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
114 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
116 /* Per CPU bogomips and other parameters */
117 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
118 EXPORT_PER_CPU_SYMBOL(cpu_info);
120 static atomic_t init_deasserted;
123 /* representing cpus for which sibling maps can be computed */
124 static cpumask_t cpu_sibling_setup_map;
126 /* Set if we find a B stepping CPU */
127 static int __cpuinitdata smp_b_stepping;
129 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
131 /* which logical CPUs are on which nodes */
132 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
133 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
134 EXPORT_SYMBOL(node_to_cpumask_map);
135 /* which node each logical CPU is on */
136 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
137 EXPORT_SYMBOL(cpu_to_node_map);
139 /* set up a mapping between cpu and node. */
140 static void map_cpu_to_node(int cpu, int node)
142 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
143 cpu_set(cpu, node_to_cpumask_map[node]);
144 cpu_to_node_map[cpu] = node;
147 /* undo a mapping between cpu and node. */
148 static void unmap_cpu_to_node(int cpu)
152 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
153 for (node = 0; node < MAX_NUMNODES; node++)
154 cpu_clear(cpu, node_to_cpumask_map[node]);
155 cpu_to_node_map[cpu] = 0;
157 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
158 #define map_cpu_to_node(cpu, node) ({})
159 #define unmap_cpu_to_node(cpu) ({})
163 static int boot_cpu_logical_apicid;
165 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
166 { [0 ... NR_CPUS-1] = BAD_APICID };
168 static void map_cpu_to_logical_apicid(void)
170 int cpu = smp_processor_id();
171 int apicid = logical_smp_processor_id();
172 int node = apicid_to_node(apicid);
174 if (!node_online(node))
175 node = first_online_node;
177 cpu_2_logical_apicid[cpu] = apicid;
178 map_cpu_to_node(cpu, node);
181 void numa_remove_cpu(int cpu)
183 cpu_2_logical_apicid[cpu] = BAD_APICID;
184 unmap_cpu_to_node(cpu);
187 #define map_cpu_to_logical_apicid() do {} while (0)
191 * Report back to the Boot Processor.
194 static void __cpuinit smp_callin(void)
197 unsigned long timeout;
200 * If waken up by an INIT in an 82489DX configuration
201 * we may get here before an INIT-deassert IPI reaches
202 * our local APIC. We have to wait for the IPI or we'll
203 * lock up on an APIC access.
205 wait_for_init_deassert(&init_deasserted);
208 * (This works even if the APIC is not enabled.)
210 phys_id = read_apic_id();
211 cpuid = smp_processor_id();
212 if (cpu_isset(cpuid, cpu_callin_map)) {
213 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
216 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
219 * STARTUP IPIs are fragile beasts as they might sometimes
220 * trigger some glue motherboard logic. Complete APIC bus
221 * silence for 1 second, this overestimates the time the
222 * boot CPU is spending to send the up to 2 STARTUP IPIs
223 * by a factor of two. This should be enough.
227 * Waiting 2s total for startup (udelay is not yet working)
229 timeout = jiffies + 2*HZ;
230 while (time_before(jiffies, timeout)) {
232 * Has the boot CPU finished it's STARTUP sequence?
234 if (cpu_isset(cpuid, cpu_callout_map))
239 if (!time_before(jiffies, timeout)) {
240 panic("%s: CPU%d started up but did not get a callout!\n",
245 * the boot CPU has finished the init stage and is spinning
246 * on callin_map until we finish. We are free to set up this
247 * CPU, first the APIC. (this is probably redundant on most
251 pr_debug("CALLIN, before setup_local_APIC().\n");
252 smp_callin_clear_local_apic();
254 end_local_APIC_setup();
255 map_cpu_to_logical_apicid();
257 notify_cpu_starting(cpuid);
261 * Need to enable IRQs because it can take longer and then
262 * the NMI watchdog might kill us.
267 pr_debug("Stack at about %p\n", &cpuid);
270 * Save our processor parameters
272 smp_store_cpu_info(cpuid);
275 * Allow the master to continue.
277 cpu_set(cpuid, cpu_callin_map);
280 static int __cpuinitdata unsafe_smp;
283 * Activate a secondary processor.
285 static void __cpuinit start_secondary(void *unused)
288 * Don't put *anything* before cpu_init(), SMP booting is too
289 * fragile that we want to limit the things done here to the
290 * most necessary things.
299 /* otherwise gcc will move up smp_processor_id before the cpu_init */
302 * Check TSC synchronization with the BP:
304 check_tsc_sync_target();
306 if (nmi_watchdog == NMI_IO_APIC) {
307 disable_8259A_irq(0);
308 enable_NMI_through_LVT0();
318 /* This must be done before setting cpu_online_map */
319 set_cpu_sibling_map(raw_smp_processor_id());
323 * We need to hold call_lock, so there is no inconsistency
324 * between the time smp_call_function() determines number of
325 * IPI recipients, and the time when the determination is made
326 * for which cpus receive the IPI. Holding this
327 * lock helps us to not include this cpu in a currently in progress
328 * smp_call_function().
330 * We need to hold vector_lock so there the set of online cpus
331 * does not change while we are assigning vectors to cpus. Holding
332 * this lock ensures we don't half assign or remove an irq from a cpu.
336 __setup_vector_irq(smp_processor_id());
337 cpu_set(smp_processor_id(), cpu_online_map);
338 unlock_vector_lock();
340 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
342 /* enable local interrupts */
345 setup_secondary_clock();
351 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
354 * Mask B, Pentium, but not Pentium MMX
356 if (c->x86_vendor == X86_VENDOR_INTEL &&
358 c->x86_mask >= 1 && c->x86_mask <= 4 &&
361 * Remember we have B step Pentia with bugs
366 * Certain Athlons might work (for various values of 'work') in SMP
367 * but they are not certified as MP capable.
369 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
371 if (num_possible_cpus() == 1)
374 /* Athlon 660/661 is valid. */
375 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
379 /* Duron 670 is valid */
380 if ((c->x86_model == 7) && (c->x86_mask == 0))
384 * Athlon 662, Duron 671, and Athlon >model 7 have capability
385 * bit. It's worth noting that the A5 stepping (662) of some
386 * Athlon XP's have the MP bit set.
387 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
390 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
391 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
396 /* If we get here, not a certified SMP capable AMD system. */
404 static void __cpuinit smp_checks(void)
407 printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
408 "with B stepping processors.\n");
411 * Don't taint if we are running SMP kernel on a single non-MP
414 if (unsafe_smp && num_online_cpus() > 1) {
415 printk(KERN_INFO "WARNING: This combination of AMD"
416 "processors is not suitable for SMP.\n");
417 add_taint(TAINT_UNSAFE_SMP);
422 * The bootstrap kernel entry code has set these up. Save them for
426 void __cpuinit smp_store_cpu_info(int id)
428 struct cpuinfo_x86 *c = &cpu_data(id);
433 identify_secondary_cpu(c);
438 void __cpuinit set_cpu_sibling_map(int cpu)
441 struct cpuinfo_x86 *c = &cpu_data(cpu);
443 cpu_set(cpu, cpu_sibling_setup_map);
445 if (smp_num_siblings > 1) {
446 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
447 if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
448 c->cpu_core_id == cpu_data(i).cpu_core_id) {
449 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
450 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
451 cpu_set(i, per_cpu(cpu_core_map, cpu));
452 cpu_set(cpu, per_cpu(cpu_core_map, i));
453 cpu_set(i, c->llc_shared_map);
454 cpu_set(cpu, cpu_data(i).llc_shared_map);
458 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
461 cpu_set(cpu, c->llc_shared_map);
463 if (current_cpu_data.x86_max_cores == 1) {
464 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
469 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
470 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
471 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
472 cpu_set(i, c->llc_shared_map);
473 cpu_set(cpu, cpu_data(i).llc_shared_map);
475 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
476 cpu_set(i, per_cpu(cpu_core_map, cpu));
477 cpu_set(cpu, per_cpu(cpu_core_map, i));
479 * Does this new cpu bringup a new core?
481 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
483 * for each core in package, increment
484 * the booted_cores for this new cpu
486 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
489 * increment the core count for all
490 * the other cpus in this package
493 cpu_data(i).booted_cores++;
494 } else if (i != cpu && !c->booted_cores)
495 c->booted_cores = cpu_data(i).booted_cores;
500 /* maps the cpu to the sched domain representing multi-core */
501 cpumask_t cpu_coregroup_map(int cpu)
503 struct cpuinfo_x86 *c = &cpu_data(cpu);
505 * For perf, we return last level cache shared map.
506 * And for power savings, we return cpu_core_map
508 if (sched_mc_power_savings || sched_smt_power_savings)
509 return per_cpu(cpu_core_map, cpu);
511 return c->llc_shared_map;
514 static void impress_friends(void)
517 unsigned long bogosum = 0;
519 * Allow the user to impress friends.
521 pr_debug("Before bogomips.\n");
522 for_each_possible_cpu(cpu)
523 if (cpu_isset(cpu, cpu_callout_map))
524 bogosum += cpu_data(cpu).loops_per_jiffy;
526 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
529 (bogosum/(5000/HZ))%100);
531 pr_debug("Before bogocount - setting activated=1.\n");
534 void __inquire_remote_apic(int apicid)
536 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
537 char *names[] = { "ID", "VERSION", "SPIV" };
541 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid);
543 for (i = 0; i < ARRAY_SIZE(regs); i++) {
544 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]);
549 status = safe_apic_wait_icr_idle();
552 "a previous APIC delivery may have failed\n");
554 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
559 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
560 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
563 case APIC_ICR_RR_VALID:
564 status = apic_read(APIC_RRR);
565 printk(KERN_CONT "%08x\n", status);
568 printk(KERN_CONT "failed\n");
574 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
575 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
576 * won't ... remember to clear down the APIC, etc later.
579 wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
581 unsigned long send_status, accept_status = 0;
585 /* Boot on the stack */
586 /* Kick the second */
587 apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid);
589 pr_debug("Waiting for send to finish...\n");
590 send_status = safe_apic_wait_icr_idle();
593 * Give the other CPU some time to accept the IPI.
596 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
597 maxlvt = lapic_get_maxlvt();
598 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
599 apic_write(APIC_ESR, 0);
600 accept_status = (apic_read(APIC_ESR) & 0xEF);
602 pr_debug("NMI sent.\n");
605 printk(KERN_ERR "APIC never delivered???\n");
607 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
609 return (send_status | accept_status);
613 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
615 unsigned long send_status, accept_status = 0;
616 int maxlvt, num_starts, j;
618 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) {
619 send_status = uv_wakeup_secondary(phys_apicid, start_eip);
620 atomic_set(&init_deasserted, 1);
624 maxlvt = lapic_get_maxlvt();
627 * Be paranoid about clearing APIC errors.
629 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
630 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
631 apic_write(APIC_ESR, 0);
635 pr_debug("Asserting INIT.\n");
638 * Turn INIT on target chip
643 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
646 pr_debug("Waiting for send to finish...\n");
647 send_status = safe_apic_wait_icr_idle();
651 pr_debug("Deasserting INIT.\n");
655 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
657 pr_debug("Waiting for send to finish...\n");
658 send_status = safe_apic_wait_icr_idle();
661 atomic_set(&init_deasserted, 1);
664 * Should we send STARTUP IPIs ?
666 * Determine this based on the APIC version.
667 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
669 if (APIC_INTEGRATED(apic_version[phys_apicid]))
675 * Paravirt / VMI wants a startup IPI hook here to set up the
676 * target processor state.
678 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
679 (unsigned long)stack_start.sp);
682 * Run STARTUP IPI loop.
684 pr_debug("#startup loops: %d.\n", num_starts);
686 for (j = 1; j <= num_starts; j++) {
687 pr_debug("Sending STARTUP #%d.\n", j);
688 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
689 apic_write(APIC_ESR, 0);
691 pr_debug("After apic_write.\n");
698 /* Boot on the stack */
699 /* Kick the second */
700 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
704 * Give the other CPU some time to accept the IPI.
708 pr_debug("Startup point 1.\n");
710 pr_debug("Waiting for send to finish...\n");
711 send_status = safe_apic_wait_icr_idle();
714 * Give the other CPU some time to accept the IPI.
717 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
718 apic_write(APIC_ESR, 0);
719 accept_status = (apic_read(APIC_ESR) & 0xEF);
720 if (send_status || accept_status)
723 pr_debug("After Startup.\n");
726 printk(KERN_ERR "APIC never delivered???\n");
728 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
730 return (send_status | accept_status);
734 struct work_struct work;
735 struct task_struct *idle;
736 struct completion done;
740 static void __cpuinit do_fork_idle(struct work_struct *work)
742 struct create_idle *c_idle =
743 container_of(work, struct create_idle, work);
745 c_idle->idle = fork_idle(c_idle->cpu);
746 complete(&c_idle->done);
751 /* __ref because it's safe to call free_bootmem when after_bootmem == 0. */
752 static void __ref free_bootmem_pda(struct x8664_pda *oldpda)
755 free_bootmem((unsigned long)oldpda, sizeof(*oldpda));
759 * Allocate node local memory for the AP pda.
761 * Must be called after the _cpu_pda pointer table is initialized.
763 int __cpuinit get_local_pda(int cpu)
765 struct x8664_pda *oldpda, *newpda;
766 unsigned long size = sizeof(struct x8664_pda);
767 int node = cpu_to_node(cpu);
769 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem)
772 oldpda = cpu_pda(cpu);
773 newpda = kmalloc_node(size, GFP_ATOMIC, node);
775 printk(KERN_ERR "Could not allocate node local PDA "
776 "for CPU %d on node %d\n", cpu, node);
779 return 0; /* have a usable pda */
785 memcpy(newpda, oldpda, size);
786 free_bootmem_pda(oldpda);
789 newpda->in_bootmem = 0;
790 cpu_pda(cpu) = newpda;
793 #endif /* CONFIG_X86_64 */
795 static int __cpuinit do_boot_cpu(int apicid, int cpu)
797 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
798 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
799 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
802 unsigned long boot_error = 0;
804 unsigned long start_ip;
805 unsigned short nmi_high = 0, nmi_low = 0;
806 struct create_idle c_idle = {
808 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
810 INIT_WORK(&c_idle.work, do_fork_idle);
813 /* Allocate node local memory for AP pdas */
815 boot_error = get_local_pda(cpu);
818 /* if can't get pda memory, can't start cpu */
822 alternatives_smp_switch(1);
824 c_idle.idle = get_idle_for_cpu(cpu);
827 * We can't use kernel_thread since we must avoid to
828 * reschedule the child.
831 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
832 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
833 init_idle(c_idle.idle, cpu);
837 if (!keventd_up() || current_is_keventd())
838 c_idle.work.func(&c_idle.work);
840 schedule_work(&c_idle.work);
841 wait_for_completion(&c_idle.done);
844 if (IS_ERR(c_idle.idle)) {
845 printk("failed fork for CPU %d\n", cpu);
846 return PTR_ERR(c_idle.idle);
849 set_idle_for_cpu(cpu, c_idle.idle);
852 per_cpu(current_task, cpu) = c_idle.idle;
854 /* Stack for startup_32 can be just as for start_secondary onwards */
857 cpu_pda(cpu)->pcurrent = c_idle.idle;
858 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
860 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
861 initial_code = (unsigned long)start_secondary;
862 stack_start.sp = (void *) c_idle.idle->thread.sp;
864 /* start_ip had better be page-aligned! */
865 start_ip = setup_trampoline();
867 /* So we see what's up */
868 printk(KERN_INFO "Booting processor %d APIC 0x%x ip 0x%lx\n",
869 cpu, apicid, start_ip);
872 * This grunge runs the startup process for
873 * the targeted processor.
876 atomic_set(&init_deasserted, 0);
878 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
880 pr_debug("Setting warm reset code and vector.\n");
882 store_NMI_vector(&nmi_high, &nmi_low);
884 smpboot_setup_warm_reset_vector(start_ip);
886 * Be paranoid about clearing APIC errors.
888 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
889 apic_write(APIC_ESR, 0);
895 * Starting actual IPI sequence...
897 boot_error = wakeup_secondary_cpu(apicid, start_ip);
901 * allow APs to start initializing.
903 pr_debug("Before Callout %d.\n", cpu);
904 cpu_set(cpu, cpu_callout_map);
905 pr_debug("After Callout %d.\n", cpu);
908 * Wait 5s total for a response
910 for (timeout = 0; timeout < 50000; timeout++) {
911 if (cpu_isset(cpu, cpu_callin_map))
912 break; /* It has booted */
916 if (cpu_isset(cpu, cpu_callin_map)) {
917 /* number CPUs logically, starting from 1 (BSP is 0) */
919 printk(KERN_INFO "CPU%d: ", cpu);
920 print_cpu_info(&cpu_data(cpu));
921 pr_debug("CPU has booted.\n");
924 if (*((volatile unsigned char *)trampoline_base)
926 /* trampoline started but...? */
927 printk(KERN_ERR "Stuck ??\n");
929 /* trampoline code not run */
930 printk(KERN_ERR "Not responding.\n");
931 if (get_uv_system_type() != UV_NON_UNIQUE_APIC)
932 inquire_remote_apic(apicid);
939 /* Try to put things back the way they were before ... */
940 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
941 cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */
942 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
943 cpu_clear(cpu, cpu_present_map);
944 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
947 /* mark "stuck" area as not stuck */
948 *((volatile unsigned long *)trampoline_base) = 0;
951 * Cleanup possible dangling ends...
953 smpboot_restore_warm_reset_vector();
958 int __cpuinit native_cpu_up(unsigned int cpu)
960 int apicid = cpu_present_to_apicid(cpu);
964 WARN_ON(irqs_disabled());
966 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
968 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
969 !physid_isset(apicid, phys_cpu_present_map)) {
970 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
975 * Already booted CPU?
977 if (cpu_isset(cpu, cpu_callin_map)) {
978 pr_debug("do_boot_cpu %d Already started\n", cpu);
983 * Save current MTRR state in case it was changed since early boot
984 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
988 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
991 /* init low mem mapping */
992 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
993 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
997 err = do_boot_cpu(apicid, cpu);
1002 err = do_boot_cpu(apicid, cpu);
1005 pr_debug("do_boot_cpu failed %d\n", err);
1010 * Check TSC synchronization with the AP (keep irqs disabled
1013 local_irq_save(flags);
1014 check_tsc_sync_source(cpu);
1015 local_irq_restore(flags);
1017 while (!cpu_online(cpu)) {
1019 touch_nmi_watchdog();
1026 * Fall back to non SMP mode after errors.
1028 * RED-PEN audit/test this more. I bet there is more state messed up here.
1030 static __init void disable_smp(void)
1032 cpu_present_map = cpumask_of_cpu(0);
1033 cpu_possible_map = cpumask_of_cpu(0);
1034 smpboot_clear_io_apic_irqs();
1036 if (smp_found_config)
1037 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1039 physid_set_mask_of_physid(0, &phys_cpu_present_map);
1040 map_cpu_to_logical_apicid();
1041 cpu_set(0, per_cpu(cpu_sibling_map, 0));
1042 cpu_set(0, per_cpu(cpu_core_map, 0));
1046 * Various sanity checks.
1048 static int __init smp_sanity_check(unsigned max_cpus)
1052 #if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32)
1053 if (def_to_bigsmp && nr_cpu_ids > 8) {
1058 "More than 8 CPUs detected - skipping them.\n"
1059 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
1062 for_each_present_cpu(cpu) {
1064 cpu_clear(cpu, cpu_present_map);
1069 for_each_possible_cpu(cpu) {
1071 cpu_clear(cpu, cpu_possible_map);
1079 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1080 printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
1081 "by the BIOS.\n", hard_smp_processor_id());
1082 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1086 * If we couldn't find an SMP configuration at boot time,
1087 * get out of here now!
1089 if (!smp_found_config && !acpi_lapic) {
1091 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1093 if (APIC_init_uniprocessor())
1094 printk(KERN_NOTICE "Local APIC not detected."
1095 " Using dummy APIC emulation.\n");
1100 * Should not be necessary because the MP table should list the boot
1101 * CPU too, but we do it for the sake of robustness anyway.
1103 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
1105 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1106 boot_cpu_physical_apicid);
1107 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1112 * If we couldn't find a local APIC, then get out of here now!
1114 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1116 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1117 boot_cpu_physical_apicid);
1118 printk(KERN_ERR "... forcing use of dummy APIC emulation."
1119 "(tell your hw vendor)\n");
1120 smpboot_clear_io_apic();
1124 verify_local_APIC();
1127 * If SMP should be disabled, then really disable it!
1130 printk(KERN_INFO "SMP mode deactivated.\n");
1131 smpboot_clear_io_apic();
1133 localise_nmi_watchdog();
1137 end_local_APIC_setup();
1144 static void __init smp_cpu_index_default(void)
1147 struct cpuinfo_x86 *c;
1149 for_each_possible_cpu(i) {
1151 /* mark all to hotplug */
1152 c->cpu_index = NR_CPUS;
1157 * Prepare for SMP bootup. The MP table or ACPI has been read
1158 * earlier. Just do some sanity checking here and enable APIC mode.
1160 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1163 smp_cpu_index_default();
1164 current_cpu_data = boot_cpu_data;
1165 cpu_callin_map = cpumask_of_cpu(0);
1168 * Setup boot CPU information
1170 smp_store_cpu_info(0); /* Final full version of the data */
1171 #ifdef CONFIG_X86_32
1172 boot_cpu_logical_apicid = logical_smp_processor_id();
1174 current_thread_info()->cpu = 0; /* needed? */
1175 set_cpu_sibling_map(0);
1177 #ifdef CONFIG_X86_64
1179 setup_apic_routing();
1182 if (smp_sanity_check(max_cpus) < 0) {
1183 printk(KERN_INFO "SMP disabled\n");
1189 if (read_apic_id() != boot_cpu_physical_apicid) {
1190 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1191 read_apic_id(), boot_cpu_physical_apicid);
1192 /* Or can we switch back to PIC here? */
1199 * Switch from PIC to APIC mode.
1203 #ifdef CONFIG_X86_64
1205 * Enable IO APIC before setting up error vector
1207 if (!skip_ioapic_setup && nr_ioapics)
1210 end_local_APIC_setup();
1212 map_cpu_to_logical_apicid();
1214 setup_portio_remap();
1216 smpboot_setup_io_apic();
1218 * Set up local APIC timer on boot CPU.
1221 printk(KERN_INFO "CPU%d: ", 0);
1222 print_cpu_info(&cpu_data(0));
1231 * Early setup to make printk work.
1233 void __init native_smp_prepare_boot_cpu(void)
1235 int me = smp_processor_id();
1236 #ifdef CONFIG_X86_32
1239 switch_to_new_gdt();
1240 /* already set me in cpu_online_map in boot_cpu_init() */
1241 cpu_set(me, cpu_callout_map);
1242 per_cpu(cpu_state, me) = CPU_ONLINE;
1245 void __init native_smp_cpus_done(unsigned int max_cpus)
1247 pr_debug("Boot done.\n");
1251 #ifdef CONFIG_X86_IO_APIC
1252 setup_ioapic_dest();
1254 check_nmi_watchdog();
1258 * cpu_possible_map should be static, it cannot change as cpu's
1259 * are onlined, or offlined. The reason is per-cpu data-structures
1260 * are allocated by some modules at init time, and dont expect to
1261 * do this dynamically on cpu arrival/departure.
1262 * cpu_present_map on the other hand can change dynamically.
1263 * In case when cpu_hotplug is not compiled, then we resort to current
1264 * behaviour, which is cpu_possible == cpu_present.
1267 * Three ways to find out the number of additional hotplug CPUs:
1268 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1269 * - The user can overwrite it with additional_cpus=NUM
1270 * - Otherwise don't reserve additional CPUs.
1271 * We do this because additional CPUs waste a lot of memory.
1274 __init void prefill_possible_map(void)
1278 /* no processor from mptable or madt */
1279 if (!num_processors)
1282 possible = num_processors + disabled_cpus;
1283 if (possible > NR_CPUS)
1286 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1287 possible, max_t(int, possible - num_processors, 0));
1289 for (i = 0; i < possible; i++)
1290 cpu_set(i, cpu_possible_map);
1292 nr_cpu_ids = possible;
1295 #ifdef CONFIG_HOTPLUG_CPU
1297 static void remove_siblinginfo(int cpu)
1300 struct cpuinfo_x86 *c = &cpu_data(cpu);
1302 for_each_cpu_mask_nr(sibling, per_cpu(cpu_core_map, cpu)) {
1303 cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
1305 * last thread sibling in this cpu core going down
1307 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
1308 cpu_data(sibling).booted_cores--;
1311 for_each_cpu_mask_nr(sibling, per_cpu(cpu_sibling_map, cpu))
1312 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
1313 cpus_clear(per_cpu(cpu_sibling_map, cpu));
1314 cpus_clear(per_cpu(cpu_core_map, cpu));
1315 c->phys_proc_id = 0;
1317 cpu_clear(cpu, cpu_sibling_setup_map);
1320 static void __ref remove_cpu_from_maps(int cpu)
1322 cpu_clear(cpu, cpu_online_map);
1323 cpu_clear(cpu, cpu_callout_map);
1324 cpu_clear(cpu, cpu_callin_map);
1325 /* was set by cpu_init() */
1326 cpu_clear(cpu, cpu_initialized);
1327 numa_remove_cpu(cpu);
1330 void cpu_disable_common(void)
1332 int cpu = smp_processor_id();
1335 * Allow any queued timer interrupts to get serviced
1336 * This is only a temporary solution until we cleanup
1337 * fixup_irqs as we do for IA64.
1342 local_irq_disable();
1343 remove_siblinginfo(cpu);
1345 /* It's now safe to remove this processor from the online map */
1347 remove_cpu_from_maps(cpu);
1348 unlock_vector_lock();
1352 int native_cpu_disable(void)
1354 int cpu = smp_processor_id();
1357 * Perhaps use cpufreq to drop frequency, but that could go
1358 * into generic code.
1360 * We won't take down the boot processor on i386 due to some
1361 * interrupts only being able to be serviced by the BSP.
1362 * Especially so if we're not using an IOAPIC -zwane
1367 if (nmi_watchdog == NMI_LOCAL_APIC)
1368 stop_apic_nmi_watchdog(NULL);
1371 cpu_disable_common();
1375 void native_cpu_die(unsigned int cpu)
1377 /* We don't do anything here: idle task is faking death itself. */
1380 for (i = 0; i < 10; i++) {
1381 /* They ack this in play_dead by setting CPU_DEAD */
1382 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1383 printk(KERN_INFO "CPU %d is now offline\n", cpu);
1384 if (1 == num_online_cpus())
1385 alternatives_smp_switch(0);
1390 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1393 void play_dead_common(void)
1396 reset_lazy_tlbstate();
1397 irq_ctx_exit(raw_smp_processor_id());
1398 c1e_remove_cpu(raw_smp_processor_id());
1402 __get_cpu_var(cpu_state) = CPU_DEAD;
1405 * With physical CPU hotplug, we should halt the cpu
1407 local_irq_disable();
1410 void native_play_dead(void)
1416 #else /* ... !CONFIG_HOTPLUG_CPU */
1417 int native_cpu_disable(void)
1422 void native_cpu_die(unsigned int cpu)
1424 /* We said "no" in __cpu_disable */
1428 void native_play_dead(void)