2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
56 #include <asm/trampoline.h>
59 #include <asm/pgtable.h>
60 #include <asm/tlbflush.h>
63 #include <asm/genapic.h>
64 #include <linux/mc146818rtc.h>
66 #include <mach_apic.h>
67 #include <mach_wakecpu.h>
68 #include <smpboot_hooks.h>
71 u8 apicid_2_node[MAX_APICID];
72 static int low_mappings;
75 /* State of each CPU */
76 DEFINE_PER_CPU(int, cpu_state) = { 0 };
78 /* Store all idle threads, this can be reused instead of creating
79 * a new thread. Also avoids complicated thread destroy functionality
82 #ifdef CONFIG_HOTPLUG_CPU
84 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
85 * removed after init for !CONFIG_HOTPLUG_CPU.
87 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
88 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
89 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
91 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
92 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
93 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
96 /* Number of siblings per CPU package */
97 int smp_num_siblings = 1;
98 EXPORT_SYMBOL(smp_num_siblings);
100 /* Last level cache ID of each logical CPU */
101 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
103 /* bitmap of online cpus */
104 cpumask_t cpu_online_map __read_mostly;
105 EXPORT_SYMBOL(cpu_online_map);
107 cpumask_t cpu_callin_map;
108 cpumask_t cpu_callout_map;
109 cpumask_t cpu_possible_map;
110 EXPORT_SYMBOL(cpu_possible_map);
112 /* representing HT siblings of each logical CPU */
113 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
114 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
116 /* representing HT and core siblings of each logical CPU */
117 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
118 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
120 /* Per CPU bogomips and other parameters */
121 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
122 EXPORT_PER_CPU_SYMBOL(cpu_info);
124 static atomic_t init_deasserted;
126 static int boot_cpu_logical_apicid;
128 /* representing cpus for which sibling maps can be computed */
129 static cpumask_t cpu_sibling_setup_map;
131 /* Set if we find a B stepping CPU */
132 int __cpuinitdata smp_b_stepping;
134 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
136 /* which logical CPUs are on which nodes */
137 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
138 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
139 EXPORT_SYMBOL(node_to_cpumask_map);
140 /* which node each logical CPU is on */
141 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
142 EXPORT_SYMBOL(cpu_to_node_map);
144 /* set up a mapping between cpu and node. */
145 static void map_cpu_to_node(int cpu, int node)
147 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
148 cpu_set(cpu, node_to_cpumask_map[node]);
149 cpu_to_node_map[cpu] = node;
152 /* undo a mapping between cpu and node. */
153 static void unmap_cpu_to_node(int cpu)
157 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
158 for (node = 0; node < MAX_NUMNODES; node++)
159 cpu_clear(cpu, node_to_cpumask_map[node]);
160 cpu_to_node_map[cpu] = 0;
162 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
163 #define map_cpu_to_node(cpu, node) ({})
164 #define unmap_cpu_to_node(cpu) ({})
168 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
169 { [0 ... NR_CPUS-1] = BAD_APICID };
171 static void map_cpu_to_logical_apicid(void)
173 int cpu = smp_processor_id();
174 int apicid = logical_smp_processor_id();
175 int node = apicid_to_node(apicid);
177 if (!node_online(node))
178 node = first_online_node;
180 cpu_2_logical_apicid[cpu] = apicid;
181 map_cpu_to_node(cpu, node);
184 static void unmap_cpu_to_logical_apicid(int cpu)
186 cpu_2_logical_apicid[cpu] = BAD_APICID;
187 unmap_cpu_to_node(cpu);
190 #define unmap_cpu_to_logical_apicid(cpu) do {} while (0)
191 #define map_cpu_to_logical_apicid() do {} while (0)
195 * Report back to the Boot Processor.
198 static void __cpuinit smp_callin(void)
201 unsigned long timeout;
204 * If waken up by an INIT in an 82489DX configuration
205 * we may get here before an INIT-deassert IPI reaches
206 * our local APIC. We have to wait for the IPI or we'll
207 * lock up on an APIC access.
209 wait_for_init_deassert(&init_deasserted);
212 * (This works even if the APIC is not enabled.)
214 phys_id = GET_APIC_ID(read_apic_id());
215 cpuid = smp_processor_id();
216 if (cpu_isset(cpuid, cpu_callin_map)) {
217 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
220 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
223 * STARTUP IPIs are fragile beasts as they might sometimes
224 * trigger some glue motherboard logic. Complete APIC bus
225 * silence for 1 second, this overestimates the time the
226 * boot CPU is spending to send the up to 2 STARTUP IPIs
227 * by a factor of two. This should be enough.
231 * Waiting 2s total for startup (udelay is not yet working)
233 timeout = jiffies + 2*HZ;
234 while (time_before(jiffies, timeout)) {
236 * Has the boot CPU finished it's STARTUP sequence?
238 if (cpu_isset(cpuid, cpu_callout_map))
243 if (!time_before(jiffies, timeout)) {
244 panic("%s: CPU%d started up but did not get a callout!\n",
249 * the boot CPU has finished the init stage and is spinning
250 * on callin_map until we finish. We are free to set up this
251 * CPU, first the APIC. (this is probably redundant on most
255 Dprintk("CALLIN, before setup_local_APIC().\n");
256 smp_callin_clear_local_apic();
258 end_local_APIC_setup();
259 map_cpu_to_logical_apicid();
264 * Need to enable IRQs because it can take longer and then
265 * the NMI watchdog might kill us.
270 Dprintk("Stack at about %p\n", &cpuid);
273 * Save our processor parameters
275 smp_store_cpu_info(cpuid);
278 * Allow the master to continue.
280 cpu_set(cpuid, cpu_callin_map);
284 * Activate a secondary processor.
286 static void __cpuinit start_secondary(void *unused)
289 * Don't put *anything* before cpu_init(), SMP booting is too
290 * fragile that we want to limit the things done here to the
291 * most necessary things.
300 /* otherwise gcc will move up smp_processor_id before the cpu_init */
303 * Check TSC synchronization with the BP:
305 check_tsc_sync_target();
307 if (nmi_watchdog == NMI_IO_APIC) {
308 disable_8259A_irq(0);
309 enable_NMI_through_LVT0();
319 /* This must be done before setting cpu_online_map */
320 set_cpu_sibling_map(raw_smp_processor_id());
324 * We need to hold call_lock, so there is no inconsistency
325 * between the time smp_call_function() determines number of
326 * IPI recipients, and the time when the determination is made
327 * for which cpus receive the IPI. Holding this
328 * lock helps us to not include this cpu in a currently in progress
329 * smp_call_function().
331 lock_ipi_call_lock();
332 #ifdef CONFIG_X86_IO_APIC
333 setup_vector_irq(smp_processor_id());
335 cpu_set(smp_processor_id(), cpu_online_map);
336 unlock_ipi_call_lock();
337 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
339 setup_secondary_clock();
345 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
348 * Mask B, Pentium, but not Pentium MMX
350 if (c->x86_vendor == X86_VENDOR_INTEL &&
352 c->x86_mask >= 1 && c->x86_mask <= 4 &&
355 * Remember we have B step Pentia with bugs
360 * Certain Athlons might work (for various values of 'work') in SMP
361 * but they are not certified as MP capable.
363 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
365 if (num_possible_cpus() == 1)
368 /* Athlon 660/661 is valid. */
369 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
373 /* Duron 670 is valid */
374 if ((c->x86_model == 7) && (c->x86_mask == 0))
378 * Athlon 662, Duron 671, and Athlon >model 7 have capability
379 * bit. It's worth noting that the A5 stepping (662) of some
380 * Athlon XP's have the MP bit set.
381 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
384 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
385 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
390 /* If we get here, not a certified SMP capable AMD system. */
391 add_taint(TAINT_UNSAFE_SMP);
398 static void __cpuinit smp_checks(void)
401 printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
402 "with B stepping processors.\n");
405 * Don't taint if we are running SMP kernel on a single non-MP
408 if (tainted & TAINT_UNSAFE_SMP) {
409 if (num_online_cpus())
410 printk(KERN_INFO "WARNING: This combination of AMD"
411 "processors is not suitable for SMP.\n");
413 tainted &= ~TAINT_UNSAFE_SMP;
418 * The bootstrap kernel entry code has set these up. Save them for
422 void __cpuinit smp_store_cpu_info(int id)
424 struct cpuinfo_x86 *c = &cpu_data(id);
429 identify_secondary_cpu(c);
434 void __cpuinit set_cpu_sibling_map(int cpu)
437 struct cpuinfo_x86 *c = &cpu_data(cpu);
439 cpu_set(cpu, cpu_sibling_setup_map);
441 if (smp_num_siblings > 1) {
442 for_each_cpu_mask(i, cpu_sibling_setup_map) {
443 if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
444 c->cpu_core_id == cpu_data(i).cpu_core_id) {
445 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
446 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
447 cpu_set(i, per_cpu(cpu_core_map, cpu));
448 cpu_set(cpu, per_cpu(cpu_core_map, i));
449 cpu_set(i, c->llc_shared_map);
450 cpu_set(cpu, cpu_data(i).llc_shared_map);
454 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
457 cpu_set(cpu, c->llc_shared_map);
459 if (current_cpu_data.x86_max_cores == 1) {
460 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
465 for_each_cpu_mask(i, cpu_sibling_setup_map) {
466 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
467 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
468 cpu_set(i, c->llc_shared_map);
469 cpu_set(cpu, cpu_data(i).llc_shared_map);
471 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
472 cpu_set(i, per_cpu(cpu_core_map, cpu));
473 cpu_set(cpu, per_cpu(cpu_core_map, i));
475 * Does this new cpu bringup a new core?
477 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
479 * for each core in package, increment
480 * the booted_cores for this new cpu
482 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
485 * increment the core count for all
486 * the other cpus in this package
489 cpu_data(i).booted_cores++;
490 } else if (i != cpu && !c->booted_cores)
491 c->booted_cores = cpu_data(i).booted_cores;
496 /* maps the cpu to the sched domain representing multi-core */
497 cpumask_t cpu_coregroup_map(int cpu)
499 struct cpuinfo_x86 *c = &cpu_data(cpu);
501 * For perf, we return last level cache shared map.
502 * And for power savings, we return cpu_core_map
504 if (sched_mc_power_savings || sched_smt_power_savings)
505 return per_cpu(cpu_core_map, cpu);
507 return c->llc_shared_map;
510 static void impress_friends(void)
513 unsigned long bogosum = 0;
515 * Allow the user to impress friends.
517 Dprintk("Before bogomips.\n");
518 for_each_possible_cpu(cpu)
519 if (cpu_isset(cpu, cpu_callout_map))
520 bogosum += cpu_data(cpu).loops_per_jiffy;
522 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
525 (bogosum/(5000/HZ))%100);
527 Dprintk("Before bogocount - setting activated=1.\n");
530 static inline void __inquire_remote_apic(int apicid)
532 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
533 char *names[] = { "ID", "VERSION", "SPIV" };
537 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
539 for (i = 0; i < ARRAY_SIZE(regs); i++) {
540 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
545 status = safe_apic_wait_icr_idle();
548 "a previous APIC delivery may have failed\n");
550 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
551 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
556 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
557 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
560 case APIC_ICR_RR_VALID:
561 status = apic_read(APIC_RRR);
562 printk(KERN_CONT "%08x\n", status);
565 printk(KERN_CONT "failed\n");
570 #ifdef WAKE_SECONDARY_VIA_NMI
572 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
573 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
574 * won't ... remember to clear down the APIC, etc later.
577 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
579 unsigned long send_status, accept_status = 0;
583 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
585 /* Boot on the stack */
586 /* Kick the second */
587 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
589 Dprintk("Waiting for send to finish...\n");
590 send_status = safe_apic_wait_icr_idle();
593 * Give the other CPU some time to accept the IPI.
597 * Due to the Pentium erratum 3AP.
599 maxlvt = lapic_get_maxlvt();
601 apic_read_around(APIC_SPIV);
602 apic_write(APIC_ESR, 0);
604 accept_status = (apic_read(APIC_ESR) & 0xEF);
605 Dprintk("NMI sent.\n");
608 printk(KERN_ERR "APIC never delivered???\n");
610 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
612 return (send_status | accept_status);
614 #endif /* WAKE_SECONDARY_VIA_NMI */
616 #ifdef WAKE_SECONDARY_VIA_INIT
618 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
620 unsigned long send_status, accept_status = 0;
621 int maxlvt, num_starts, j;
623 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) {
624 send_status = uv_wakeup_secondary(phys_apicid, start_eip);
625 atomic_set(&init_deasserted, 1);
630 * Be paranoid about clearing APIC errors.
632 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
633 apic_read_around(APIC_SPIV);
634 apic_write(APIC_ESR, 0);
638 Dprintk("Asserting INIT.\n");
641 * Turn INIT on target chip
643 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
648 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
651 Dprintk("Waiting for send to finish...\n");
652 send_status = safe_apic_wait_icr_idle();
656 Dprintk("Deasserting INIT.\n");
659 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
662 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
664 Dprintk("Waiting for send to finish...\n");
665 send_status = safe_apic_wait_icr_idle();
668 atomic_set(&init_deasserted, 1);
671 * Should we send STARTUP IPIs ?
673 * Determine this based on the APIC version.
674 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
676 if (APIC_INTEGRATED(apic_version[phys_apicid]))
682 * Paravirt / VMI wants a startup IPI hook here to set up the
683 * target processor state.
685 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
686 (unsigned long)stack_start.sp);
689 * Run STARTUP IPI loop.
691 Dprintk("#startup loops: %d.\n", num_starts);
693 maxlvt = lapic_get_maxlvt();
695 for (j = 1; j <= num_starts; j++) {
696 Dprintk("Sending STARTUP #%d.\n", j);
697 apic_read_around(APIC_SPIV);
698 apic_write(APIC_ESR, 0);
700 Dprintk("After apic_write.\n");
707 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
709 /* Boot on the stack */
710 /* Kick the second */
711 apic_write_around(APIC_ICR, APIC_DM_STARTUP
712 | (start_eip >> 12));
715 * Give the other CPU some time to accept the IPI.
719 Dprintk("Startup point 1.\n");
721 Dprintk("Waiting for send to finish...\n");
722 send_status = safe_apic_wait_icr_idle();
725 * Give the other CPU some time to accept the IPI.
729 * Due to the Pentium erratum 3AP.
732 apic_read_around(APIC_SPIV);
733 apic_write(APIC_ESR, 0);
735 accept_status = (apic_read(APIC_ESR) & 0xEF);
736 if (send_status || accept_status)
739 Dprintk("After Startup.\n");
742 printk(KERN_ERR "APIC never delivered???\n");
744 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
746 return (send_status | accept_status);
748 #endif /* WAKE_SECONDARY_VIA_INIT */
751 struct work_struct work;
752 struct task_struct *idle;
753 struct completion done;
757 static void __cpuinit do_fork_idle(struct work_struct *work)
759 struct create_idle *c_idle =
760 container_of(work, struct create_idle, work);
762 c_idle->idle = fork_idle(c_idle->cpu);
763 complete(&c_idle->done);
768 * Allocate node local memory for the AP pda.
770 * Must be called after the _cpu_pda pointer table is initialized.
772 static int __cpuinit get_local_pda(int cpu)
774 struct x8664_pda *oldpda, *newpda;
775 unsigned long size = sizeof(struct x8664_pda);
776 int node = cpu_to_node(cpu);
778 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem)
781 oldpda = cpu_pda(cpu);
782 newpda = kmalloc_node(size, GFP_ATOMIC, node);
784 printk(KERN_ERR "Could not allocate node local PDA "
785 "for CPU %d on node %d\n", cpu, node);
788 return 0; /* have a usable pda */
794 memcpy(newpda, oldpda, size);
796 free_bootmem((unsigned long)oldpda, size);
799 newpda->in_bootmem = 0;
800 cpu_pda(cpu) = newpda;
803 #endif /* CONFIG_X86_64 */
805 static int __cpuinit do_boot_cpu(int apicid, int cpu)
807 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
808 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
809 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
812 unsigned long boot_error = 0;
814 unsigned long start_ip;
815 unsigned short nmi_high = 0, nmi_low = 0;
816 struct create_idle c_idle = {
818 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
820 INIT_WORK(&c_idle.work, do_fork_idle);
823 /* Allocate node local memory for AP pdas */
825 boot_error = get_local_pda(cpu);
828 /* if can't get pda memory, can't start cpu */
832 alternatives_smp_switch(1);
834 c_idle.idle = get_idle_for_cpu(cpu);
837 * We can't use kernel_thread since we must avoid to
838 * reschedule the child.
841 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
842 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
843 init_idle(c_idle.idle, cpu);
847 if (!keventd_up() || current_is_keventd())
848 c_idle.work.func(&c_idle.work);
850 schedule_work(&c_idle.work);
851 wait_for_completion(&c_idle.done);
854 if (IS_ERR(c_idle.idle)) {
855 printk("failed fork for CPU %d\n", cpu);
856 return PTR_ERR(c_idle.idle);
859 set_idle_for_cpu(cpu, c_idle.idle);
862 per_cpu(current_task, cpu) = c_idle.idle;
864 /* Stack for startup_32 can be just as for start_secondary onwards */
867 cpu_pda(cpu)->pcurrent = c_idle.idle;
868 load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
869 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
871 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
872 initial_code = (unsigned long)start_secondary;
873 stack_start.sp = (void *) c_idle.idle->thread.sp;
875 /* start_ip had better be page-aligned! */
876 start_ip = setup_trampoline();
878 /* So we see what's up */
879 printk(KERN_INFO "Booting processor %d/%d ip %lx\n",
880 cpu, apicid, start_ip);
883 * This grunge runs the startup process for
884 * the targeted processor.
887 atomic_set(&init_deasserted, 0);
889 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
891 Dprintk("Setting warm reset code and vector.\n");
893 store_NMI_vector(&nmi_high, &nmi_low);
895 smpboot_setup_warm_reset_vector(start_ip);
897 * Be paranoid about clearing APIC errors.
899 apic_write(APIC_ESR, 0);
904 * Starting actual IPI sequence...
906 boot_error = wakeup_secondary_cpu(apicid, start_ip);
910 * allow APs to start initializing.
912 Dprintk("Before Callout %d.\n", cpu);
913 cpu_set(cpu, cpu_callout_map);
914 Dprintk("After Callout %d.\n", cpu);
917 * Wait 5s total for a response
919 for (timeout = 0; timeout < 50000; timeout++) {
920 if (cpu_isset(cpu, cpu_callin_map))
921 break; /* It has booted */
925 if (cpu_isset(cpu, cpu_callin_map)) {
926 /* number CPUs logically, starting from 1 (BSP is 0) */
928 printk(KERN_INFO "CPU%d: ", cpu);
929 print_cpu_info(&cpu_data(cpu));
930 Dprintk("CPU has booted.\n");
933 if (*((volatile unsigned char *)trampoline_base)
935 /* trampoline started but...? */
936 printk(KERN_ERR "Stuck ??\n");
938 /* trampoline code not run */
939 printk(KERN_ERR "Not responding.\n");
940 if (get_uv_system_type() != UV_NON_UNIQUE_APIC)
941 inquire_remote_apic(apicid);
948 /* Try to put things back the way they were before ... */
949 unmap_cpu_to_logical_apicid(cpu);
951 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
953 cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */
954 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
955 cpu_clear(cpu, cpu_present_map);
956 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
959 /* mark "stuck" area as not stuck */
960 *((volatile unsigned long *)trampoline_base) = 0;
963 * Cleanup possible dangling ends...
965 smpboot_restore_warm_reset_vector();
970 int __cpuinit native_cpu_up(unsigned int cpu)
972 int apicid = cpu_present_to_apicid(cpu);
976 WARN_ON(irqs_disabled());
978 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
980 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
981 !physid_isset(apicid, phys_cpu_present_map)) {
982 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
987 * Already booted CPU?
989 if (cpu_isset(cpu, cpu_callin_map)) {
990 Dprintk("do_boot_cpu %d Already started\n", cpu);
995 * Save current MTRR state in case it was changed since early boot
996 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
1000 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
1002 #ifdef CONFIG_X86_32
1003 /* init low mem mapping */
1004 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
1005 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
1009 err = do_boot_cpu(apicid, cpu);
1014 err = do_boot_cpu(apicid, cpu);
1017 Dprintk("do_boot_cpu failed %d\n", err);
1022 * Check TSC synchronization with the AP (keep irqs disabled
1025 local_irq_save(flags);
1026 check_tsc_sync_source(cpu);
1027 local_irq_restore(flags);
1029 while (!cpu_online(cpu)) {
1031 touch_nmi_watchdog();
1038 * Fall back to non SMP mode after errors.
1040 * RED-PEN audit/test this more. I bet there is more state messed up here.
1042 static __init void disable_smp(void)
1044 cpu_present_map = cpumask_of_cpu(0);
1045 cpu_possible_map = cpumask_of_cpu(0);
1046 smpboot_clear_io_apic_irqs();
1048 if (smp_found_config)
1049 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1051 physid_set_mask_of_physid(0, &phys_cpu_present_map);
1052 map_cpu_to_logical_apicid();
1053 cpu_set(0, per_cpu(cpu_sibling_map, 0));
1054 cpu_set(0, per_cpu(cpu_core_map, 0));
1058 * Various sanity checks.
1060 static int __init smp_sanity_check(unsigned max_cpus)
1063 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1064 printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
1065 "by the BIOS.\n", hard_smp_processor_id());
1066 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1070 * If we couldn't find an SMP configuration at boot time,
1071 * get out of here now!
1073 if (!smp_found_config && !acpi_lapic) {
1075 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1077 if (APIC_init_uniprocessor())
1078 printk(KERN_NOTICE "Local APIC not detected."
1079 " Using dummy APIC emulation.\n");
1084 * Should not be necessary because the MP table should list the boot
1085 * CPU too, but we do it for the sake of robustness anyway.
1087 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
1089 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1090 boot_cpu_physical_apicid);
1091 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1096 * If we couldn't find a local APIC, then get out of here now!
1098 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1100 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1101 boot_cpu_physical_apicid);
1102 printk(KERN_ERR "... forcing use of dummy APIC emulation."
1103 "(tell your hw vendor)\n");
1104 smpboot_clear_io_apic();
1108 verify_local_APIC();
1111 * If SMP should be disabled, then really disable it!
1114 printk(KERN_INFO "SMP mode deactivated.\n");
1115 smpboot_clear_io_apic();
1117 localise_nmi_watchdog();
1121 end_local_APIC_setup();
1128 static void __init smp_cpu_index_default(void)
1131 struct cpuinfo_x86 *c;
1133 for_each_possible_cpu(i) {
1135 /* mark all to hotplug */
1136 c->cpu_index = NR_CPUS;
1141 * Prepare for SMP bootup. The MP table or ACPI has been read
1142 * earlier. Just do some sanity checking here and enable APIC mode.
1144 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1147 nmi_watchdog_default();
1148 smp_cpu_index_default();
1149 current_cpu_data = boot_cpu_data;
1150 cpu_callin_map = cpumask_of_cpu(0);
1153 * Setup boot CPU information
1155 smp_store_cpu_info(0); /* Final full version of the data */
1156 boot_cpu_logical_apicid = logical_smp_processor_id();
1157 current_thread_info()->cpu = 0; /* needed? */
1158 set_cpu_sibling_map(0);
1160 if (smp_sanity_check(max_cpus) < 0) {
1161 printk(KERN_INFO "SMP disabled\n");
1167 if (GET_APIC_ID(read_apic_id()) != boot_cpu_physical_apicid) {
1168 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1169 GET_APIC_ID(read_apic_id()), boot_cpu_physical_apicid);
1170 /* Or can we switch back to PIC here? */
1177 * Switch from PIC to APIC mode.
1181 #ifdef CONFIG_X86_64
1183 * Enable IO APIC before setting up error vector
1185 if (!skip_ioapic_setup && nr_ioapics)
1188 end_local_APIC_setup();
1190 map_cpu_to_logical_apicid();
1192 setup_portio_remap();
1194 smpboot_setup_io_apic();
1196 * Set up local APIC timer on boot CPU.
1199 printk(KERN_INFO "CPU%d: ", 0);
1200 print_cpu_info(&cpu_data(0));
1206 * Early setup to make printk work.
1208 void __init native_smp_prepare_boot_cpu(void)
1210 int me = smp_processor_id();
1211 #ifdef CONFIG_X86_32
1214 switch_to_new_gdt();
1215 /* already set me in cpu_online_map in boot_cpu_init() */
1216 cpu_set(me, cpu_callout_map);
1217 per_cpu(cpu_state, me) = CPU_ONLINE;
1220 void __init native_smp_cpus_done(unsigned int max_cpus)
1222 Dprintk("Boot done.\n");
1226 #ifdef CONFIG_X86_IO_APIC
1227 setup_ioapic_dest();
1229 check_nmi_watchdog();
1232 #ifdef CONFIG_HOTPLUG_CPU
1234 # ifdef CONFIG_X86_32
1235 void cpu_exit_clear(void)
1237 int cpu = raw_smp_processor_id();
1244 cpu_clear(cpu, cpu_callout_map);
1245 cpu_clear(cpu, cpu_callin_map);
1247 unmap_cpu_to_logical_apicid(cpu);
1249 # endif /* CONFIG_X86_32 */
1251 static void remove_siblinginfo(int cpu)
1254 struct cpuinfo_x86 *c = &cpu_data(cpu);
1256 for_each_cpu_mask(sibling, per_cpu(cpu_core_map, cpu)) {
1257 cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
1259 * last thread sibling in this cpu core going down
1261 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
1262 cpu_data(sibling).booted_cores--;
1265 for_each_cpu_mask(sibling, per_cpu(cpu_sibling_map, cpu))
1266 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
1267 cpus_clear(per_cpu(cpu_sibling_map, cpu));
1268 cpus_clear(per_cpu(cpu_core_map, cpu));
1269 c->phys_proc_id = 0;
1271 cpu_clear(cpu, cpu_sibling_setup_map);
1274 static int additional_cpus __initdata = -1;
1276 static __init int setup_additional_cpus(char *s)
1278 return s && get_option(&s, &additional_cpus) ? 0 : -EINVAL;
1280 early_param("additional_cpus", setup_additional_cpus);
1283 * cpu_possible_map should be static, it cannot change as cpu's
1284 * are onlined, or offlined. The reason is per-cpu data-structures
1285 * are allocated by some modules at init time, and dont expect to
1286 * do this dynamically on cpu arrival/departure.
1287 * cpu_present_map on the other hand can change dynamically.
1288 * In case when cpu_hotplug is not compiled, then we resort to current
1289 * behaviour, which is cpu_possible == cpu_present.
1292 * Three ways to find out the number of additional hotplug CPUs:
1293 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1294 * - The user can overwrite it with additional_cpus=NUM
1295 * - Otherwise don't reserve additional CPUs.
1296 * We do this because additional CPUs waste a lot of memory.
1299 __init void prefill_possible_map(void)
1304 if (additional_cpus == -1) {
1305 if (disabled_cpus > 0)
1306 additional_cpus = disabled_cpus;
1308 additional_cpus = 0;
1310 possible = num_processors + additional_cpus;
1311 if (possible > NR_CPUS)
1314 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1315 possible, max_t(int, possible - num_processors, 0));
1317 for (i = 0; i < possible; i++)
1318 cpu_set(i, cpu_possible_map);
1320 nr_cpu_ids = possible;
1323 static void __ref remove_cpu_from_maps(int cpu)
1325 cpu_clear(cpu, cpu_online_map);
1326 #ifdef CONFIG_X86_64
1327 cpu_clear(cpu, cpu_callout_map);
1328 cpu_clear(cpu, cpu_callin_map);
1329 /* was set by cpu_init() */
1330 clear_bit(cpu, (unsigned long *)&cpu_initialized);
1331 numa_remove_cpu(cpu);
1335 int __cpu_disable(void)
1337 int cpu = smp_processor_id();
1340 * Perhaps use cpufreq to drop frequency, but that could go
1341 * into generic code.
1343 * We won't take down the boot processor on i386 due to some
1344 * interrupts only being able to be serviced by the BSP.
1345 * Especially so if we're not using an IOAPIC -zwane
1350 if (nmi_watchdog == NMI_LOCAL_APIC)
1351 stop_apic_nmi_watchdog(NULL);
1356 * Allow any queued timer interrupts to get serviced
1357 * This is only a temporary solution until we cleanup
1358 * fixup_irqs as we do for IA64.
1363 local_irq_disable();
1364 remove_siblinginfo(cpu);
1366 /* It's now safe to remove this processor from the online map */
1367 remove_cpu_from_maps(cpu);
1368 fixup_irqs(cpu_online_map);
1372 void __cpu_die(unsigned int cpu)
1374 /* We don't do anything here: idle task is faking death itself. */
1377 for (i = 0; i < 10; i++) {
1378 /* They ack this in play_dead by setting CPU_DEAD */
1379 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1380 printk(KERN_INFO "CPU %d is now offline\n", cpu);
1381 if (1 == num_online_cpus())
1382 alternatives_smp_switch(0);
1387 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1389 #else /* ... !CONFIG_HOTPLUG_CPU */
1390 int __cpu_disable(void)
1395 void __cpu_die(unsigned int cpu)
1397 /* We said "no" in __cpu_disable */
1403 * If the BIOS enumerates physical processors before logical,
1404 * maxcpus=N at enumeration-time can be used to disable HT.
1406 static int __init parse_maxcpus(char *arg)
1408 extern unsigned int maxcpus;
1410 maxcpus = simple_strtoul(arg, NULL, 0);
1413 early_param("maxcpus", parse_maxcpus);