2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
56 #include <asm/trampoline.h>
59 #include <asm/pgtable.h>
60 #include <asm/tlbflush.h>
63 #include <asm/genapic.h>
64 #include <linux/mc146818rtc.h>
66 #include <mach_apic.h>
67 #include <mach_wakecpu.h>
68 #include <smpboot_hooks.h>
71 u8 apicid_2_node[MAX_APICID];
72 static int low_mappings;
75 /* State of each CPU */
76 DEFINE_PER_CPU(int, cpu_state) = { 0 };
78 /* Store all idle threads, this can be reused instead of creating
79 * a new thread. Also avoids complicated thread destroy functionality
82 #ifdef CONFIG_HOTPLUG_CPU
84 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
85 * removed after init for !CONFIG_HOTPLUG_CPU.
87 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
88 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
89 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
91 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
92 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
93 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
96 /* Number of siblings per CPU package */
97 int smp_num_siblings = 1;
98 EXPORT_SYMBOL(smp_num_siblings);
100 /* Last level cache ID of each logical CPU */
101 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
103 /* bitmap of online cpus */
104 cpumask_t cpu_online_map __read_mostly;
105 EXPORT_SYMBOL(cpu_online_map);
107 cpumask_t cpu_callin_map;
108 cpumask_t cpu_callout_map;
109 cpumask_t cpu_possible_map;
110 EXPORT_SYMBOL(cpu_possible_map);
112 /* representing HT siblings of each logical CPU */
113 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
114 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
116 /* representing HT and core siblings of each logical CPU */
117 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
118 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
120 /* Per CPU bogomips and other parameters */
121 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
122 EXPORT_PER_CPU_SYMBOL(cpu_info);
124 static atomic_t init_deasserted;
126 static int boot_cpu_logical_apicid;
128 /* representing cpus for which sibling maps can be computed */
129 static cpumask_t cpu_sibling_setup_map;
131 /* Set if we find a B stepping CPU */
132 int __cpuinitdata smp_b_stepping;
134 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
136 /* which logical CPUs are on which nodes */
137 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
138 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
139 EXPORT_SYMBOL(node_to_cpumask_map);
140 /* which node each logical CPU is on */
141 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
142 EXPORT_SYMBOL(cpu_to_node_map);
144 /* set up a mapping between cpu and node. */
145 static void map_cpu_to_node(int cpu, int node)
147 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
148 cpu_set(cpu, node_to_cpumask_map[node]);
149 cpu_to_node_map[cpu] = node;
152 /* undo a mapping between cpu and node. */
153 static void unmap_cpu_to_node(int cpu)
157 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
158 for (node = 0; node < MAX_NUMNODES; node++)
159 cpu_clear(cpu, node_to_cpumask_map[node]);
160 cpu_to_node_map[cpu] = 0;
162 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
163 #define map_cpu_to_node(cpu, node) ({})
164 #define unmap_cpu_to_node(cpu) ({})
168 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
169 { [0 ... NR_CPUS-1] = BAD_APICID };
171 static void map_cpu_to_logical_apicid(void)
173 int cpu = smp_processor_id();
174 int apicid = logical_smp_processor_id();
175 int node = apicid_to_node(apicid);
177 if (!node_online(node))
178 node = first_online_node;
180 cpu_2_logical_apicid[cpu] = apicid;
181 map_cpu_to_node(cpu, node);
184 static void unmap_cpu_to_logical_apicid(int cpu)
186 cpu_2_logical_apicid[cpu] = BAD_APICID;
187 unmap_cpu_to_node(cpu);
190 #define unmap_cpu_to_logical_apicid(cpu) do {} while (0)
191 #define map_cpu_to_logical_apicid() do {} while (0)
195 * Report back to the Boot Processor.
198 static void __cpuinit smp_callin(void)
201 unsigned long timeout;
204 * If waken up by an INIT in an 82489DX configuration
205 * we may get here before an INIT-deassert IPI reaches
206 * our local APIC. We have to wait for the IPI or we'll
207 * lock up on an APIC access.
209 wait_for_init_deassert(&init_deasserted);
212 * (This works even if the APIC is not enabled.)
214 phys_id = GET_APIC_ID(read_apic_id());
215 cpuid = smp_processor_id();
216 if (cpu_isset(cpuid, cpu_callin_map)) {
217 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
220 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
223 * STARTUP IPIs are fragile beasts as they might sometimes
224 * trigger some glue motherboard logic. Complete APIC bus
225 * silence for 1 second, this overestimates the time the
226 * boot CPU is spending to send the up to 2 STARTUP IPIs
227 * by a factor of two. This should be enough.
231 * Waiting 2s total for startup (udelay is not yet working)
233 timeout = jiffies + 2*HZ;
234 while (time_before(jiffies, timeout)) {
236 * Has the boot CPU finished it's STARTUP sequence?
238 if (cpu_isset(cpuid, cpu_callout_map))
243 if (!time_before(jiffies, timeout)) {
244 panic("%s: CPU%d started up but did not get a callout!\n",
249 * the boot CPU has finished the init stage and is spinning
250 * on callin_map until we finish. We are free to set up this
251 * CPU, first the APIC. (this is probably redundant on most
255 Dprintk("CALLIN, before setup_local_APIC().\n");
256 smp_callin_clear_local_apic();
258 end_local_APIC_setup();
259 map_cpu_to_logical_apicid();
264 * Need to enable IRQs because it can take longer and then
265 * the NMI watchdog might kill us.
270 Dprintk("Stack at about %p\n", &cpuid);
273 * Save our processor parameters
275 smp_store_cpu_info(cpuid);
278 * Allow the master to continue.
280 cpu_set(cpuid, cpu_callin_map);
284 * Activate a secondary processor.
286 static void __cpuinit start_secondary(void *unused)
289 * Don't put *anything* before cpu_init(), SMP booting is too
290 * fragile that we want to limit the things done here to the
291 * most necessary things.
300 /* otherwise gcc will move up smp_processor_id before the cpu_init */
303 * Check TSC synchronization with the BP:
305 check_tsc_sync_target();
307 if (nmi_watchdog == NMI_IO_APIC) {
308 disable_8259A_irq(0);
309 enable_NMI_through_LVT0();
319 /* This must be done before setting cpu_online_map */
320 set_cpu_sibling_map(raw_smp_processor_id());
324 * We need to hold call_lock, so there is no inconsistency
325 * between the time smp_call_function() determines number of
326 * IPI recipients, and the time when the determination is made
327 * for which cpus receive the IPI. Holding this
328 * lock helps us to not include this cpu in a currently in progress
329 * smp_call_function().
331 lock_ipi_call_lock();
333 spin_lock(&vector_lock);
335 /* Setup the per cpu irq handling data structures */
336 __setup_vector_irq(smp_processor_id());
338 * Allow the master to continue.
340 spin_unlock(&vector_lock);
342 cpu_set(smp_processor_id(), cpu_online_map);
343 unlock_ipi_call_lock();
344 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
346 setup_secondary_clock();
354 * Everything has been set up for the secondary
355 * CPUs - they just need to reload everything
356 * from the task structure
357 * This function must not return.
359 void __devinit initialize_secondary(void)
362 * We don't actually need to load the full TSS,
363 * basically just the stack pointer and the ip.
370 :"m" (current->thread.sp), "m" (current->thread.ip));
374 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
378 * Mask B, Pentium, but not Pentium MMX
380 if (c->x86_vendor == X86_VENDOR_INTEL &&
382 c->x86_mask >= 1 && c->x86_mask <= 4 &&
385 * Remember we have B step Pentia with bugs
390 * Certain Athlons might work (for various values of 'work') in SMP
391 * but they are not certified as MP capable.
393 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
395 if (num_possible_cpus() == 1)
398 /* Athlon 660/661 is valid. */
399 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
403 /* Duron 670 is valid */
404 if ((c->x86_model == 7) && (c->x86_mask == 0))
408 * Athlon 662, Duron 671, and Athlon >model 7 have capability
409 * bit. It's worth noting that the A5 stepping (662) of some
410 * Athlon XP's have the MP bit set.
411 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
414 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
415 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
420 /* If we get here, not a certified SMP capable AMD system. */
421 add_taint(TAINT_UNSAFE_SMP);
429 static void __cpuinit smp_checks(void)
432 printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
433 "with B stepping processors.\n");
436 * Don't taint if we are running SMP kernel on a single non-MP
439 if (tainted & TAINT_UNSAFE_SMP) {
440 if (num_online_cpus())
441 printk(KERN_INFO "WARNING: This combination of AMD"
442 "processors is not suitable for SMP.\n");
444 tainted &= ~TAINT_UNSAFE_SMP;
449 * The bootstrap kernel entry code has set these up. Save them for
453 void __cpuinit smp_store_cpu_info(int id)
455 struct cpuinfo_x86 *c = &cpu_data(id);
460 identify_secondary_cpu(c);
465 void __cpuinit set_cpu_sibling_map(int cpu)
468 struct cpuinfo_x86 *c = &cpu_data(cpu);
470 cpu_set(cpu, cpu_sibling_setup_map);
472 if (smp_num_siblings > 1) {
473 for_each_cpu_mask(i, cpu_sibling_setup_map) {
474 if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
475 c->cpu_core_id == cpu_data(i).cpu_core_id) {
476 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
477 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
478 cpu_set(i, per_cpu(cpu_core_map, cpu));
479 cpu_set(cpu, per_cpu(cpu_core_map, i));
480 cpu_set(i, c->llc_shared_map);
481 cpu_set(cpu, cpu_data(i).llc_shared_map);
485 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
488 cpu_set(cpu, c->llc_shared_map);
490 if (current_cpu_data.x86_max_cores == 1) {
491 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
496 for_each_cpu_mask(i, cpu_sibling_setup_map) {
497 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
498 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
499 cpu_set(i, c->llc_shared_map);
500 cpu_set(cpu, cpu_data(i).llc_shared_map);
502 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
503 cpu_set(i, per_cpu(cpu_core_map, cpu));
504 cpu_set(cpu, per_cpu(cpu_core_map, i));
506 * Does this new cpu bringup a new core?
508 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
510 * for each core in package, increment
511 * the booted_cores for this new cpu
513 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
516 * increment the core count for all
517 * the other cpus in this package
520 cpu_data(i).booted_cores++;
521 } else if (i != cpu && !c->booted_cores)
522 c->booted_cores = cpu_data(i).booted_cores;
527 /* maps the cpu to the sched domain representing multi-core */
528 cpumask_t cpu_coregroup_map(int cpu)
530 struct cpuinfo_x86 *c = &cpu_data(cpu);
532 * For perf, we return last level cache shared map.
533 * And for power savings, we return cpu_core_map
535 if (sched_mc_power_savings || sched_smt_power_savings)
536 return per_cpu(cpu_core_map, cpu);
538 return c->llc_shared_map;
541 static void impress_friends(void)
544 unsigned long bogosum = 0;
546 * Allow the user to impress friends.
548 Dprintk("Before bogomips.\n");
549 for_each_possible_cpu(cpu)
550 if (cpu_isset(cpu, cpu_callout_map))
551 bogosum += cpu_data(cpu).loops_per_jiffy;
553 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
556 (bogosum/(5000/HZ))%100);
558 Dprintk("Before bogocount - setting activated=1.\n");
561 static inline void __inquire_remote_apic(int apicid)
563 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
564 char *names[] = { "ID", "VERSION", "SPIV" };
568 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
570 for (i = 0; i < ARRAY_SIZE(regs); i++) {
571 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
576 status = safe_apic_wait_icr_idle();
579 "a previous APIC delivery may have failed\n");
581 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
582 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
587 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
588 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
591 case APIC_ICR_RR_VALID:
592 status = apic_read(APIC_RRR);
593 printk(KERN_CONT "%08x\n", status);
596 printk(KERN_CONT "failed\n");
601 #ifdef WAKE_SECONDARY_VIA_NMI
603 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
604 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
605 * won't ... remember to clear down the APIC, etc later.
608 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
610 unsigned long send_status, accept_status = 0;
614 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
616 /* Boot on the stack */
617 /* Kick the second */
618 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
620 Dprintk("Waiting for send to finish...\n");
621 send_status = safe_apic_wait_icr_idle();
624 * Give the other CPU some time to accept the IPI.
628 * Due to the Pentium erratum 3AP.
630 maxlvt = lapic_get_maxlvt();
632 apic_read_around(APIC_SPIV);
633 apic_write(APIC_ESR, 0);
635 accept_status = (apic_read(APIC_ESR) & 0xEF);
636 Dprintk("NMI sent.\n");
639 printk(KERN_ERR "APIC never delivered???\n");
641 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
643 return (send_status | accept_status);
645 #endif /* WAKE_SECONDARY_VIA_NMI */
647 #ifdef WAKE_SECONDARY_VIA_INIT
649 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
651 unsigned long send_status, accept_status = 0;
652 int maxlvt, num_starts, j;
654 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) {
655 send_status = uv_wakeup_secondary(phys_apicid, start_eip);
656 atomic_set(&init_deasserted, 1);
661 * Be paranoid about clearing APIC errors.
663 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
664 apic_read_around(APIC_SPIV);
665 apic_write(APIC_ESR, 0);
669 Dprintk("Asserting INIT.\n");
672 * Turn INIT on target chip
674 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
679 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
682 Dprintk("Waiting for send to finish...\n");
683 send_status = safe_apic_wait_icr_idle();
687 Dprintk("Deasserting INIT.\n");
690 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
693 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
695 Dprintk("Waiting for send to finish...\n");
696 send_status = safe_apic_wait_icr_idle();
699 atomic_set(&init_deasserted, 1);
702 * Should we send STARTUP IPIs ?
704 * Determine this based on the APIC version.
705 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
707 if (APIC_INTEGRATED(apic_version[phys_apicid]))
713 * Paravirt / VMI wants a startup IPI hook here to set up the
714 * target processor state.
716 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
717 (unsigned long)stack_start.sp);
720 * Run STARTUP IPI loop.
722 Dprintk("#startup loops: %d.\n", num_starts);
724 maxlvt = lapic_get_maxlvt();
726 for (j = 1; j <= num_starts; j++) {
727 Dprintk("Sending STARTUP #%d.\n", j);
728 apic_read_around(APIC_SPIV);
729 apic_write(APIC_ESR, 0);
731 Dprintk("After apic_write.\n");
738 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
740 /* Boot on the stack */
741 /* Kick the second */
742 apic_write_around(APIC_ICR, APIC_DM_STARTUP
743 | (start_eip >> 12));
746 * Give the other CPU some time to accept the IPI.
750 Dprintk("Startup point 1.\n");
752 Dprintk("Waiting for send to finish...\n");
753 send_status = safe_apic_wait_icr_idle();
756 * Give the other CPU some time to accept the IPI.
760 * Due to the Pentium erratum 3AP.
763 apic_read_around(APIC_SPIV);
764 apic_write(APIC_ESR, 0);
766 accept_status = (apic_read(APIC_ESR) & 0xEF);
767 if (send_status || accept_status)
770 Dprintk("After Startup.\n");
773 printk(KERN_ERR "APIC never delivered???\n");
775 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
777 return (send_status | accept_status);
779 #endif /* WAKE_SECONDARY_VIA_INIT */
782 struct work_struct work;
783 struct task_struct *idle;
784 struct completion done;
788 static void __cpuinit do_fork_idle(struct work_struct *work)
790 struct create_idle *c_idle =
791 container_of(work, struct create_idle, work);
793 c_idle->idle = fork_idle(c_idle->cpu);
794 complete(&c_idle->done);
799 * Allocate node local memory for the AP pda.
801 * Must be called after the _cpu_pda pointer table is initialized.
803 static int __cpuinit get_local_pda(int cpu)
805 struct x8664_pda *oldpda, *newpda;
806 unsigned long size = sizeof(struct x8664_pda);
807 int node = cpu_to_node(cpu);
809 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem)
812 oldpda = cpu_pda(cpu);
813 newpda = kmalloc_node(size, GFP_ATOMIC, node);
815 printk(KERN_ERR "Could not allocate node local PDA "
816 "for CPU %d on node %d\n", cpu, node);
819 return 0; /* have a usable pda */
825 memcpy(newpda, oldpda, size);
827 free_bootmem((unsigned long)oldpda, size);
830 newpda->in_bootmem = 0;
831 cpu_pda(cpu) = newpda;
834 #endif /* CONFIG_X86_64 */
836 static int __cpuinit do_boot_cpu(int apicid, int cpu)
838 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
839 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
840 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
843 unsigned long boot_error = 0;
845 unsigned long start_ip;
846 unsigned short nmi_high = 0, nmi_low = 0;
847 struct create_idle c_idle = {
849 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
851 INIT_WORK(&c_idle.work, do_fork_idle);
854 /* Allocate node local memory for AP pdas */
856 boot_error = get_local_pda(cpu);
859 /* if can't get pda memory, can't start cpu */
863 alternatives_smp_switch(1);
865 c_idle.idle = get_idle_for_cpu(cpu);
868 * We can't use kernel_thread since we must avoid to
869 * reschedule the child.
872 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
873 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
874 init_idle(c_idle.idle, cpu);
878 if (!keventd_up() || current_is_keventd())
879 c_idle.work.func(&c_idle.work);
881 schedule_work(&c_idle.work);
882 wait_for_completion(&c_idle.done);
885 if (IS_ERR(c_idle.idle)) {
886 printk("failed fork for CPU %d\n", cpu);
887 return PTR_ERR(c_idle.idle);
890 set_idle_for_cpu(cpu, c_idle.idle);
893 per_cpu(current_task, cpu) = c_idle.idle;
895 c_idle.idle->thread.ip = (unsigned long) start_secondary;
896 /* Stack for startup_32 can be just as for start_secondary onwards */
899 cpu_pda(cpu)->pcurrent = c_idle.idle;
900 load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
901 initial_code = (unsigned long)start_secondary;
902 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
904 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
905 stack_start.sp = (void *) c_idle.idle->thread.sp;
907 /* start_ip had better be page-aligned! */
908 start_ip = setup_trampoline();
910 /* So we see what's up */
911 printk(KERN_INFO "Booting processor %d/%d ip %lx\n",
912 cpu, apicid, start_ip);
915 * This grunge runs the startup process for
916 * the targeted processor.
919 atomic_set(&init_deasserted, 0);
921 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
923 Dprintk("Setting warm reset code and vector.\n");
925 store_NMI_vector(&nmi_high, &nmi_low);
927 smpboot_setup_warm_reset_vector(start_ip);
929 * Be paranoid about clearing APIC errors.
931 apic_write(APIC_ESR, 0);
936 * Starting actual IPI sequence...
938 boot_error = wakeup_secondary_cpu(apicid, start_ip);
942 * allow APs to start initializing.
944 Dprintk("Before Callout %d.\n", cpu);
945 cpu_set(cpu, cpu_callout_map);
946 Dprintk("After Callout %d.\n", cpu);
949 * Wait 5s total for a response
951 for (timeout = 0; timeout < 50000; timeout++) {
952 if (cpu_isset(cpu, cpu_callin_map))
953 break; /* It has booted */
957 if (cpu_isset(cpu, cpu_callin_map)) {
958 /* number CPUs logically, starting from 1 (BSP is 0) */
960 printk(KERN_INFO "CPU%d: ", cpu);
961 print_cpu_info(&cpu_data(cpu));
962 Dprintk("CPU has booted.\n");
965 if (*((volatile unsigned char *)trampoline_base)
967 /* trampoline started but...? */
968 printk(KERN_ERR "Stuck ??\n");
970 /* trampoline code not run */
971 printk(KERN_ERR "Not responding.\n");
972 if (get_uv_system_type() != UV_NON_UNIQUE_APIC)
973 inquire_remote_apic(apicid);
980 /* Try to put things back the way they were before ... */
981 unmap_cpu_to_logical_apicid(cpu);
983 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
985 cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */
986 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
987 cpu_clear(cpu, cpu_present_map);
988 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
991 /* mark "stuck" area as not stuck */
992 *((volatile unsigned long *)trampoline_base) = 0;
995 * Cleanup possible dangling ends...
997 smpboot_restore_warm_reset_vector();
1002 int __cpuinit native_cpu_up(unsigned int cpu)
1004 int apicid = cpu_present_to_apicid(cpu);
1005 unsigned long flags;
1008 WARN_ON(irqs_disabled());
1010 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
1012 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
1013 !physid_isset(apicid, phys_cpu_present_map)) {
1014 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
1019 * Already booted CPU?
1021 if (cpu_isset(cpu, cpu_callin_map)) {
1022 Dprintk("do_boot_cpu %d Already started\n", cpu);
1027 * Save current MTRR state in case it was changed since early boot
1028 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
1032 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
1034 #ifdef CONFIG_X86_32
1035 /* init low mem mapping */
1036 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
1037 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
1041 err = do_boot_cpu(apicid, cpu);
1046 err = do_boot_cpu(apicid, cpu);
1049 Dprintk("do_boot_cpu failed %d\n", err);
1054 * Check TSC synchronization with the AP (keep irqs disabled
1057 local_irq_save(flags);
1058 check_tsc_sync_source(cpu);
1059 local_irq_restore(flags);
1061 while (!cpu_online(cpu)) {
1063 touch_nmi_watchdog();
1070 * Fall back to non SMP mode after errors.
1072 * RED-PEN audit/test this more. I bet there is more state messed up here.
1074 static __init void disable_smp(void)
1076 cpu_present_map = cpumask_of_cpu(0);
1077 cpu_possible_map = cpumask_of_cpu(0);
1078 #ifdef CONFIG_X86_32
1079 smpboot_clear_io_apic_irqs();
1081 if (smp_found_config)
1082 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1084 physid_set_mask_of_physid(0, &phys_cpu_present_map);
1085 map_cpu_to_logical_apicid();
1086 cpu_set(0, per_cpu(cpu_sibling_map, 0));
1087 cpu_set(0, per_cpu(cpu_core_map, 0));
1091 * Various sanity checks.
1093 static int __init smp_sanity_check(unsigned max_cpus)
1096 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1097 printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
1098 "by the BIOS.\n", hard_smp_processor_id());
1099 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1103 * If we couldn't find an SMP configuration at boot time,
1104 * get out of here now!
1106 if (!smp_found_config && !acpi_lapic) {
1108 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1110 if (APIC_init_uniprocessor())
1111 printk(KERN_NOTICE "Local APIC not detected."
1112 " Using dummy APIC emulation.\n");
1117 * Should not be necessary because the MP table should list the boot
1118 * CPU too, but we do it for the sake of robustness anyway.
1120 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
1122 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1123 boot_cpu_physical_apicid);
1124 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1129 * If we couldn't find a local APIC, then get out of here now!
1131 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1133 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1134 boot_cpu_physical_apicid);
1135 printk(KERN_ERR "... forcing use of dummy APIC emulation."
1136 "(tell your hw vendor)\n");
1137 smpboot_clear_io_apic();
1141 verify_local_APIC();
1144 * If SMP should be disabled, then really disable it!
1147 printk(KERN_INFO "SMP mode deactivated.\n");
1148 smpboot_clear_io_apic();
1150 localise_nmi_watchdog();
1152 #ifdef CONFIG_X86_32
1156 end_local_APIC_setup();
1163 static void __init smp_cpu_index_default(void)
1166 struct cpuinfo_x86 *c;
1168 for_each_possible_cpu(i) {
1170 /* mark all to hotplug */
1171 c->cpu_index = NR_CPUS;
1176 * Prepare for SMP bootup. The MP table or ACPI has been read
1177 * earlier. Just do some sanity checking here and enable APIC mode.
1179 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1182 nmi_watchdog_default();
1183 smp_cpu_index_default();
1184 current_cpu_data = boot_cpu_data;
1185 cpu_callin_map = cpumask_of_cpu(0);
1188 * Setup boot CPU information
1190 smp_store_cpu_info(0); /* Final full version of the data */
1191 boot_cpu_logical_apicid = logical_smp_processor_id();
1192 current_thread_info()->cpu = 0; /* needed? */
1193 set_cpu_sibling_map(0);
1195 if (smp_sanity_check(max_cpus) < 0) {
1196 printk(KERN_INFO "SMP disabled\n");
1202 if (GET_APIC_ID(read_apic_id()) != boot_cpu_physical_apicid) {
1203 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1204 GET_APIC_ID(read_apic_id()), boot_cpu_physical_apicid);
1205 /* Or can we switch back to PIC here? */
1209 #ifdef CONFIG_X86_32
1213 * Switch from PIC to APIC mode.
1217 #ifdef CONFIG_X86_64
1219 * Enable IO APIC before setting up error vector
1221 if (!skip_ioapic_setup && nr_ioapics)
1224 end_local_APIC_setup();
1226 map_cpu_to_logical_apicid();
1228 setup_portio_remap();
1230 smpboot_setup_io_apic();
1232 * Set up local APIC timer on boot CPU.
1235 printk(KERN_INFO "CPU%d: ", 0);
1236 print_cpu_info(&cpu_data(0));
1242 * Early setup to make printk work.
1244 void __init native_smp_prepare_boot_cpu(void)
1246 int me = smp_processor_id();
1247 #ifdef CONFIG_X86_32
1250 switch_to_new_gdt();
1251 /* already set me in cpu_online_map in boot_cpu_init() */
1252 cpu_set(me, cpu_callout_map);
1253 per_cpu(cpu_state, me) = CPU_ONLINE;
1256 void __init native_smp_cpus_done(unsigned int max_cpus)
1258 Dprintk("Boot done.\n");
1262 #ifdef CONFIG_X86_IO_APIC
1263 setup_ioapic_dest();
1265 check_nmi_watchdog();
1268 #ifdef CONFIG_HOTPLUG_CPU
1270 # ifdef CONFIG_X86_32
1271 void cpu_exit_clear(void)
1273 int cpu = raw_smp_processor_id();
1280 cpu_clear(cpu, cpu_callout_map);
1281 cpu_clear(cpu, cpu_callin_map);
1283 unmap_cpu_to_logical_apicid(cpu);
1285 # endif /* CONFIG_X86_32 */
1287 static void remove_siblinginfo(int cpu)
1290 struct cpuinfo_x86 *c = &cpu_data(cpu);
1292 for_each_cpu_mask(sibling, per_cpu(cpu_core_map, cpu)) {
1293 cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
1295 * last thread sibling in this cpu core going down
1297 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
1298 cpu_data(sibling).booted_cores--;
1301 for_each_cpu_mask(sibling, per_cpu(cpu_sibling_map, cpu))
1302 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
1303 cpus_clear(per_cpu(cpu_sibling_map, cpu));
1304 cpus_clear(per_cpu(cpu_core_map, cpu));
1305 c->phys_proc_id = 0;
1307 cpu_clear(cpu, cpu_sibling_setup_map);
1310 static int additional_cpus __initdata = -1;
1312 static __init int setup_additional_cpus(char *s)
1314 return s && get_option(&s, &additional_cpus) ? 0 : -EINVAL;
1316 early_param("additional_cpus", setup_additional_cpus);
1319 * cpu_possible_map should be static, it cannot change as cpu's
1320 * are onlined, or offlined. The reason is per-cpu data-structures
1321 * are allocated by some modules at init time, and dont expect to
1322 * do this dynamically on cpu arrival/departure.
1323 * cpu_present_map on the other hand can change dynamically.
1324 * In case when cpu_hotplug is not compiled, then we resort to current
1325 * behaviour, which is cpu_possible == cpu_present.
1328 * Three ways to find out the number of additional hotplug CPUs:
1329 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1330 * - The user can overwrite it with additional_cpus=NUM
1331 * - Otherwise don't reserve additional CPUs.
1332 * We do this because additional CPUs waste a lot of memory.
1335 __init void prefill_possible_map(void)
1340 if (additional_cpus == -1) {
1341 if (disabled_cpus > 0)
1342 additional_cpus = disabled_cpus;
1344 additional_cpus = 0;
1346 possible = num_processors + additional_cpus;
1347 if (possible > NR_CPUS)
1350 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1351 possible, max_t(int, possible - num_processors, 0));
1353 for (i = 0; i < possible; i++)
1354 cpu_set(i, cpu_possible_map);
1356 nr_cpu_ids = possible;
1359 static void __ref remove_cpu_from_maps(int cpu)
1361 cpu_clear(cpu, cpu_online_map);
1362 #ifdef CONFIG_X86_64
1363 cpu_clear(cpu, cpu_callout_map);
1364 cpu_clear(cpu, cpu_callin_map);
1365 /* was set by cpu_init() */
1366 clear_bit(cpu, (unsigned long *)&cpu_initialized);
1367 numa_remove_cpu(cpu);
1371 int __cpu_disable(void)
1373 int cpu = smp_processor_id();
1376 * Perhaps use cpufreq to drop frequency, but that could go
1377 * into generic code.
1379 * We won't take down the boot processor on i386 due to some
1380 * interrupts only being able to be serviced by the BSP.
1381 * Especially so if we're not using an IOAPIC -zwane
1386 if (nmi_watchdog == NMI_LOCAL_APIC)
1387 stop_apic_nmi_watchdog(NULL);
1392 * Allow any queued timer interrupts to get serviced
1393 * This is only a temporary solution until we cleanup
1394 * fixup_irqs as we do for IA64.
1399 local_irq_disable();
1400 remove_siblinginfo(cpu);
1402 /* It's now safe to remove this processor from the online map */
1403 remove_cpu_from_maps(cpu);
1404 fixup_irqs(cpu_online_map);
1408 void __cpu_die(unsigned int cpu)
1410 /* We don't do anything here: idle task is faking death itself. */
1413 for (i = 0; i < 10; i++) {
1414 /* They ack this in play_dead by setting CPU_DEAD */
1415 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1416 printk(KERN_INFO "CPU %d is now offline\n", cpu);
1417 if (1 == num_online_cpus())
1418 alternatives_smp_switch(0);
1423 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1425 #else /* ... !CONFIG_HOTPLUG_CPU */
1426 int __cpu_disable(void)
1431 void __cpu_die(unsigned int cpu)
1433 /* We said "no" in __cpu_disable */
1439 * If the BIOS enumerates physical processors before logical,
1440 * maxcpus=N at enumeration-time can be used to disable HT.
1442 static int __init parse_maxcpus(char *arg)
1444 extern unsigned int maxcpus;
1446 maxcpus = simple_strtoul(arg, NULL, 0);
1449 early_param("maxcpus", parse_maxcpus);