2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
57 #include <asm/trampoline.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
64 #include <asm/genapic.h>
65 #include <linux/mc146818rtc.h>
67 #include <mach_apic.h>
68 #include <mach_wakecpu.h>
69 #include <smpboot_hooks.h>
72 u8 apicid_2_node[MAX_APICID];
73 static int low_mappings;
76 /* State of each CPU */
77 DEFINE_PER_CPU(int, cpu_state) = { 0 };
79 /* Store all idle threads, this can be reused instead of creating
80 * a new thread. Also avoids complicated thread destroy functionality
83 #ifdef CONFIG_HOTPLUG_CPU
85 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
86 * removed after init for !CONFIG_HOTPLUG_CPU.
88 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
89 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
90 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
92 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
93 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
94 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
97 /* Number of siblings per CPU package */
98 int smp_num_siblings = 1;
99 EXPORT_SYMBOL(smp_num_siblings);
101 /* Last level cache ID of each logical CPU */
102 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
104 cpumask_t cpu_callin_map;
105 cpumask_t cpu_callout_map;
107 /* representing HT siblings of each logical CPU */
108 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
109 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
111 /* representing HT and core siblings of each logical CPU */
112 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
113 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
115 /* Per CPU bogomips and other parameters */
116 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
117 EXPORT_PER_CPU_SYMBOL(cpu_info);
119 static atomic_t init_deasserted;
122 /* representing cpus for which sibling maps can be computed */
123 static cpumask_t cpu_sibling_setup_map;
125 /* Set if we find a B stepping CPU */
126 static int __cpuinitdata smp_b_stepping;
128 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
130 /* which logical CPUs are on which nodes */
131 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
132 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
133 EXPORT_SYMBOL(node_to_cpumask_map);
134 /* which node each logical CPU is on */
135 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
136 EXPORT_SYMBOL(cpu_to_node_map);
138 /* set up a mapping between cpu and node. */
139 static void map_cpu_to_node(int cpu, int node)
141 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
142 cpu_set(cpu, node_to_cpumask_map[node]);
143 cpu_to_node_map[cpu] = node;
146 /* undo a mapping between cpu and node. */
147 static void unmap_cpu_to_node(int cpu)
151 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
152 for (node = 0; node < MAX_NUMNODES; node++)
153 cpu_clear(cpu, node_to_cpumask_map[node]);
154 cpu_to_node_map[cpu] = 0;
156 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
157 #define map_cpu_to_node(cpu, node) ({})
158 #define unmap_cpu_to_node(cpu) ({})
162 static int boot_cpu_logical_apicid;
164 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
165 { [0 ... NR_CPUS-1] = BAD_APICID };
167 static void map_cpu_to_logical_apicid(void)
169 int cpu = smp_processor_id();
170 int apicid = logical_smp_processor_id();
171 int node = apicid_to_node(apicid);
173 if (!node_online(node))
174 node = first_online_node;
176 cpu_2_logical_apicid[cpu] = apicid;
177 map_cpu_to_node(cpu, node);
180 void numa_remove_cpu(int cpu)
182 cpu_2_logical_apicid[cpu] = BAD_APICID;
183 unmap_cpu_to_node(cpu);
186 #define map_cpu_to_logical_apicid() do {} while (0)
190 * Report back to the Boot Processor.
193 static void __cpuinit smp_callin(void)
196 unsigned long timeout;
199 * If waken up by an INIT in an 82489DX configuration
200 * we may get here before an INIT-deassert IPI reaches
201 * our local APIC. We have to wait for the IPI or we'll
202 * lock up on an APIC access.
204 wait_for_init_deassert(&init_deasserted);
207 * (This works even if the APIC is not enabled.)
209 phys_id = read_apic_id();
210 cpuid = smp_processor_id();
211 if (cpu_isset(cpuid, cpu_callin_map)) {
212 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
215 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
218 * STARTUP IPIs are fragile beasts as they might sometimes
219 * trigger some glue motherboard logic. Complete APIC bus
220 * silence for 1 second, this overestimates the time the
221 * boot CPU is spending to send the up to 2 STARTUP IPIs
222 * by a factor of two. This should be enough.
226 * Waiting 2s total for startup (udelay is not yet working)
228 timeout = jiffies + 2*HZ;
229 while (time_before(jiffies, timeout)) {
231 * Has the boot CPU finished it's STARTUP sequence?
233 if (cpu_isset(cpuid, cpu_callout_map))
238 if (!time_before(jiffies, timeout)) {
239 panic("%s: CPU%d started up but did not get a callout!\n",
244 * the boot CPU has finished the init stage and is spinning
245 * on callin_map until we finish. We are free to set up this
246 * CPU, first the APIC. (this is probably redundant on most
250 pr_debug("CALLIN, before setup_local_APIC().\n");
251 smp_callin_clear_local_apic();
253 end_local_APIC_setup();
254 map_cpu_to_logical_apicid();
256 notify_cpu_starting(cpuid);
260 * Need to enable IRQs because it can take longer and then
261 * the NMI watchdog might kill us.
266 pr_debug("Stack at about %p\n", &cpuid);
269 * Save our processor parameters
271 smp_store_cpu_info(cpuid);
274 * Allow the master to continue.
276 cpu_set(cpuid, cpu_callin_map);
279 static int __cpuinitdata unsafe_smp;
282 * Activate a secondary processor.
284 static void __cpuinit start_secondary(void *unused)
287 * Don't put *anything* before cpu_init(), SMP booting is too
288 * fragile that we want to limit the things done here to the
289 * most necessary things.
298 /* otherwise gcc will move up smp_processor_id before the cpu_init */
301 * Check TSC synchronization with the BP:
303 check_tsc_sync_target();
305 if (nmi_watchdog == NMI_IO_APIC) {
306 disable_8259A_irq(0);
307 enable_NMI_through_LVT0();
317 /* This must be done before setting cpu_online_map */
318 set_cpu_sibling_map(raw_smp_processor_id());
322 * We need to hold call_lock, so there is no inconsistency
323 * between the time smp_call_function() determines number of
324 * IPI recipients, and the time when the determination is made
325 * for which cpus receive the IPI. Holding this
326 * lock helps us to not include this cpu in a currently in progress
327 * smp_call_function().
329 * We need to hold vector_lock so there the set of online cpus
330 * does not change while we are assigning vectors to cpus. Holding
331 * this lock ensures we don't half assign or remove an irq from a cpu.
335 __setup_vector_irq(smp_processor_id());
336 cpu_set(smp_processor_id(), cpu_online_map);
337 unlock_vector_lock();
339 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
341 /* enable local interrupts */
344 setup_secondary_clock();
350 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
353 * Mask B, Pentium, but not Pentium MMX
355 if (c->x86_vendor == X86_VENDOR_INTEL &&
357 c->x86_mask >= 1 && c->x86_mask <= 4 &&
360 * Remember we have B step Pentia with bugs
365 * Certain Athlons might work (for various values of 'work') in SMP
366 * but they are not certified as MP capable.
368 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
370 if (num_possible_cpus() == 1)
373 /* Athlon 660/661 is valid. */
374 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
378 /* Duron 670 is valid */
379 if ((c->x86_model == 7) && (c->x86_mask == 0))
383 * Athlon 662, Duron 671, and Athlon >model 7 have capability
384 * bit. It's worth noting that the A5 stepping (662) of some
385 * Athlon XP's have the MP bit set.
386 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
389 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
390 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
395 /* If we get here, not a certified SMP capable AMD system. */
403 static void __cpuinit smp_checks(void)
406 printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
407 "with B stepping processors.\n");
410 * Don't taint if we are running SMP kernel on a single non-MP
413 if (unsafe_smp && num_online_cpus() > 1) {
414 printk(KERN_INFO "WARNING: This combination of AMD"
415 "processors is not suitable for SMP.\n");
416 add_taint(TAINT_UNSAFE_SMP);
421 * The bootstrap kernel entry code has set these up. Save them for
425 void __cpuinit smp_store_cpu_info(int id)
427 struct cpuinfo_x86 *c = &cpu_data(id);
432 identify_secondary_cpu(c);
437 void __cpuinit set_cpu_sibling_map(int cpu)
440 struct cpuinfo_x86 *c = &cpu_data(cpu);
442 cpu_set(cpu, cpu_sibling_setup_map);
444 if (smp_num_siblings > 1) {
445 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
446 if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
447 c->cpu_core_id == cpu_data(i).cpu_core_id) {
448 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
449 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
450 cpu_set(i, per_cpu(cpu_core_map, cpu));
451 cpu_set(cpu, per_cpu(cpu_core_map, i));
452 cpu_set(i, c->llc_shared_map);
453 cpu_set(cpu, cpu_data(i).llc_shared_map);
457 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
460 cpu_set(cpu, c->llc_shared_map);
462 if (current_cpu_data.x86_max_cores == 1) {
463 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
468 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
469 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
470 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
471 cpu_set(i, c->llc_shared_map);
472 cpu_set(cpu, cpu_data(i).llc_shared_map);
474 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
475 cpu_set(i, per_cpu(cpu_core_map, cpu));
476 cpu_set(cpu, per_cpu(cpu_core_map, i));
478 * Does this new cpu bringup a new core?
480 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
482 * for each core in package, increment
483 * the booted_cores for this new cpu
485 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
488 * increment the core count for all
489 * the other cpus in this package
492 cpu_data(i).booted_cores++;
493 } else if (i != cpu && !c->booted_cores)
494 c->booted_cores = cpu_data(i).booted_cores;
499 /* maps the cpu to the sched domain representing multi-core */
500 cpumask_t cpu_coregroup_map(int cpu)
502 struct cpuinfo_x86 *c = &cpu_data(cpu);
504 * For perf, we return last level cache shared map.
505 * And for power savings, we return cpu_core_map
507 if (sched_mc_power_savings || sched_smt_power_savings)
508 return per_cpu(cpu_core_map, cpu);
510 return c->llc_shared_map;
513 static void impress_friends(void)
516 unsigned long bogosum = 0;
518 * Allow the user to impress friends.
520 pr_debug("Before bogomips.\n");
521 for_each_possible_cpu(cpu)
522 if (cpu_isset(cpu, cpu_callout_map))
523 bogosum += cpu_data(cpu).loops_per_jiffy;
525 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
528 (bogosum/(5000/HZ))%100);
530 pr_debug("Before bogocount - setting activated=1.\n");
533 static inline void __inquire_remote_apic(int apicid)
535 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
536 char *names[] = { "ID", "VERSION", "SPIV" };
540 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid);
542 for (i = 0; i < ARRAY_SIZE(regs); i++) {
543 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]);
548 status = safe_apic_wait_icr_idle();
551 "a previous APIC delivery may have failed\n");
553 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
558 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
559 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
562 case APIC_ICR_RR_VALID:
563 status = apic_read(APIC_RRR);
564 printk(KERN_CONT "%08x\n", status);
567 printk(KERN_CONT "failed\n");
572 #ifdef WAKE_SECONDARY_VIA_NMI
574 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
575 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
576 * won't ... remember to clear down the APIC, etc later.
579 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
581 unsigned long send_status, accept_status = 0;
585 /* Boot on the stack */
586 /* Kick the second */
587 apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid);
589 pr_debug("Waiting for send to finish...\n");
590 send_status = safe_apic_wait_icr_idle();
593 * Give the other CPU some time to accept the IPI.
596 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
597 maxlvt = lapic_get_maxlvt();
598 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
599 apic_write(APIC_ESR, 0);
600 accept_status = (apic_read(APIC_ESR) & 0xEF);
602 pr_debug("NMI sent.\n");
605 printk(KERN_ERR "APIC never delivered???\n");
607 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
609 return (send_status | accept_status);
611 #endif /* WAKE_SECONDARY_VIA_NMI */
613 #ifdef WAKE_SECONDARY_VIA_INIT
615 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
617 unsigned long send_status, accept_status = 0;
618 int maxlvt, num_starts, j;
620 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) {
621 send_status = uv_wakeup_secondary(phys_apicid, start_eip);
622 atomic_set(&init_deasserted, 1);
626 maxlvt = lapic_get_maxlvt();
629 * Be paranoid about clearing APIC errors.
631 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
632 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
633 apic_write(APIC_ESR, 0);
637 pr_debug("Asserting INIT.\n");
640 * Turn INIT on target chip
645 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
648 pr_debug("Waiting for send to finish...\n");
649 send_status = safe_apic_wait_icr_idle();
653 pr_debug("Deasserting INIT.\n");
657 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
659 pr_debug("Waiting for send to finish...\n");
660 send_status = safe_apic_wait_icr_idle();
663 atomic_set(&init_deasserted, 1);
666 * Should we send STARTUP IPIs ?
668 * Determine this based on the APIC version.
669 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
671 if (APIC_INTEGRATED(apic_version[phys_apicid]))
677 * Paravirt / VMI wants a startup IPI hook here to set up the
678 * target processor state.
680 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
681 (unsigned long)stack_start.sp);
684 * Run STARTUP IPI loop.
686 pr_debug("#startup loops: %d.\n", num_starts);
688 for (j = 1; j <= num_starts; j++) {
689 pr_debug("Sending STARTUP #%d.\n", j);
690 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
691 apic_write(APIC_ESR, 0);
693 pr_debug("After apic_write.\n");
700 /* Boot on the stack */
701 /* Kick the second */
702 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
706 * Give the other CPU some time to accept the IPI.
710 pr_debug("Startup point 1.\n");
712 pr_debug("Waiting for send to finish...\n");
713 send_status = safe_apic_wait_icr_idle();
716 * Give the other CPU some time to accept the IPI.
719 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
720 apic_write(APIC_ESR, 0);
721 accept_status = (apic_read(APIC_ESR) & 0xEF);
722 if (send_status || accept_status)
725 pr_debug("After Startup.\n");
728 printk(KERN_ERR "APIC never delivered???\n");
730 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
732 return (send_status | accept_status);
734 #endif /* WAKE_SECONDARY_VIA_INIT */
737 struct work_struct work;
738 struct task_struct *idle;
739 struct completion done;
743 static void __cpuinit do_fork_idle(struct work_struct *work)
745 struct create_idle *c_idle =
746 container_of(work, struct create_idle, work);
748 c_idle->idle = fork_idle(c_idle->cpu);
749 complete(&c_idle->done);
754 /* __ref because it's safe to call free_bootmem when after_bootmem == 0. */
755 static void __ref free_bootmem_pda(struct x8664_pda *oldpda)
758 free_bootmem((unsigned long)oldpda, sizeof(*oldpda));
762 * Allocate node local memory for the AP pda.
764 * Must be called after the _cpu_pda pointer table is initialized.
766 int __cpuinit get_local_pda(int cpu)
768 struct x8664_pda *oldpda, *newpda;
769 unsigned long size = sizeof(struct x8664_pda);
770 int node = cpu_to_node(cpu);
772 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem)
775 oldpda = cpu_pda(cpu);
776 newpda = kmalloc_node(size, GFP_ATOMIC, node);
778 printk(KERN_ERR "Could not allocate node local PDA "
779 "for CPU %d on node %d\n", cpu, node);
782 return 0; /* have a usable pda */
788 memcpy(newpda, oldpda, size);
789 free_bootmem_pda(oldpda);
792 newpda->in_bootmem = 0;
793 cpu_pda(cpu) = newpda;
796 #endif /* CONFIG_X86_64 */
798 static int __cpuinit do_boot_cpu(int apicid, int cpu)
800 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
801 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
802 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
805 unsigned long boot_error = 0;
807 unsigned long start_ip;
808 unsigned short nmi_high = 0, nmi_low = 0;
809 struct create_idle c_idle = {
811 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
813 INIT_WORK(&c_idle.work, do_fork_idle);
816 /* Allocate node local memory for AP pdas */
818 boot_error = get_local_pda(cpu);
821 /* if can't get pda memory, can't start cpu */
825 alternatives_smp_switch(1);
827 c_idle.idle = get_idle_for_cpu(cpu);
830 * We can't use kernel_thread since we must avoid to
831 * reschedule the child.
834 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
835 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
836 init_idle(c_idle.idle, cpu);
840 if (!keventd_up() || current_is_keventd())
841 c_idle.work.func(&c_idle.work);
843 schedule_work(&c_idle.work);
844 wait_for_completion(&c_idle.done);
847 if (IS_ERR(c_idle.idle)) {
848 printk("failed fork for CPU %d\n", cpu);
849 return PTR_ERR(c_idle.idle);
852 set_idle_for_cpu(cpu, c_idle.idle);
855 per_cpu(current_task, cpu) = c_idle.idle;
857 /* Stack for startup_32 can be just as for start_secondary onwards */
860 cpu_pda(cpu)->pcurrent = c_idle.idle;
861 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
863 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
864 initial_code = (unsigned long)start_secondary;
865 stack_start.sp = (void *) c_idle.idle->thread.sp;
867 /* start_ip had better be page-aligned! */
868 start_ip = setup_trampoline();
870 /* So we see what's up */
871 printk(KERN_INFO "Booting processor %d APIC 0x%x ip 0x%lx\n",
872 cpu, apicid, start_ip);
875 * This grunge runs the startup process for
876 * the targeted processor.
879 atomic_set(&init_deasserted, 0);
881 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
883 pr_debug("Setting warm reset code and vector.\n");
885 store_NMI_vector(&nmi_high, &nmi_low);
887 smpboot_setup_warm_reset_vector(start_ip);
889 * Be paranoid about clearing APIC errors.
891 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
892 apic_write(APIC_ESR, 0);
898 * Starting actual IPI sequence...
900 boot_error = wakeup_secondary_cpu(apicid, start_ip);
904 * allow APs to start initializing.
906 pr_debug("Before Callout %d.\n", cpu);
907 cpu_set(cpu, cpu_callout_map);
908 pr_debug("After Callout %d.\n", cpu);
911 * Wait 5s total for a response
913 for (timeout = 0; timeout < 50000; timeout++) {
914 if (cpu_isset(cpu, cpu_callin_map))
915 break; /* It has booted */
919 if (cpu_isset(cpu, cpu_callin_map)) {
920 /* number CPUs logically, starting from 1 (BSP is 0) */
922 printk(KERN_INFO "CPU%d: ", cpu);
923 print_cpu_info(&cpu_data(cpu));
924 pr_debug("CPU has booted.\n");
927 if (*((volatile unsigned char *)trampoline_base)
929 /* trampoline started but...? */
930 printk(KERN_ERR "Stuck ??\n");
932 /* trampoline code not run */
933 printk(KERN_ERR "Not responding.\n");
934 if (get_uv_system_type() != UV_NON_UNIQUE_APIC)
935 inquire_remote_apic(apicid);
942 /* Try to put things back the way they were before ... */
943 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
944 cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */
945 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
946 cpu_clear(cpu, cpu_present_map);
947 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
950 /* mark "stuck" area as not stuck */
951 *((volatile unsigned long *)trampoline_base) = 0;
954 * Cleanup possible dangling ends...
956 smpboot_restore_warm_reset_vector();
961 int __cpuinit native_cpu_up(unsigned int cpu)
963 int apicid = cpu_present_to_apicid(cpu);
967 WARN_ON(irqs_disabled());
969 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
971 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
972 !physid_isset(apicid, phys_cpu_present_map)) {
973 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
978 * Already booted CPU?
980 if (cpu_isset(cpu, cpu_callin_map)) {
981 pr_debug("do_boot_cpu %d Already started\n", cpu);
986 * Save current MTRR state in case it was changed since early boot
987 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
991 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
994 /* init low mem mapping */
995 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
996 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
1000 err = do_boot_cpu(apicid, cpu);
1005 err = do_boot_cpu(apicid, cpu);
1008 pr_debug("do_boot_cpu failed %d\n", err);
1013 * Check TSC synchronization with the AP (keep irqs disabled
1016 local_irq_save(flags);
1017 check_tsc_sync_source(cpu);
1018 local_irq_restore(flags);
1020 while (!cpu_online(cpu)) {
1022 touch_nmi_watchdog();
1029 * Fall back to non SMP mode after errors.
1031 * RED-PEN audit/test this more. I bet there is more state messed up here.
1033 static __init void disable_smp(void)
1035 cpu_present_map = cpumask_of_cpu(0);
1036 cpu_possible_map = cpumask_of_cpu(0);
1037 smpboot_clear_io_apic_irqs();
1039 if (smp_found_config)
1040 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1042 physid_set_mask_of_physid(0, &phys_cpu_present_map);
1043 map_cpu_to_logical_apicid();
1044 cpu_set(0, per_cpu(cpu_sibling_map, 0));
1045 cpu_set(0, per_cpu(cpu_core_map, 0));
1049 * Various sanity checks.
1051 static int __init smp_sanity_check(unsigned max_cpus)
1055 #if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32)
1056 if (def_to_bigsmp && nr_cpu_ids > 8) {
1061 "More than 8 CPUs detected - skipping them.\n"
1062 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
1065 for_each_present_cpu(cpu) {
1067 cpu_clear(cpu, cpu_present_map);
1072 for_each_possible_cpu(cpu) {
1074 cpu_clear(cpu, cpu_possible_map);
1082 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1083 printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
1084 "by the BIOS.\n", hard_smp_processor_id());
1085 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1089 * If we couldn't find an SMP configuration at boot time,
1090 * get out of here now!
1092 if (!smp_found_config && !acpi_lapic) {
1094 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1096 if (APIC_init_uniprocessor())
1097 printk(KERN_NOTICE "Local APIC not detected."
1098 " Using dummy APIC emulation.\n");
1103 * Should not be necessary because the MP table should list the boot
1104 * CPU too, but we do it for the sake of robustness anyway.
1106 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
1108 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1109 boot_cpu_physical_apicid);
1110 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1115 * If we couldn't find a local APIC, then get out of here now!
1117 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1119 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1120 boot_cpu_physical_apicid);
1121 printk(KERN_ERR "... forcing use of dummy APIC emulation."
1122 "(tell your hw vendor)\n");
1123 smpboot_clear_io_apic();
1127 verify_local_APIC();
1130 * If SMP should be disabled, then really disable it!
1133 printk(KERN_INFO "SMP mode deactivated.\n");
1134 smpboot_clear_io_apic();
1136 localise_nmi_watchdog();
1140 end_local_APIC_setup();
1147 static void __init smp_cpu_index_default(void)
1150 struct cpuinfo_x86 *c;
1152 for_each_possible_cpu(i) {
1154 /* mark all to hotplug */
1155 c->cpu_index = NR_CPUS;
1160 * Prepare for SMP bootup. The MP table or ACPI has been read
1161 * earlier. Just do some sanity checking here and enable APIC mode.
1163 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1166 smp_cpu_index_default();
1167 current_cpu_data = boot_cpu_data;
1168 cpu_callin_map = cpumask_of_cpu(0);
1171 * Setup boot CPU information
1173 smp_store_cpu_info(0); /* Final full version of the data */
1174 #ifdef CONFIG_X86_32
1175 boot_cpu_logical_apicid = logical_smp_processor_id();
1177 current_thread_info()->cpu = 0; /* needed? */
1178 set_cpu_sibling_map(0);
1180 #ifdef CONFIG_X86_64
1182 setup_apic_routing();
1185 if (smp_sanity_check(max_cpus) < 0) {
1186 printk(KERN_INFO "SMP disabled\n");
1192 if (read_apic_id() != boot_cpu_physical_apicid) {
1193 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1194 read_apic_id(), boot_cpu_physical_apicid);
1195 /* Or can we switch back to PIC here? */
1202 * Switch from PIC to APIC mode.
1206 #ifdef CONFIG_X86_64
1208 * Enable IO APIC before setting up error vector
1210 if (!skip_ioapic_setup && nr_ioapics)
1213 end_local_APIC_setup();
1215 map_cpu_to_logical_apicid();
1217 setup_portio_remap();
1219 smpboot_setup_io_apic();
1221 * Set up local APIC timer on boot CPU.
1224 printk(KERN_INFO "CPU%d: ", 0);
1225 print_cpu_info(&cpu_data(0));
1234 * Early setup to make printk work.
1236 void __init native_smp_prepare_boot_cpu(void)
1238 int me = smp_processor_id();
1239 #ifdef CONFIG_X86_32
1242 switch_to_new_gdt();
1243 /* already set me in cpu_online_map in boot_cpu_init() */
1244 cpu_set(me, cpu_callout_map);
1245 per_cpu(cpu_state, me) = CPU_ONLINE;
1248 void __init native_smp_cpus_done(unsigned int max_cpus)
1250 pr_debug("Boot done.\n");
1254 #ifdef CONFIG_X86_IO_APIC
1255 setup_ioapic_dest();
1257 check_nmi_watchdog();
1261 * cpu_possible_map should be static, it cannot change as cpu's
1262 * are onlined, or offlined. The reason is per-cpu data-structures
1263 * are allocated by some modules at init time, and dont expect to
1264 * do this dynamically on cpu arrival/departure.
1265 * cpu_present_map on the other hand can change dynamically.
1266 * In case when cpu_hotplug is not compiled, then we resort to current
1267 * behaviour, which is cpu_possible == cpu_present.
1270 * Three ways to find out the number of additional hotplug CPUs:
1271 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1272 * - The user can overwrite it with additional_cpus=NUM
1273 * - Otherwise don't reserve additional CPUs.
1274 * We do this because additional CPUs waste a lot of memory.
1277 __init void prefill_possible_map(void)
1281 /* no processor from mptable or madt */
1282 if (!num_processors)
1285 possible = num_processors + disabled_cpus;
1286 if (possible > NR_CPUS)
1289 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1290 possible, max_t(int, possible - num_processors, 0));
1292 for (i = 0; i < possible; i++)
1293 cpu_set(i, cpu_possible_map);
1295 nr_cpu_ids = possible;
1298 #ifdef CONFIG_HOTPLUG_CPU
1300 static void remove_siblinginfo(int cpu)
1303 struct cpuinfo_x86 *c = &cpu_data(cpu);
1305 for_each_cpu_mask_nr(sibling, per_cpu(cpu_core_map, cpu)) {
1306 cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
1308 * last thread sibling in this cpu core going down
1310 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
1311 cpu_data(sibling).booted_cores--;
1314 for_each_cpu_mask_nr(sibling, per_cpu(cpu_sibling_map, cpu))
1315 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
1316 cpus_clear(per_cpu(cpu_sibling_map, cpu));
1317 cpus_clear(per_cpu(cpu_core_map, cpu));
1318 c->phys_proc_id = 0;
1320 cpu_clear(cpu, cpu_sibling_setup_map);
1323 static void __ref remove_cpu_from_maps(int cpu)
1325 cpu_clear(cpu, cpu_online_map);
1326 cpu_clear(cpu, cpu_callout_map);
1327 cpu_clear(cpu, cpu_callin_map);
1328 /* was set by cpu_init() */
1329 cpu_clear(cpu, cpu_initialized);
1330 numa_remove_cpu(cpu);
1333 void cpu_disable_common(void)
1335 int cpu = smp_processor_id();
1338 * Allow any queued timer interrupts to get serviced
1339 * This is only a temporary solution until we cleanup
1340 * fixup_irqs as we do for IA64.
1345 local_irq_disable();
1346 remove_siblinginfo(cpu);
1348 /* It's now safe to remove this processor from the online map */
1350 remove_cpu_from_maps(cpu);
1351 unlock_vector_lock();
1352 fixup_irqs(cpu_online_map);
1355 int native_cpu_disable(void)
1357 int cpu = smp_processor_id();
1360 * Perhaps use cpufreq to drop frequency, but that could go
1361 * into generic code.
1363 * We won't take down the boot processor on i386 due to some
1364 * interrupts only being able to be serviced by the BSP.
1365 * Especially so if we're not using an IOAPIC -zwane
1370 if (nmi_watchdog == NMI_LOCAL_APIC)
1371 stop_apic_nmi_watchdog(NULL);
1374 cpu_disable_common();
1378 void native_cpu_die(unsigned int cpu)
1380 /* We don't do anything here: idle task is faking death itself. */
1383 for (i = 0; i < 10; i++) {
1384 /* They ack this in play_dead by setting CPU_DEAD */
1385 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1386 printk(KERN_INFO "CPU %d is now offline\n", cpu);
1387 if (1 == num_online_cpus())
1388 alternatives_smp_switch(0);
1393 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1396 void play_dead_common(void)
1399 reset_lazy_tlbstate();
1400 irq_ctx_exit(raw_smp_processor_id());
1401 c1e_remove_cpu(raw_smp_processor_id());
1405 __get_cpu_var(cpu_state) = CPU_DEAD;
1408 * With physical CPU hotplug, we should halt the cpu
1410 local_irq_disable();
1413 void native_play_dead(void)
1419 #else /* ... !CONFIG_HOTPLUG_CPU */
1420 int native_cpu_disable(void)
1425 void native_cpu_die(unsigned int cpu)
1427 /* We said "no" in __cpu_disable */
1431 void native_play_dead(void)