2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
57 #include <asm/trampoline.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
64 #include <asm/genapic.h>
65 #include <asm/setup.h>
66 #include <linux/mc146818rtc.h>
68 #include <mach_apic.h>
69 #include <mach_wakecpu.h>
70 #include <smpboot_hooks.h>
73 u8 apicid_2_node[MAX_APICID];
74 static int low_mappings;
77 /* State of each CPU */
78 DEFINE_PER_CPU(int, cpu_state) = { 0 };
80 /* Store all idle threads, this can be reused instead of creating
81 * a new thread. Also avoids complicated thread destroy functionality
84 #ifdef CONFIG_HOTPLUG_CPU
86 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
87 * removed after init for !CONFIG_HOTPLUG_CPU.
89 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
90 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
91 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
93 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
94 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
95 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
98 /* Number of siblings per CPU package */
99 int smp_num_siblings = 1;
100 EXPORT_SYMBOL(smp_num_siblings);
102 /* Last level cache ID of each logical CPU */
103 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
105 /* bitmap of online cpus */
106 cpumask_t cpu_online_map __read_mostly;
107 EXPORT_SYMBOL(cpu_online_map);
109 cpumask_t cpu_callin_map;
110 cpumask_t cpu_callout_map;
111 cpumask_t cpu_possible_map;
112 EXPORT_SYMBOL(cpu_possible_map);
114 /* representing HT siblings of each logical CPU */
115 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
116 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
118 /* representing HT and core siblings of each logical CPU */
119 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
120 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
122 /* Per CPU bogomips and other parameters */
123 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
124 EXPORT_PER_CPU_SYMBOL(cpu_info);
126 static atomic_t init_deasserted;
129 /* representing cpus for which sibling maps can be computed */
130 static cpumask_t cpu_sibling_setup_map;
132 /* Set if we find a B stepping CPU */
133 static int __cpuinitdata smp_b_stepping;
135 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
137 /* which logical CPUs are on which nodes */
138 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
139 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
140 EXPORT_SYMBOL(node_to_cpumask_map);
141 /* which node each logical CPU is on */
142 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
143 EXPORT_SYMBOL(cpu_to_node_map);
145 /* set up a mapping between cpu and node. */
146 static void map_cpu_to_node(int cpu, int node)
148 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
149 cpu_set(cpu, node_to_cpumask_map[node]);
150 cpu_to_node_map[cpu] = node;
153 /* undo a mapping between cpu and node. */
154 static void unmap_cpu_to_node(int cpu)
158 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
159 for (node = 0; node < MAX_NUMNODES; node++)
160 cpu_clear(cpu, node_to_cpumask_map[node]);
161 cpu_to_node_map[cpu] = 0;
163 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
164 #define map_cpu_to_node(cpu, node) ({})
165 #define unmap_cpu_to_node(cpu) ({})
169 static int boot_cpu_logical_apicid;
171 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
172 { [0 ... NR_CPUS-1] = BAD_APICID };
174 static void map_cpu_to_logical_apicid(void)
176 int cpu = smp_processor_id();
177 int apicid = logical_smp_processor_id();
178 int node = apicid_to_node(apicid);
180 if (!node_online(node))
181 node = first_online_node;
183 cpu_2_logical_apicid[cpu] = apicid;
184 map_cpu_to_node(cpu, node);
187 void numa_remove_cpu(int cpu)
189 cpu_2_logical_apicid[cpu] = BAD_APICID;
190 unmap_cpu_to_node(cpu);
193 #define map_cpu_to_logical_apicid() do {} while (0)
197 * Report back to the Boot Processor.
200 static void __cpuinit smp_callin(void)
203 unsigned long timeout;
206 * If waken up by an INIT in an 82489DX configuration
207 * we may get here before an INIT-deassert IPI reaches
208 * our local APIC. We have to wait for the IPI or we'll
209 * lock up on an APIC access.
211 wait_for_init_deassert(&init_deasserted);
214 * (This works even if the APIC is not enabled.)
216 phys_id = read_apic_id();
217 cpuid = smp_processor_id();
218 if (cpu_isset(cpuid, cpu_callin_map)) {
219 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
222 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
225 * STARTUP IPIs are fragile beasts as they might sometimes
226 * trigger some glue motherboard logic. Complete APIC bus
227 * silence for 1 second, this overestimates the time the
228 * boot CPU is spending to send the up to 2 STARTUP IPIs
229 * by a factor of two. This should be enough.
233 * Waiting 2s total for startup (udelay is not yet working)
235 timeout = jiffies + 2*HZ;
236 while (time_before(jiffies, timeout)) {
238 * Has the boot CPU finished it's STARTUP sequence?
240 if (cpu_isset(cpuid, cpu_callout_map))
245 if (!time_before(jiffies, timeout)) {
246 panic("%s: CPU%d started up but did not get a callout!\n",
251 * the boot CPU has finished the init stage and is spinning
252 * on callin_map until we finish. We are free to set up this
253 * CPU, first the APIC. (this is probably redundant on most
257 pr_debug("CALLIN, before setup_local_APIC().\n");
258 smp_callin_clear_local_apic();
260 end_local_APIC_setup();
261 map_cpu_to_logical_apicid();
263 notify_cpu_starting(cpuid);
267 * Need to enable IRQs because it can take longer and then
268 * the NMI watchdog might kill us.
273 pr_debug("Stack at about %p\n", &cpuid);
276 * Save our processor parameters
278 smp_store_cpu_info(cpuid);
281 * Allow the master to continue.
283 cpu_set(cpuid, cpu_callin_map);
286 static int __cpuinitdata unsafe_smp;
289 * Activate a secondary processor.
291 static void __cpuinit start_secondary(void *unused)
294 * Don't put *anything* before cpu_init(), SMP booting is too
295 * fragile that we want to limit the things done here to the
296 * most necessary things.
305 /* otherwise gcc will move up smp_processor_id before the cpu_init */
308 * Check TSC synchronization with the BP:
310 check_tsc_sync_target();
312 if (nmi_watchdog == NMI_IO_APIC) {
313 disable_8259A_irq(0);
314 enable_NMI_through_LVT0();
324 /* This must be done before setting cpu_online_map */
325 set_cpu_sibling_map(raw_smp_processor_id());
329 * We need to hold call_lock, so there is no inconsistency
330 * between the time smp_call_function() determines number of
331 * IPI recipients, and the time when the determination is made
332 * for which cpus receive the IPI. Holding this
333 * lock helps us to not include this cpu in a currently in progress
334 * smp_call_function().
336 * We need to hold vector_lock so there the set of online cpus
337 * does not change while we are assigning vectors to cpus. Holding
338 * this lock ensures we don't half assign or remove an irq from a cpu.
342 __setup_vector_irq(smp_processor_id());
343 cpu_set(smp_processor_id(), cpu_online_map);
344 unlock_vector_lock();
346 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
348 /* enable local interrupts */
351 setup_secondary_clock();
357 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
360 * Mask B, Pentium, but not Pentium MMX
362 if (c->x86_vendor == X86_VENDOR_INTEL &&
364 c->x86_mask >= 1 && c->x86_mask <= 4 &&
367 * Remember we have B step Pentia with bugs
372 * Certain Athlons might work (for various values of 'work') in SMP
373 * but they are not certified as MP capable.
375 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
377 if (num_possible_cpus() == 1)
380 /* Athlon 660/661 is valid. */
381 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
385 /* Duron 670 is valid */
386 if ((c->x86_model == 7) && (c->x86_mask == 0))
390 * Athlon 662, Duron 671, and Athlon >model 7 have capability
391 * bit. It's worth noting that the A5 stepping (662) of some
392 * Athlon XP's have the MP bit set.
393 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
396 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
397 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
402 /* If we get here, not a certified SMP capable AMD system. */
410 static void __cpuinit smp_checks(void)
413 printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
414 "with B stepping processors.\n");
417 * Don't taint if we are running SMP kernel on a single non-MP
420 if (unsafe_smp && num_online_cpus() > 1) {
421 printk(KERN_INFO "WARNING: This combination of AMD"
422 "processors is not suitable for SMP.\n");
423 add_taint(TAINT_UNSAFE_SMP);
428 * The bootstrap kernel entry code has set these up. Save them for
432 void __cpuinit smp_store_cpu_info(int id)
434 struct cpuinfo_x86 *c = &cpu_data(id);
439 identify_secondary_cpu(c);
444 void __cpuinit set_cpu_sibling_map(int cpu)
447 struct cpuinfo_x86 *c = &cpu_data(cpu);
449 cpu_set(cpu, cpu_sibling_setup_map);
451 if (smp_num_siblings > 1) {
452 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
453 if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
454 c->cpu_core_id == cpu_data(i).cpu_core_id) {
455 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
456 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
457 cpu_set(i, per_cpu(cpu_core_map, cpu));
458 cpu_set(cpu, per_cpu(cpu_core_map, i));
459 cpu_set(i, c->llc_shared_map);
460 cpu_set(cpu, cpu_data(i).llc_shared_map);
464 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
467 cpu_set(cpu, c->llc_shared_map);
469 if (current_cpu_data.x86_max_cores == 1) {
470 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
475 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
476 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
477 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
478 cpu_set(i, c->llc_shared_map);
479 cpu_set(cpu, cpu_data(i).llc_shared_map);
481 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
482 cpu_set(i, per_cpu(cpu_core_map, cpu));
483 cpu_set(cpu, per_cpu(cpu_core_map, i));
485 * Does this new cpu bringup a new core?
487 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
489 * for each core in package, increment
490 * the booted_cores for this new cpu
492 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
495 * increment the core count for all
496 * the other cpus in this package
499 cpu_data(i).booted_cores++;
500 } else if (i != cpu && !c->booted_cores)
501 c->booted_cores = cpu_data(i).booted_cores;
506 /* maps the cpu to the sched domain representing multi-core */
507 cpumask_t cpu_coregroup_map(int cpu)
509 struct cpuinfo_x86 *c = &cpu_data(cpu);
511 * For perf, we return last level cache shared map.
512 * And for power savings, we return cpu_core_map
514 if (sched_mc_power_savings || sched_smt_power_savings)
515 return per_cpu(cpu_core_map, cpu);
517 return c->llc_shared_map;
520 static void impress_friends(void)
523 unsigned long bogosum = 0;
525 * Allow the user to impress friends.
527 pr_debug("Before bogomips.\n");
528 for_each_possible_cpu(cpu)
529 if (cpu_isset(cpu, cpu_callout_map))
530 bogosum += cpu_data(cpu).loops_per_jiffy;
532 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
535 (bogosum/(5000/HZ))%100);
537 pr_debug("Before bogocount - setting activated=1.\n");
540 void __inquire_remote_apic(int apicid)
542 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
543 char *names[] = { "ID", "VERSION", "SPIV" };
547 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid);
549 for (i = 0; i < ARRAY_SIZE(regs); i++) {
550 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]);
555 status = safe_apic_wait_icr_idle();
558 "a previous APIC delivery may have failed\n");
560 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
565 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
566 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
569 case APIC_ICR_RR_VALID:
570 status = apic_read(APIC_RRR);
571 printk(KERN_CONT "%08x\n", status);
574 printk(KERN_CONT "failed\n");
580 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
581 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
582 * won't ... remember to clear down the APIC, etc later.
585 wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
587 unsigned long send_status, accept_status = 0;
591 /* Boot on the stack */
592 /* Kick the second */
593 apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid);
595 pr_debug("Waiting for send to finish...\n");
596 send_status = safe_apic_wait_icr_idle();
599 * Give the other CPU some time to accept the IPI.
602 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
603 maxlvt = lapic_get_maxlvt();
604 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
605 apic_write(APIC_ESR, 0);
606 accept_status = (apic_read(APIC_ESR) & 0xEF);
608 pr_debug("NMI sent.\n");
611 printk(KERN_ERR "APIC never delivered???\n");
613 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
615 return (send_status | accept_status);
619 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
621 unsigned long send_status, accept_status = 0;
622 int maxlvt, num_starts, j;
624 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) {
625 send_status = uv_wakeup_secondary(phys_apicid, start_eip);
626 atomic_set(&init_deasserted, 1);
630 maxlvt = lapic_get_maxlvt();
633 * Be paranoid about clearing APIC errors.
635 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
636 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
637 apic_write(APIC_ESR, 0);
641 pr_debug("Asserting INIT.\n");
644 * Turn INIT on target chip
649 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
652 pr_debug("Waiting for send to finish...\n");
653 send_status = safe_apic_wait_icr_idle();
657 pr_debug("Deasserting INIT.\n");
661 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
663 pr_debug("Waiting for send to finish...\n");
664 send_status = safe_apic_wait_icr_idle();
667 atomic_set(&init_deasserted, 1);
670 * Should we send STARTUP IPIs ?
672 * Determine this based on the APIC version.
673 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
675 if (APIC_INTEGRATED(apic_version[phys_apicid]))
681 * Paravirt / VMI wants a startup IPI hook here to set up the
682 * target processor state.
684 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
685 (unsigned long)stack_start.sp);
688 * Run STARTUP IPI loop.
690 pr_debug("#startup loops: %d.\n", num_starts);
692 for (j = 1; j <= num_starts; j++) {
693 pr_debug("Sending STARTUP #%d.\n", j);
694 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
695 apic_write(APIC_ESR, 0);
697 pr_debug("After apic_write.\n");
704 /* Boot on the stack */
705 /* Kick the second */
706 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
710 * Give the other CPU some time to accept the IPI.
714 pr_debug("Startup point 1.\n");
716 pr_debug("Waiting for send to finish...\n");
717 send_status = safe_apic_wait_icr_idle();
720 * Give the other CPU some time to accept the IPI.
723 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
724 apic_write(APIC_ESR, 0);
725 accept_status = (apic_read(APIC_ESR) & 0xEF);
726 if (send_status || accept_status)
729 pr_debug("After Startup.\n");
732 printk(KERN_ERR "APIC never delivered???\n");
734 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
736 return (send_status | accept_status);
740 struct work_struct work;
741 struct task_struct *idle;
742 struct completion done;
746 static void __cpuinit do_fork_idle(struct work_struct *work)
748 struct create_idle *c_idle =
749 container_of(work, struct create_idle, work);
751 c_idle->idle = fork_idle(c_idle->cpu);
752 complete(&c_idle->done);
757 /* __ref because it's safe to call free_bootmem when after_bootmem == 0. */
758 static void __ref free_bootmem_pda(struct x8664_pda *oldpda)
761 free_bootmem((unsigned long)oldpda, sizeof(*oldpda));
765 * Allocate node local memory for the AP pda.
767 * Must be called after the _cpu_pda pointer table is initialized.
769 int __cpuinit get_local_pda(int cpu)
771 struct x8664_pda *oldpda, *newpda;
772 unsigned long size = sizeof(struct x8664_pda);
773 int node = cpu_to_node(cpu);
775 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem)
778 oldpda = cpu_pda(cpu);
779 newpda = kmalloc_node(size, GFP_ATOMIC, node);
781 printk(KERN_ERR "Could not allocate node local PDA "
782 "for CPU %d on node %d\n", cpu, node);
785 return 0; /* have a usable pda */
791 memcpy(newpda, oldpda, size);
792 free_bootmem_pda(oldpda);
795 newpda->in_bootmem = 0;
796 cpu_pda(cpu) = newpda;
799 #endif /* CONFIG_X86_64 */
801 static int __cpuinit do_boot_cpu(int apicid, int cpu)
803 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
804 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
805 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
808 unsigned long boot_error = 0;
810 unsigned long start_ip;
811 unsigned short nmi_high = 0, nmi_low = 0;
812 struct create_idle c_idle = {
814 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
816 INIT_WORK(&c_idle.work, do_fork_idle);
819 /* Allocate node local memory for AP pdas */
821 boot_error = get_local_pda(cpu);
824 /* if can't get pda memory, can't start cpu */
828 alternatives_smp_switch(1);
830 c_idle.idle = get_idle_for_cpu(cpu);
833 * We can't use kernel_thread since we must avoid to
834 * reschedule the child.
837 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
838 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
839 init_idle(c_idle.idle, cpu);
843 if (!keventd_up() || current_is_keventd())
844 c_idle.work.func(&c_idle.work);
846 schedule_work(&c_idle.work);
847 wait_for_completion(&c_idle.done);
850 if (IS_ERR(c_idle.idle)) {
851 printk("failed fork for CPU %d\n", cpu);
852 return PTR_ERR(c_idle.idle);
855 set_idle_for_cpu(cpu, c_idle.idle);
858 per_cpu(current_task, cpu) = c_idle.idle;
860 /* Stack for startup_32 can be just as for start_secondary onwards */
863 cpu_pda(cpu)->pcurrent = c_idle.idle;
864 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
866 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
867 initial_code = (unsigned long)start_secondary;
868 stack_start.sp = (void *) c_idle.idle->thread.sp;
870 /* start_ip had better be page-aligned! */
871 start_ip = setup_trampoline();
873 /* So we see what's up */
874 printk(KERN_INFO "Booting processor %d APIC 0x%x ip 0x%lx\n",
875 cpu, apicid, start_ip);
878 * This grunge runs the startup process for
879 * the targeted processor.
882 atomic_set(&init_deasserted, 0);
884 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
886 pr_debug("Setting warm reset code and vector.\n");
888 store_NMI_vector(&nmi_high, &nmi_low);
890 smpboot_setup_warm_reset_vector(start_ip);
892 * Be paranoid about clearing APIC errors.
894 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
895 apic_write(APIC_ESR, 0);
901 * Starting actual IPI sequence...
903 boot_error = wakeup_secondary_cpu(apicid, start_ip);
907 * allow APs to start initializing.
909 pr_debug("Before Callout %d.\n", cpu);
910 cpu_set(cpu, cpu_callout_map);
911 pr_debug("After Callout %d.\n", cpu);
914 * Wait 5s total for a response
916 for (timeout = 0; timeout < 50000; timeout++) {
917 if (cpu_isset(cpu, cpu_callin_map))
918 break; /* It has booted */
922 if (cpu_isset(cpu, cpu_callin_map)) {
923 /* number CPUs logically, starting from 1 (BSP is 0) */
925 printk(KERN_INFO "CPU%d: ", cpu);
926 print_cpu_info(&cpu_data(cpu));
927 pr_debug("CPU has booted.\n");
930 if (*((volatile unsigned char *)trampoline_base)
932 /* trampoline started but...? */
933 printk(KERN_ERR "Stuck ??\n");
935 /* trampoline code not run */
936 printk(KERN_ERR "Not responding.\n");
937 if (get_uv_system_type() != UV_NON_UNIQUE_APIC)
938 inquire_remote_apic(apicid);
945 /* Try to put things back the way they were before ... */
946 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
947 cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */
948 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
949 cpu_clear(cpu, cpu_present_map);
950 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
953 /* mark "stuck" area as not stuck */
954 *((volatile unsigned long *)trampoline_base) = 0;
957 * Cleanup possible dangling ends...
959 smpboot_restore_warm_reset_vector();
964 int __cpuinit native_cpu_up(unsigned int cpu)
966 int apicid = cpu_present_to_apicid(cpu);
970 WARN_ON(irqs_disabled());
972 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
974 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
975 !physid_isset(apicid, phys_cpu_present_map)) {
976 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
981 * Already booted CPU?
983 if (cpu_isset(cpu, cpu_callin_map)) {
984 pr_debug("do_boot_cpu %d Already started\n", cpu);
989 * Save current MTRR state in case it was changed since early boot
990 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
994 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
997 /* init low mem mapping */
998 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
999 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
1003 err = do_boot_cpu(apicid, cpu);
1008 err = do_boot_cpu(apicid, cpu);
1011 pr_debug("do_boot_cpu failed %d\n", err);
1016 * Check TSC synchronization with the AP (keep irqs disabled
1019 local_irq_save(flags);
1020 check_tsc_sync_source(cpu);
1021 local_irq_restore(flags);
1023 while (!cpu_online(cpu)) {
1025 touch_nmi_watchdog();
1032 * Fall back to non SMP mode after errors.
1034 * RED-PEN audit/test this more. I bet there is more state messed up here.
1036 static __init void disable_smp(void)
1038 cpu_present_map = cpumask_of_cpu(0);
1039 cpu_possible_map = cpumask_of_cpu(0);
1040 smpboot_clear_io_apic_irqs();
1042 if (smp_found_config)
1043 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1045 physid_set_mask_of_physid(0, &phys_cpu_present_map);
1046 map_cpu_to_logical_apicid();
1047 cpu_set(0, per_cpu(cpu_sibling_map, 0));
1048 cpu_set(0, per_cpu(cpu_core_map, 0));
1052 * Various sanity checks.
1054 static int __init smp_sanity_check(unsigned max_cpus)
1058 #if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32)
1059 if (def_to_bigsmp && nr_cpu_ids > 8) {
1064 "More than 8 CPUs detected - skipping them.\n"
1065 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
1068 for_each_present_cpu(cpu) {
1070 cpu_clear(cpu, cpu_present_map);
1075 for_each_possible_cpu(cpu) {
1077 cpu_clear(cpu, cpu_possible_map);
1085 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1086 printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
1087 "by the BIOS.\n", hard_smp_processor_id());
1088 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1092 * If we couldn't find an SMP configuration at boot time,
1093 * get out of here now!
1095 if (!smp_found_config && !acpi_lapic) {
1097 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1099 if (APIC_init_uniprocessor())
1100 printk(KERN_NOTICE "Local APIC not detected."
1101 " Using dummy APIC emulation.\n");
1106 * Should not be necessary because the MP table should list the boot
1107 * CPU too, but we do it for the sake of robustness anyway.
1109 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
1111 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1112 boot_cpu_physical_apicid);
1113 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1118 * If we couldn't find a local APIC, then get out of here now!
1120 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1122 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1123 boot_cpu_physical_apicid);
1124 printk(KERN_ERR "... forcing use of dummy APIC emulation."
1125 "(tell your hw vendor)\n");
1126 smpboot_clear_io_apic();
1130 verify_local_APIC();
1133 * If SMP should be disabled, then really disable it!
1136 printk(KERN_INFO "SMP mode deactivated.\n");
1137 smpboot_clear_io_apic();
1139 localise_nmi_watchdog();
1143 end_local_APIC_setup();
1150 static void __init smp_cpu_index_default(void)
1153 struct cpuinfo_x86 *c;
1155 for_each_possible_cpu(i) {
1157 /* mark all to hotplug */
1158 c->cpu_index = NR_CPUS;
1163 * Prepare for SMP bootup. The MP table or ACPI has been read
1164 * earlier. Just do some sanity checking here and enable APIC mode.
1166 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1169 smp_cpu_index_default();
1170 current_cpu_data = boot_cpu_data;
1171 cpu_callin_map = cpumask_of_cpu(0);
1174 * Setup boot CPU information
1176 smp_store_cpu_info(0); /* Final full version of the data */
1177 #ifdef CONFIG_X86_32
1178 boot_cpu_logical_apicid = logical_smp_processor_id();
1180 current_thread_info()->cpu = 0; /* needed? */
1181 set_cpu_sibling_map(0);
1183 #ifdef CONFIG_X86_64
1185 setup_apic_routing();
1188 if (smp_sanity_check(max_cpus) < 0) {
1189 printk(KERN_INFO "SMP disabled\n");
1195 if (read_apic_id() != boot_cpu_physical_apicid) {
1196 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1197 read_apic_id(), boot_cpu_physical_apicid);
1198 /* Or can we switch back to PIC here? */
1205 * Switch from PIC to APIC mode.
1209 #ifdef CONFIG_X86_64
1211 * Enable IO APIC before setting up error vector
1213 if (!skip_ioapic_setup && nr_ioapics)
1216 end_local_APIC_setup();
1218 map_cpu_to_logical_apicid();
1220 setup_portio_remap();
1222 smpboot_setup_io_apic();
1224 * Set up local APIC timer on boot CPU.
1227 printk(KERN_INFO "CPU%d: ", 0);
1228 print_cpu_info(&cpu_data(0));
1237 * Early setup to make printk work.
1239 void __init native_smp_prepare_boot_cpu(void)
1241 int me = smp_processor_id();
1242 #ifdef CONFIG_X86_32
1245 switch_to_new_gdt();
1246 /* already set me in cpu_online_map in boot_cpu_init() */
1247 cpu_set(me, cpu_callout_map);
1248 per_cpu(cpu_state, me) = CPU_ONLINE;
1251 void __init native_smp_cpus_done(unsigned int max_cpus)
1253 pr_debug("Boot done.\n");
1257 #ifdef CONFIG_X86_IO_APIC
1258 setup_ioapic_dest();
1260 check_nmi_watchdog();
1264 * cpu_possible_map should be static, it cannot change as cpu's
1265 * are onlined, or offlined. The reason is per-cpu data-structures
1266 * are allocated by some modules at init time, and dont expect to
1267 * do this dynamically on cpu arrival/departure.
1268 * cpu_present_map on the other hand can change dynamically.
1269 * In case when cpu_hotplug is not compiled, then we resort to current
1270 * behaviour, which is cpu_possible == cpu_present.
1273 * Three ways to find out the number of additional hotplug CPUs:
1274 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1275 * - The user can overwrite it with additional_cpus=NUM
1276 * - Otherwise don't reserve additional CPUs.
1277 * We do this because additional CPUs waste a lot of memory.
1280 __init void prefill_possible_map(void)
1284 /* no processor from mptable or madt */
1285 if (!num_processors)
1288 possible = num_processors + disabled_cpus;
1289 if (possible > NR_CPUS)
1292 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1293 possible, max_t(int, possible - num_processors, 0));
1295 for (i = 0; i < possible; i++)
1296 cpu_set(i, cpu_possible_map);
1298 nr_cpu_ids = possible;
1301 #ifdef CONFIG_HOTPLUG_CPU
1303 static void remove_siblinginfo(int cpu)
1306 struct cpuinfo_x86 *c = &cpu_data(cpu);
1308 for_each_cpu_mask_nr(sibling, per_cpu(cpu_core_map, cpu)) {
1309 cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
1311 * last thread sibling in this cpu core going down
1313 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
1314 cpu_data(sibling).booted_cores--;
1317 for_each_cpu_mask_nr(sibling, per_cpu(cpu_sibling_map, cpu))
1318 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
1319 cpus_clear(per_cpu(cpu_sibling_map, cpu));
1320 cpus_clear(per_cpu(cpu_core_map, cpu));
1321 c->phys_proc_id = 0;
1323 cpu_clear(cpu, cpu_sibling_setup_map);
1326 static void __ref remove_cpu_from_maps(int cpu)
1328 cpu_clear(cpu, cpu_online_map);
1329 cpu_clear(cpu, cpu_callout_map);
1330 cpu_clear(cpu, cpu_callin_map);
1331 /* was set by cpu_init() */
1332 cpu_clear(cpu, cpu_initialized);
1333 numa_remove_cpu(cpu);
1336 void cpu_disable_common(void)
1338 int cpu = smp_processor_id();
1341 * Allow any queued timer interrupts to get serviced
1342 * This is only a temporary solution until we cleanup
1343 * fixup_irqs as we do for IA64.
1348 local_irq_disable();
1349 remove_siblinginfo(cpu);
1351 /* It's now safe to remove this processor from the online map */
1353 remove_cpu_from_maps(cpu);
1354 unlock_vector_lock();
1355 fixup_irqs(cpu_online_map);
1358 int native_cpu_disable(void)
1360 int cpu = smp_processor_id();
1363 * Perhaps use cpufreq to drop frequency, but that could go
1364 * into generic code.
1366 * We won't take down the boot processor on i386 due to some
1367 * interrupts only being able to be serviced by the BSP.
1368 * Especially so if we're not using an IOAPIC -zwane
1373 if (nmi_watchdog == NMI_LOCAL_APIC)
1374 stop_apic_nmi_watchdog(NULL);
1377 cpu_disable_common();
1381 void native_cpu_die(unsigned int cpu)
1383 /* We don't do anything here: idle task is faking death itself. */
1386 for (i = 0; i < 10; i++) {
1387 /* They ack this in play_dead by setting CPU_DEAD */
1388 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1389 printk(KERN_INFO "CPU %d is now offline\n", cpu);
1390 if (1 == num_online_cpus())
1391 alternatives_smp_switch(0);
1396 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1399 void play_dead_common(void)
1402 reset_lazy_tlbstate();
1403 irq_ctx_exit(raw_smp_processor_id());
1404 c1e_remove_cpu(raw_smp_processor_id());
1408 __get_cpu_var(cpu_state) = CPU_DEAD;
1411 * With physical CPU hotplug, we should halt the cpu
1413 local_irq_disable();
1416 void native_play_dead(void)
1422 #else /* ... !CONFIG_HOTPLUG_CPU */
1423 int native_cpu_disable(void)
1428 void native_cpu_die(unsigned int cpu)
1430 /* We said "no" in __cpu_disable */
1434 void native_play_dead(void)