2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
57 #include <asm/trampoline.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
64 #include <asm/genapic.h>
65 #include <linux/mc146818rtc.h>
67 #include <mach_apic.h>
68 #include <mach_wakecpu.h>
69 #include <smpboot_hooks.h>
72 u8 apicid_2_node[MAX_APICID];
73 static int low_mappings;
76 /* State of each CPU */
77 DEFINE_PER_CPU(int, cpu_state) = { 0 };
79 /* Store all idle threads, this can be reused instead of creating
80 * a new thread. Also avoids complicated thread destroy functionality
83 #ifdef CONFIG_HOTPLUG_CPU
85 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
86 * removed after init for !CONFIG_HOTPLUG_CPU.
88 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
89 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
90 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
92 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
93 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
94 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
97 /* Number of siblings per CPU package */
98 int smp_num_siblings = 1;
99 EXPORT_SYMBOL(smp_num_siblings);
101 /* Last level cache ID of each logical CPU */
102 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
104 /* bitmap of online cpus */
105 cpumask_t cpu_online_map __read_mostly;
106 EXPORT_SYMBOL(cpu_online_map);
108 cpumask_t cpu_callin_map;
109 cpumask_t cpu_callout_map;
110 cpumask_t cpu_possible_map;
111 EXPORT_SYMBOL(cpu_possible_map);
113 /* representing HT siblings of each logical CPU */
114 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
115 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
117 /* representing HT and core siblings of each logical CPU */
118 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
119 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
121 /* Per CPU bogomips and other parameters */
122 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
123 EXPORT_PER_CPU_SYMBOL(cpu_info);
125 static atomic_t init_deasserted;
128 /* representing cpus for which sibling maps can be computed */
129 static cpumask_t cpu_sibling_setup_map;
131 /* Set if we find a B stepping CPU */
132 static int __cpuinitdata smp_b_stepping;
134 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
136 /* which logical CPUs are on which nodes */
137 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
138 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
139 EXPORT_SYMBOL(node_to_cpumask_map);
140 /* which node each logical CPU is on */
141 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
142 EXPORT_SYMBOL(cpu_to_node_map);
144 /* set up a mapping between cpu and node. */
145 static void map_cpu_to_node(int cpu, int node)
147 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
148 cpu_set(cpu, node_to_cpumask_map[node]);
149 cpu_to_node_map[cpu] = node;
152 /* undo a mapping between cpu and node. */
153 static void unmap_cpu_to_node(int cpu)
157 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
158 for (node = 0; node < MAX_NUMNODES; node++)
159 cpu_clear(cpu, node_to_cpumask_map[node]);
160 cpu_to_node_map[cpu] = 0;
162 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
163 #define map_cpu_to_node(cpu, node) ({})
164 #define unmap_cpu_to_node(cpu) ({})
168 static int boot_cpu_logical_apicid;
170 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
171 { [0 ... NR_CPUS-1] = BAD_APICID };
173 static void map_cpu_to_logical_apicid(void)
175 int cpu = smp_processor_id();
176 int apicid = logical_smp_processor_id();
177 int node = apicid_to_node(apicid);
179 if (!node_online(node))
180 node = first_online_node;
182 cpu_2_logical_apicid[cpu] = apicid;
183 map_cpu_to_node(cpu, node);
186 void numa_remove_cpu(int cpu)
188 cpu_2_logical_apicid[cpu] = BAD_APICID;
189 unmap_cpu_to_node(cpu);
192 #define map_cpu_to_logical_apicid() do {} while (0)
196 * Report back to the Boot Processor.
199 static void __cpuinit smp_callin(void)
202 unsigned long timeout;
205 * If waken up by an INIT in an 82489DX configuration
206 * we may get here before an INIT-deassert IPI reaches
207 * our local APIC. We have to wait for the IPI or we'll
208 * lock up on an APIC access.
210 wait_for_init_deassert(&init_deasserted);
213 * (This works even if the APIC is not enabled.)
215 phys_id = read_apic_id();
216 cpuid = smp_processor_id();
217 if (cpu_isset(cpuid, cpu_callin_map)) {
218 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
221 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
224 * STARTUP IPIs are fragile beasts as they might sometimes
225 * trigger some glue motherboard logic. Complete APIC bus
226 * silence for 1 second, this overestimates the time the
227 * boot CPU is spending to send the up to 2 STARTUP IPIs
228 * by a factor of two. This should be enough.
232 * Waiting 2s total for startup (udelay is not yet working)
234 timeout = jiffies + 2*HZ;
235 while (time_before(jiffies, timeout)) {
237 * Has the boot CPU finished it's STARTUP sequence?
239 if (cpu_isset(cpuid, cpu_callout_map))
244 if (!time_before(jiffies, timeout)) {
245 panic("%s: CPU%d started up but did not get a callout!\n",
250 * the boot CPU has finished the init stage and is spinning
251 * on callin_map until we finish. We are free to set up this
252 * CPU, first the APIC. (this is probably redundant on most
256 pr_debug("CALLIN, before setup_local_APIC().\n");
257 smp_callin_clear_local_apic();
259 end_local_APIC_setup();
260 map_cpu_to_logical_apicid();
262 notify_cpu_starting(cpuid);
266 * Need to enable IRQs because it can take longer and then
267 * the NMI watchdog might kill us.
272 pr_debug("Stack at about %p\n", &cpuid);
275 * Save our processor parameters
277 smp_store_cpu_info(cpuid);
280 * Allow the master to continue.
282 cpu_set(cpuid, cpu_callin_map);
286 * Activate a secondary processor.
288 static void __cpuinit start_secondary(void *unused)
291 * Don't put *anything* before cpu_init(), SMP booting is too
292 * fragile that we want to limit the things done here to the
293 * most necessary things.
302 /* otherwise gcc will move up smp_processor_id before the cpu_init */
305 * Check TSC synchronization with the BP:
307 check_tsc_sync_target();
309 if (nmi_watchdog == NMI_IO_APIC) {
310 disable_8259A_irq(0);
311 enable_NMI_through_LVT0();
321 /* This must be done before setting cpu_online_map */
322 set_cpu_sibling_map(raw_smp_processor_id());
326 * We need to hold call_lock, so there is no inconsistency
327 * between the time smp_call_function() determines number of
328 * IPI recipients, and the time when the determination is made
329 * for which cpus receive the IPI. Holding this
330 * lock helps us to not include this cpu in a currently in progress
331 * smp_call_function().
333 * We need to hold vector_lock so there the set of online cpus
334 * does not change while we are assigning vectors to cpus. Holding
335 * this lock ensures we don't half assign or remove an irq from a cpu.
339 __setup_vector_irq(smp_processor_id());
340 cpu_set(smp_processor_id(), cpu_online_map);
341 unlock_vector_lock();
342 ipi_call_unlock_irq();
343 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
345 setup_secondary_clock();
351 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
354 * Mask B, Pentium, but not Pentium MMX
356 if (c->x86_vendor == X86_VENDOR_INTEL &&
358 c->x86_mask >= 1 && c->x86_mask <= 4 &&
361 * Remember we have B step Pentia with bugs
366 * Certain Athlons might work (for various values of 'work') in SMP
367 * but they are not certified as MP capable.
369 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
371 if (num_possible_cpus() == 1)
374 /* Athlon 660/661 is valid. */
375 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
379 /* Duron 670 is valid */
380 if ((c->x86_model == 7) && (c->x86_mask == 0))
384 * Athlon 662, Duron 671, and Athlon >model 7 have capability
385 * bit. It's worth noting that the A5 stepping (662) of some
386 * Athlon XP's have the MP bit set.
387 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
390 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
391 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
396 /* If we get here, not a certified SMP capable AMD system. */
397 add_taint(TAINT_UNSAFE_SMP);
404 static void __cpuinit smp_checks(void)
407 printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
408 "with B stepping processors.\n");
411 * Don't taint if we are running SMP kernel on a single non-MP
414 if (tainted & TAINT_UNSAFE_SMP) {
415 if (num_online_cpus())
416 printk(KERN_INFO "WARNING: This combination of AMD"
417 "processors is not suitable for SMP.\n");
419 tainted &= ~TAINT_UNSAFE_SMP;
424 * The bootstrap kernel entry code has set these up. Save them for
428 void __cpuinit smp_store_cpu_info(int id)
430 struct cpuinfo_x86 *c = &cpu_data(id);
435 identify_secondary_cpu(c);
440 void __cpuinit set_cpu_sibling_map(int cpu)
443 struct cpuinfo_x86 *c = &cpu_data(cpu);
445 cpu_set(cpu, cpu_sibling_setup_map);
447 if (smp_num_siblings > 1) {
448 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
449 if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
450 c->cpu_core_id == cpu_data(i).cpu_core_id) {
451 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
452 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
453 cpu_set(i, per_cpu(cpu_core_map, cpu));
454 cpu_set(cpu, per_cpu(cpu_core_map, i));
455 cpu_set(i, c->llc_shared_map);
456 cpu_set(cpu, cpu_data(i).llc_shared_map);
460 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
463 cpu_set(cpu, c->llc_shared_map);
465 if (current_cpu_data.x86_max_cores == 1) {
466 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
471 for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
472 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
473 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
474 cpu_set(i, c->llc_shared_map);
475 cpu_set(cpu, cpu_data(i).llc_shared_map);
477 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
478 cpu_set(i, per_cpu(cpu_core_map, cpu));
479 cpu_set(cpu, per_cpu(cpu_core_map, i));
481 * Does this new cpu bringup a new core?
483 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
485 * for each core in package, increment
486 * the booted_cores for this new cpu
488 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
491 * increment the core count for all
492 * the other cpus in this package
495 cpu_data(i).booted_cores++;
496 } else if (i != cpu && !c->booted_cores)
497 c->booted_cores = cpu_data(i).booted_cores;
502 /* maps the cpu to the sched domain representing multi-core */
503 cpumask_t cpu_coregroup_map(int cpu)
505 struct cpuinfo_x86 *c = &cpu_data(cpu);
507 * For perf, we return last level cache shared map.
508 * And for power savings, we return cpu_core_map
510 if (sched_mc_power_savings || sched_smt_power_savings)
511 return per_cpu(cpu_core_map, cpu);
513 return c->llc_shared_map;
516 static void impress_friends(void)
519 unsigned long bogosum = 0;
521 * Allow the user to impress friends.
523 pr_debug("Before bogomips.\n");
524 for_each_possible_cpu(cpu)
525 if (cpu_isset(cpu, cpu_callout_map))
526 bogosum += cpu_data(cpu).loops_per_jiffy;
528 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
531 (bogosum/(5000/HZ))%100);
533 pr_debug("Before bogocount - setting activated=1.\n");
536 static inline void __inquire_remote_apic(int apicid)
538 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
539 char *names[] = { "ID", "VERSION", "SPIV" };
543 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
545 for (i = 0; i < ARRAY_SIZE(regs); i++) {
546 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
551 status = safe_apic_wait_icr_idle();
554 "a previous APIC delivery may have failed\n");
556 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
561 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
562 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
565 case APIC_ICR_RR_VALID:
566 status = apic_read(APIC_RRR);
567 printk(KERN_CONT "%08x\n", status);
570 printk(KERN_CONT "failed\n");
575 #ifdef WAKE_SECONDARY_VIA_NMI
577 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
578 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
579 * won't ... remember to clear down the APIC, etc later.
582 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
584 unsigned long send_status, accept_status = 0;
588 /* Boot on the stack */
589 /* Kick the second */
590 apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid);
592 pr_debug("Waiting for send to finish...\n");
593 send_status = safe_apic_wait_icr_idle();
596 * Give the other CPU some time to accept the IPI.
599 maxlvt = lapic_get_maxlvt();
600 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
601 apic_write(APIC_ESR, 0);
602 accept_status = (apic_read(APIC_ESR) & 0xEF);
603 pr_debug("NMI sent.\n");
606 printk(KERN_ERR "APIC never delivered???\n");
608 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
610 return (send_status | accept_status);
612 #endif /* WAKE_SECONDARY_VIA_NMI */
614 #ifdef WAKE_SECONDARY_VIA_INIT
616 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
618 unsigned long send_status, accept_status = 0;
619 int maxlvt, num_starts, j;
621 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) {
622 send_status = uv_wakeup_secondary(phys_apicid, start_eip);
623 atomic_set(&init_deasserted, 1);
627 maxlvt = lapic_get_maxlvt();
630 * Be paranoid about clearing APIC errors.
632 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
633 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
634 apic_write(APIC_ESR, 0);
638 pr_debug("Asserting INIT.\n");
641 * Turn INIT on target chip
646 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
649 pr_debug("Waiting for send to finish...\n");
650 send_status = safe_apic_wait_icr_idle();
654 pr_debug("Deasserting INIT.\n");
658 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
660 pr_debug("Waiting for send to finish...\n");
661 send_status = safe_apic_wait_icr_idle();
664 atomic_set(&init_deasserted, 1);
667 * Should we send STARTUP IPIs ?
669 * Determine this based on the APIC version.
670 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
672 if (APIC_INTEGRATED(apic_version[phys_apicid]))
678 * Paravirt / VMI wants a startup IPI hook here to set up the
679 * target processor state.
681 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
682 (unsigned long)stack_start.sp);
685 * Run STARTUP IPI loop.
687 pr_debug("#startup loops: %d.\n", num_starts);
689 for (j = 1; j <= num_starts; j++) {
690 pr_debug("Sending STARTUP #%d.\n", j);
691 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
692 apic_write(APIC_ESR, 0);
694 pr_debug("After apic_write.\n");
701 /* Boot on the stack */
702 /* Kick the second */
703 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
707 * Give the other CPU some time to accept the IPI.
711 pr_debug("Startup point 1.\n");
713 pr_debug("Waiting for send to finish...\n");
714 send_status = safe_apic_wait_icr_idle();
717 * Give the other CPU some time to accept the IPI.
720 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
721 apic_write(APIC_ESR, 0);
722 accept_status = (apic_read(APIC_ESR) & 0xEF);
723 if (send_status || accept_status)
726 pr_debug("After Startup.\n");
729 printk(KERN_ERR "APIC never delivered???\n");
731 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
733 return (send_status | accept_status);
735 #endif /* WAKE_SECONDARY_VIA_INIT */
738 struct work_struct work;
739 struct task_struct *idle;
740 struct completion done;
744 static void __cpuinit do_fork_idle(struct work_struct *work)
746 struct create_idle *c_idle =
747 container_of(work, struct create_idle, work);
749 c_idle->idle = fork_idle(c_idle->cpu);
750 complete(&c_idle->done);
755 /* __ref because it's safe to call free_bootmem when after_bootmem == 0. */
756 static void __ref free_bootmem_pda(struct x8664_pda *oldpda)
759 free_bootmem((unsigned long)oldpda, sizeof(*oldpda));
763 * Allocate node local memory for the AP pda.
765 * Must be called after the _cpu_pda pointer table is initialized.
767 int __cpuinit get_local_pda(int cpu)
769 struct x8664_pda *oldpda, *newpda;
770 unsigned long size = sizeof(struct x8664_pda);
771 int node = cpu_to_node(cpu);
773 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem)
776 oldpda = cpu_pda(cpu);
777 newpda = kmalloc_node(size, GFP_ATOMIC, node);
779 printk(KERN_ERR "Could not allocate node local PDA "
780 "for CPU %d on node %d\n", cpu, node);
783 return 0; /* have a usable pda */
789 memcpy(newpda, oldpda, size);
790 free_bootmem_pda(oldpda);
793 newpda->in_bootmem = 0;
794 cpu_pda(cpu) = newpda;
797 #endif /* CONFIG_X86_64 */
799 static int __cpuinit do_boot_cpu(int apicid, int cpu)
801 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
802 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
803 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
806 unsigned long boot_error = 0;
808 unsigned long start_ip;
809 unsigned short nmi_high = 0, nmi_low = 0;
810 struct create_idle c_idle = {
812 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
814 INIT_WORK(&c_idle.work, do_fork_idle);
817 /* Allocate node local memory for AP pdas */
819 boot_error = get_local_pda(cpu);
822 /* if can't get pda memory, can't start cpu */
826 alternatives_smp_switch(1);
828 c_idle.idle = get_idle_for_cpu(cpu);
831 * We can't use kernel_thread since we must avoid to
832 * reschedule the child.
835 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
836 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
837 init_idle(c_idle.idle, cpu);
841 if (!keventd_up() || current_is_keventd())
842 c_idle.work.func(&c_idle.work);
844 schedule_work(&c_idle.work);
845 wait_for_completion(&c_idle.done);
848 if (IS_ERR(c_idle.idle)) {
849 printk("failed fork for CPU %d\n", cpu);
850 return PTR_ERR(c_idle.idle);
853 set_idle_for_cpu(cpu, c_idle.idle);
856 per_cpu(current_task, cpu) = c_idle.idle;
858 /* Stack for startup_32 can be just as for start_secondary onwards */
861 cpu_pda(cpu)->pcurrent = c_idle.idle;
862 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
864 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
865 initial_code = (unsigned long)start_secondary;
866 stack_start.sp = (void *) c_idle.idle->thread.sp;
868 /* start_ip had better be page-aligned! */
869 start_ip = setup_trampoline();
871 /* So we see what's up */
872 printk(KERN_INFO "Booting processor %d/%d ip %lx\n",
873 cpu, apicid, start_ip);
876 * This grunge runs the startup process for
877 * the targeted processor.
880 atomic_set(&init_deasserted, 0);
882 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
884 pr_debug("Setting warm reset code and vector.\n");
886 store_NMI_vector(&nmi_high, &nmi_low);
888 smpboot_setup_warm_reset_vector(start_ip);
890 * Be paranoid about clearing APIC errors.
892 apic_write(APIC_ESR, 0);
897 * Starting actual IPI sequence...
899 boot_error = wakeup_secondary_cpu(apicid, start_ip);
903 * allow APs to start initializing.
905 pr_debug("Before Callout %d.\n", cpu);
906 cpu_set(cpu, cpu_callout_map);
907 pr_debug("After Callout %d.\n", cpu);
910 * Wait 5s total for a response
912 for (timeout = 0; timeout < 50000; timeout++) {
913 if (cpu_isset(cpu, cpu_callin_map))
914 break; /* It has booted */
918 if (cpu_isset(cpu, cpu_callin_map)) {
919 /* number CPUs logically, starting from 1 (BSP is 0) */
921 printk(KERN_INFO "CPU%d: ", cpu);
922 print_cpu_info(&cpu_data(cpu));
923 pr_debug("CPU has booted.\n");
926 if (*((volatile unsigned char *)trampoline_base)
928 /* trampoline started but...? */
929 printk(KERN_ERR "Stuck ??\n");
931 /* trampoline code not run */
932 printk(KERN_ERR "Not responding.\n");
933 if (get_uv_system_type() != UV_NON_UNIQUE_APIC)
934 inquire_remote_apic(apicid);
941 /* Try to put things back the way they were before ... */
942 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
943 cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */
944 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
945 cpu_clear(cpu, cpu_present_map);
946 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
949 /* mark "stuck" area as not stuck */
950 *((volatile unsigned long *)trampoline_base) = 0;
953 * Cleanup possible dangling ends...
955 smpboot_restore_warm_reset_vector();
960 int __cpuinit native_cpu_up(unsigned int cpu)
962 int apicid = cpu_present_to_apicid(cpu);
966 WARN_ON(irqs_disabled());
968 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
970 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
971 !physid_isset(apicid, phys_cpu_present_map)) {
972 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
977 * Already booted CPU?
979 if (cpu_isset(cpu, cpu_callin_map)) {
980 pr_debug("do_boot_cpu %d Already started\n", cpu);
985 * Save current MTRR state in case it was changed since early boot
986 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
990 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
993 /* init low mem mapping */
994 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
995 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
999 err = do_boot_cpu(apicid, cpu);
1004 err = do_boot_cpu(apicid, cpu);
1007 pr_debug("do_boot_cpu failed %d\n", err);
1012 * Check TSC synchronization with the AP (keep irqs disabled
1015 local_irq_save(flags);
1016 check_tsc_sync_source(cpu);
1017 local_irq_restore(flags);
1019 while (!cpu_online(cpu)) {
1021 touch_nmi_watchdog();
1028 * Fall back to non SMP mode after errors.
1030 * RED-PEN audit/test this more. I bet there is more state messed up here.
1032 static __init void disable_smp(void)
1034 cpu_present_map = cpumask_of_cpu(0);
1035 cpu_possible_map = cpumask_of_cpu(0);
1036 smpboot_clear_io_apic_irqs();
1038 if (smp_found_config)
1039 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1041 physid_set_mask_of_physid(0, &phys_cpu_present_map);
1042 map_cpu_to_logical_apicid();
1043 cpu_set(0, per_cpu(cpu_sibling_map, 0));
1044 cpu_set(0, per_cpu(cpu_core_map, 0));
1048 * Various sanity checks.
1050 static int __init smp_sanity_check(unsigned max_cpus)
1054 #if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32)
1055 if (def_to_bigsmp && nr_cpu_ids > 8) {
1060 "More than 8 CPUs detected - skipping them.\n"
1061 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
1064 for_each_present_cpu(cpu) {
1066 cpu_clear(cpu, cpu_present_map);
1071 for_each_possible_cpu(cpu) {
1073 cpu_clear(cpu, cpu_possible_map);
1081 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1082 printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
1083 "by the BIOS.\n", hard_smp_processor_id());
1084 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1088 * If we couldn't find an SMP configuration at boot time,
1089 * get out of here now!
1091 if (!smp_found_config && !acpi_lapic) {
1093 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1095 if (APIC_init_uniprocessor())
1096 printk(KERN_NOTICE "Local APIC not detected."
1097 " Using dummy APIC emulation.\n");
1102 * Should not be necessary because the MP table should list the boot
1103 * CPU too, but we do it for the sake of robustness anyway.
1105 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
1107 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1108 boot_cpu_physical_apicid);
1109 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1114 * If we couldn't find a local APIC, then get out of here now!
1116 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1118 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1119 boot_cpu_physical_apicid);
1120 printk(KERN_ERR "... forcing use of dummy APIC emulation."
1121 "(tell your hw vendor)\n");
1122 smpboot_clear_io_apic();
1126 verify_local_APIC();
1129 * If SMP should be disabled, then really disable it!
1132 printk(KERN_INFO "SMP mode deactivated.\n");
1133 smpboot_clear_io_apic();
1135 localise_nmi_watchdog();
1139 end_local_APIC_setup();
1146 static void __init smp_cpu_index_default(void)
1149 struct cpuinfo_x86 *c;
1151 for_each_possible_cpu(i) {
1153 /* mark all to hotplug */
1154 c->cpu_index = NR_CPUS;
1159 * Prepare for SMP bootup. The MP table or ACPI has been read
1160 * earlier. Just do some sanity checking here and enable APIC mode.
1162 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1165 smp_cpu_index_default();
1166 current_cpu_data = boot_cpu_data;
1167 cpu_callin_map = cpumask_of_cpu(0);
1170 * Setup boot CPU information
1172 smp_store_cpu_info(0); /* Final full version of the data */
1173 #ifdef CONFIG_X86_32
1174 boot_cpu_logical_apicid = logical_smp_processor_id();
1176 current_thread_info()->cpu = 0; /* needed? */
1177 set_cpu_sibling_map(0);
1179 #ifdef CONFIG_X86_64
1181 setup_apic_routing();
1184 if (smp_sanity_check(max_cpus) < 0) {
1185 printk(KERN_INFO "SMP disabled\n");
1191 if (read_apic_id() != boot_cpu_physical_apicid) {
1192 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1193 read_apic_id(), boot_cpu_physical_apicid);
1194 /* Or can we switch back to PIC here? */
1201 * Switch from PIC to APIC mode.
1205 #ifdef CONFIG_X86_64
1207 * Enable IO APIC before setting up error vector
1209 if (!skip_ioapic_setup && nr_ioapics)
1212 end_local_APIC_setup();
1214 map_cpu_to_logical_apicid();
1216 setup_portio_remap();
1218 smpboot_setup_io_apic();
1220 * Set up local APIC timer on boot CPU.
1223 printk(KERN_INFO "CPU%d: ", 0);
1224 print_cpu_info(&cpu_data(0));
1233 * Early setup to make printk work.
1235 void __init native_smp_prepare_boot_cpu(void)
1237 int me = smp_processor_id();
1238 #ifdef CONFIG_X86_32
1241 switch_to_new_gdt();
1242 /* already set me in cpu_online_map in boot_cpu_init() */
1243 cpu_set(me, cpu_callout_map);
1244 per_cpu(cpu_state, me) = CPU_ONLINE;
1247 void __init native_smp_cpus_done(unsigned int max_cpus)
1249 pr_debug("Boot done.\n");
1253 #ifdef CONFIG_X86_IO_APIC
1254 setup_ioapic_dest();
1256 check_nmi_watchdog();
1259 #ifdef CONFIG_HOTPLUG_CPU
1261 static void remove_siblinginfo(int cpu)
1264 struct cpuinfo_x86 *c = &cpu_data(cpu);
1266 for_each_cpu_mask_nr(sibling, per_cpu(cpu_core_map, cpu)) {
1267 cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
1269 * last thread sibling in this cpu core going down
1271 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
1272 cpu_data(sibling).booted_cores--;
1275 for_each_cpu_mask_nr(sibling, per_cpu(cpu_sibling_map, cpu))
1276 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
1277 cpus_clear(per_cpu(cpu_sibling_map, cpu));
1278 cpus_clear(per_cpu(cpu_core_map, cpu));
1279 c->phys_proc_id = 0;
1281 cpu_clear(cpu, cpu_sibling_setup_map);
1284 static int additional_cpus __initdata = -1;
1286 static __init int setup_additional_cpus(char *s)
1288 return s && get_option(&s, &additional_cpus) ? 0 : -EINVAL;
1290 early_param("additional_cpus", setup_additional_cpus);
1293 * cpu_possible_map should be static, it cannot change as cpu's
1294 * are onlined, or offlined. The reason is per-cpu data-structures
1295 * are allocated by some modules at init time, and dont expect to
1296 * do this dynamically on cpu arrival/departure.
1297 * cpu_present_map on the other hand can change dynamically.
1298 * In case when cpu_hotplug is not compiled, then we resort to current
1299 * behaviour, which is cpu_possible == cpu_present.
1302 * Three ways to find out the number of additional hotplug CPUs:
1303 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1304 * - The user can overwrite it with additional_cpus=NUM
1305 * - Otherwise don't reserve additional CPUs.
1306 * We do this because additional CPUs waste a lot of memory.
1309 __init void prefill_possible_map(void)
1314 /* no processor from mptable or madt */
1315 if (!num_processors)
1318 if (additional_cpus == -1) {
1319 if (disabled_cpus > 0)
1320 additional_cpus = disabled_cpus;
1322 additional_cpus = 0;
1325 possible = num_processors + additional_cpus;
1326 if (possible > NR_CPUS)
1329 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1330 possible, max_t(int, possible - num_processors, 0));
1332 for (i = 0; i < possible; i++)
1333 cpu_set(i, cpu_possible_map);
1335 nr_cpu_ids = possible;
1338 static void __ref remove_cpu_from_maps(int cpu)
1340 cpu_clear(cpu, cpu_online_map);
1341 cpu_clear(cpu, cpu_callout_map);
1342 cpu_clear(cpu, cpu_callin_map);
1343 /* was set by cpu_init() */
1344 cpu_clear(cpu, cpu_initialized);
1345 numa_remove_cpu(cpu);
1348 void cpu_disable_common(void)
1350 int cpu = smp_processor_id();
1353 * Allow any queued timer interrupts to get serviced
1354 * This is only a temporary solution until we cleanup
1355 * fixup_irqs as we do for IA64.
1360 local_irq_disable();
1361 remove_siblinginfo(cpu);
1363 /* It's now safe to remove this processor from the online map */
1365 remove_cpu_from_maps(cpu);
1366 unlock_vector_lock();
1367 fixup_irqs(cpu_online_map);
1370 int native_cpu_disable(void)
1372 int cpu = smp_processor_id();
1375 * Perhaps use cpufreq to drop frequency, but that could go
1376 * into generic code.
1378 * We won't take down the boot processor on i386 due to some
1379 * interrupts only being able to be serviced by the BSP.
1380 * Especially so if we're not using an IOAPIC -zwane
1385 if (nmi_watchdog == NMI_LOCAL_APIC)
1386 stop_apic_nmi_watchdog(NULL);
1389 cpu_disable_common();
1393 void native_cpu_die(unsigned int cpu)
1395 /* We don't do anything here: idle task is faking death itself. */
1398 for (i = 0; i < 10; i++) {
1399 /* They ack this in play_dead by setting CPU_DEAD */
1400 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1401 printk(KERN_INFO "CPU %d is now offline\n", cpu);
1402 if (1 == num_online_cpus())
1403 alternatives_smp_switch(0);
1408 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1411 void play_dead_common(void)
1414 reset_lazy_tlbstate();
1415 irq_ctx_exit(raw_smp_processor_id());
1416 c1e_remove_cpu(raw_smp_processor_id());
1420 __get_cpu_var(cpu_state) = CPU_DEAD;
1423 * With physical CPU hotplug, we should halt the cpu
1425 local_irq_disable();
1428 void native_play_dead(void)
1434 #else /* ... !CONFIG_HOTPLUG_CPU */
1435 int native_cpu_disable(void)
1440 void native_cpu_die(unsigned int cpu)
1442 /* We said "no" in __cpu_disable */
1446 void native_play_dead(void)