2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
56 #include <asm/trampoline.h>
59 #include <asm/pgtable.h>
60 #include <asm/tlbflush.h>
64 #include <asm/setup.h>
65 #include <asm/uv/uv.h>
66 #include <linux/mc146818rtc.h>
68 #include <asm/smpboot_hooks.h>
71 u8 apicid_2_node[MAX_APICID];
72 static int low_mappings;
75 /* State of each CPU */
76 DEFINE_PER_CPU(int, cpu_state) = { 0 };
78 /* Store all idle threads, this can be reused instead of creating
79 * a new thread. Also avoids complicated thread destroy functionality
82 #ifdef CONFIG_HOTPLUG_CPU
84 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
85 * removed after init for !CONFIG_HOTPLUG_CPU.
87 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
88 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
89 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
91 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
92 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
93 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
96 /* Number of siblings per CPU package */
97 int smp_num_siblings = 1;
98 EXPORT_SYMBOL(smp_num_siblings);
100 /* Last level cache ID of each logical CPU */
101 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
103 /* representing HT siblings of each logical CPU */
104 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
105 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
107 /* representing HT and core siblings of each logical CPU */
108 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
109 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
111 /* Per CPU bogomips and other parameters */
112 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
113 EXPORT_PER_CPU_SYMBOL(cpu_info);
115 atomic_t init_deasserted;
117 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
119 /* which logical CPUs are on which nodes */
120 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
121 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
122 EXPORT_SYMBOL(node_to_cpumask_map);
123 /* which node each logical CPU is on */
124 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
125 EXPORT_SYMBOL(cpu_to_node_map);
127 /* set up a mapping between cpu and node. */
128 static void map_cpu_to_node(int cpu, int node)
130 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
131 cpumask_set_cpu(cpu, &node_to_cpumask_map[node]);
132 cpu_to_node_map[cpu] = node;
135 /* undo a mapping between cpu and node. */
136 static void unmap_cpu_to_node(int cpu)
140 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
141 for (node = 0; node < MAX_NUMNODES; node++)
142 cpumask_clear_cpu(cpu, &node_to_cpumask_map[node]);
143 cpu_to_node_map[cpu] = 0;
145 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
146 #define map_cpu_to_node(cpu, node) ({})
147 #define unmap_cpu_to_node(cpu) ({})
151 static int boot_cpu_logical_apicid;
153 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
154 { [0 ... NR_CPUS-1] = BAD_APICID };
156 static void map_cpu_to_logical_apicid(void)
158 int cpu = smp_processor_id();
159 int apicid = logical_smp_processor_id();
160 int node = apic->apicid_to_node(apicid);
162 if (!node_online(node))
163 node = first_online_node;
165 cpu_2_logical_apicid[cpu] = apicid;
166 map_cpu_to_node(cpu, node);
169 void numa_remove_cpu(int cpu)
171 cpu_2_logical_apicid[cpu] = BAD_APICID;
172 unmap_cpu_to_node(cpu);
175 #define map_cpu_to_logical_apicid() do {} while (0)
179 * Report back to the Boot Processor.
182 static void __cpuinit smp_callin(void)
185 unsigned long timeout;
188 * If waken up by an INIT in an 82489DX configuration
189 * we may get here before an INIT-deassert IPI reaches
190 * our local APIC. We have to wait for the IPI or we'll
191 * lock up on an APIC access.
193 if (apic->wait_for_init_deassert)
194 apic->wait_for_init_deassert(&init_deasserted);
197 * (This works even if the APIC is not enabled.)
199 phys_id = read_apic_id();
200 cpuid = smp_processor_id();
201 if (cpumask_test_cpu(cpuid, cpu_callin_mask)) {
202 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
205 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
208 * STARTUP IPIs are fragile beasts as they might sometimes
209 * trigger some glue motherboard logic. Complete APIC bus
210 * silence for 1 second, this overestimates the time the
211 * boot CPU is spending to send the up to 2 STARTUP IPIs
212 * by a factor of two. This should be enough.
216 * Waiting 2s total for startup (udelay is not yet working)
218 timeout = jiffies + 2*HZ;
219 while (time_before(jiffies, timeout)) {
221 * Has the boot CPU finished it's STARTUP sequence?
223 if (cpumask_test_cpu(cpuid, cpu_callout_mask))
228 if (!time_before(jiffies, timeout)) {
229 panic("%s: CPU%d started up but did not get a callout!\n",
234 * the boot CPU has finished the init stage and is spinning
235 * on callin_map until we finish. We are free to set up this
236 * CPU, first the APIC. (this is probably redundant on most
240 pr_debug("CALLIN, before setup_local_APIC().\n");
241 if (apic->smp_callin_clear_local_apic)
242 apic->smp_callin_clear_local_apic();
244 end_local_APIC_setup();
245 map_cpu_to_logical_apicid();
247 notify_cpu_starting(cpuid);
251 * Need to enable IRQs because it can take longer and then
252 * the NMI watchdog might kill us.
257 pr_debug("Stack at about %p\n", &cpuid);
260 * Save our processor parameters
262 smp_store_cpu_info(cpuid);
265 * Allow the master to continue.
267 cpumask_set_cpu(cpuid, cpu_callin_mask);
271 * Activate a secondary processor.
273 notrace static void __cpuinit start_secondary(void *unused)
276 * Don't put *anything* before cpu_init(), SMP booting is too
277 * fragile that we want to limit the things done here to the
278 * most necessary things.
285 /* otherwise gcc will move up smp_processor_id before the cpu_init */
288 * Check TSC synchronization with the BP:
290 check_tsc_sync_target();
292 if (nmi_watchdog == NMI_IO_APIC) {
293 disable_8259A_irq(0);
294 enable_NMI_through_LVT0();
304 /* This must be done before setting cpu_online_map */
305 set_cpu_sibling_map(raw_smp_processor_id());
309 * We need to hold call_lock, so there is no inconsistency
310 * between the time smp_call_function() determines number of
311 * IPI recipients, and the time when the determination is made
312 * for which cpus receive the IPI. Holding this
313 * lock helps us to not include this cpu in a currently in progress
314 * smp_call_function().
316 * We need to hold vector_lock so there the set of online cpus
317 * does not change while we are assigning vectors to cpus. Holding
318 * this lock ensures we don't half assign or remove an irq from a cpu.
322 __setup_vector_irq(smp_processor_id());
323 set_cpu_online(smp_processor_id(), true);
324 unlock_vector_lock();
326 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
328 /* enable local interrupts */
331 setup_secondary_clock();
338 * The bootstrap kernel entry code has set these up. Save them for
342 void __cpuinit smp_store_cpu_info(int id)
344 struct cpuinfo_x86 *c = &cpu_data(id);
349 identify_secondary_cpu(c);
353 void __cpuinit set_cpu_sibling_map(int cpu)
356 struct cpuinfo_x86 *c = &cpu_data(cpu);
358 cpumask_set_cpu(cpu, cpu_sibling_setup_mask);
360 if (smp_num_siblings > 1) {
361 for_each_cpu(i, cpu_sibling_setup_mask) {
362 struct cpuinfo_x86 *o = &cpu_data(i);
364 if (c->phys_proc_id == o->phys_proc_id &&
365 c->cpu_core_id == o->cpu_core_id) {
366 cpumask_set_cpu(i, cpu_sibling_mask(cpu));
367 cpumask_set_cpu(cpu, cpu_sibling_mask(i));
368 cpumask_set_cpu(i, cpu_core_mask(cpu));
369 cpumask_set_cpu(cpu, cpu_core_mask(i));
370 cpumask_set_cpu(i, &c->llc_shared_map);
371 cpumask_set_cpu(cpu, &o->llc_shared_map);
375 cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
378 cpumask_set_cpu(cpu, &c->llc_shared_map);
380 if (current_cpu_data.x86_max_cores == 1) {
381 cpumask_copy(cpu_core_mask(cpu), cpu_sibling_mask(cpu));
386 for_each_cpu(i, cpu_sibling_setup_mask) {
387 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
388 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
389 cpumask_set_cpu(i, &c->llc_shared_map);
390 cpumask_set_cpu(cpu, &cpu_data(i).llc_shared_map);
392 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
393 cpumask_set_cpu(i, cpu_core_mask(cpu));
394 cpumask_set_cpu(cpu, cpu_core_mask(i));
396 * Does this new cpu bringup a new core?
398 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1) {
400 * for each core in package, increment
401 * the booted_cores for this new cpu
403 if (cpumask_first(cpu_sibling_mask(i)) == i)
406 * increment the core count for all
407 * the other cpus in this package
410 cpu_data(i).booted_cores++;
411 } else if (i != cpu && !c->booted_cores)
412 c->booted_cores = cpu_data(i).booted_cores;
417 /* maps the cpu to the sched domain representing multi-core */
418 const struct cpumask *cpu_coregroup_mask(int cpu)
420 struct cpuinfo_x86 *c = &cpu_data(cpu);
422 * For perf, we return last level cache shared map.
423 * And for power savings, we return cpu_core_map
425 if (sched_mc_power_savings || sched_smt_power_savings)
426 return cpu_core_mask(cpu);
428 return &c->llc_shared_map;
431 static void impress_friends(void)
434 unsigned long bogosum = 0;
436 * Allow the user to impress friends.
438 pr_debug("Before bogomips.\n");
439 for_each_possible_cpu(cpu)
440 if (cpumask_test_cpu(cpu, cpu_callout_mask))
441 bogosum += cpu_data(cpu).loops_per_jiffy;
443 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
446 (bogosum/(5000/HZ))%100);
448 pr_debug("Before bogocount - setting activated=1.\n");
451 void __inquire_remote_apic(int apicid)
453 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
454 char *names[] = { "ID", "VERSION", "SPIV" };
458 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid);
460 for (i = 0; i < ARRAY_SIZE(regs); i++) {
461 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]);
466 status = safe_apic_wait_icr_idle();
469 "a previous APIC delivery may have failed\n");
471 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
476 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
477 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
480 case APIC_ICR_RR_VALID:
481 status = apic_read(APIC_RRR);
482 printk(KERN_CONT "%08x\n", status);
485 printk(KERN_CONT "failed\n");
491 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
492 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
493 * won't ... remember to clear down the APIC, etc later.
496 wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
498 unsigned long send_status, accept_status = 0;
502 /* Boot on the stack */
503 /* Kick the second */
504 apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid);
506 pr_debug("Waiting for send to finish...\n");
507 send_status = safe_apic_wait_icr_idle();
510 * Give the other CPU some time to accept the IPI.
513 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
514 maxlvt = lapic_get_maxlvt();
515 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
516 apic_write(APIC_ESR, 0);
517 accept_status = (apic_read(APIC_ESR) & 0xEF);
519 pr_debug("NMI sent.\n");
522 printk(KERN_ERR "APIC never delivered???\n");
524 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
526 return (send_status | accept_status);
530 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
532 unsigned long send_status, accept_status = 0;
533 int maxlvt, num_starts, j;
535 maxlvt = lapic_get_maxlvt();
538 * Be paranoid about clearing APIC errors.
540 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
541 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
542 apic_write(APIC_ESR, 0);
546 pr_debug("Asserting INIT.\n");
549 * Turn INIT on target chip
554 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
557 pr_debug("Waiting for send to finish...\n");
558 send_status = safe_apic_wait_icr_idle();
562 pr_debug("Deasserting INIT.\n");
566 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
568 pr_debug("Waiting for send to finish...\n");
569 send_status = safe_apic_wait_icr_idle();
572 atomic_set(&init_deasserted, 1);
575 * Should we send STARTUP IPIs ?
577 * Determine this based on the APIC version.
578 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
580 if (APIC_INTEGRATED(apic_version[phys_apicid]))
586 * Paravirt / VMI wants a startup IPI hook here to set up the
587 * target processor state.
589 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
590 (unsigned long)stack_start.sp);
593 * Run STARTUP IPI loop.
595 pr_debug("#startup loops: %d.\n", num_starts);
597 for (j = 1; j <= num_starts; j++) {
598 pr_debug("Sending STARTUP #%d.\n", j);
599 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
600 apic_write(APIC_ESR, 0);
602 pr_debug("After apic_write.\n");
609 /* Boot on the stack */
610 /* Kick the second */
611 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
615 * Give the other CPU some time to accept the IPI.
619 pr_debug("Startup point 1.\n");
621 pr_debug("Waiting for send to finish...\n");
622 send_status = safe_apic_wait_icr_idle();
625 * Give the other CPU some time to accept the IPI.
628 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
629 apic_write(APIC_ESR, 0);
630 accept_status = (apic_read(APIC_ESR) & 0xEF);
631 if (send_status || accept_status)
634 pr_debug("After Startup.\n");
637 printk(KERN_ERR "APIC never delivered???\n");
639 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
641 return (send_status | accept_status);
645 struct work_struct work;
646 struct task_struct *idle;
647 struct completion done;
651 static void __cpuinit do_fork_idle(struct work_struct *work)
653 struct create_idle *c_idle =
654 container_of(work, struct create_idle, work);
656 c_idle->idle = fork_idle(c_idle->cpu);
657 complete(&c_idle->done);
661 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
662 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
663 * Returns zero if CPU booted OK, else error code from
664 * ->wakeup_secondary_cpu.
666 static int __cpuinit do_boot_cpu(int apicid, int cpu)
668 unsigned long boot_error = 0;
669 unsigned long start_ip;
671 struct create_idle c_idle = {
673 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
676 INIT_WORK(&c_idle.work, do_fork_idle);
678 alternatives_smp_switch(1);
680 c_idle.idle = get_idle_for_cpu(cpu);
683 * We can't use kernel_thread since we must avoid to
684 * reschedule the child.
687 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
688 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
689 init_idle(c_idle.idle, cpu);
693 if (!keventd_up() || current_is_keventd())
694 c_idle.work.func(&c_idle.work);
696 schedule_work(&c_idle.work);
697 wait_for_completion(&c_idle.done);
700 if (IS_ERR(c_idle.idle)) {
701 printk("failed fork for CPU %d\n", cpu);
702 return PTR_ERR(c_idle.idle);
705 set_idle_for_cpu(cpu, c_idle.idle);
707 per_cpu(current_task, cpu) = c_idle.idle;
709 /* Stack for startup_32 can be just as for start_secondary onwards */
712 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
713 initial_gs = per_cpu_offset(cpu);
714 per_cpu(kernel_stack, cpu) =
715 (unsigned long)task_stack_page(c_idle.idle) -
716 KERNEL_STACK_OFFSET + THREAD_SIZE;
718 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
719 initial_code = (unsigned long)start_secondary;
720 stack_start.sp = (void *) c_idle.idle->thread.sp;
722 /* start_ip had better be page-aligned! */
723 start_ip = setup_trampoline();
725 /* So we see what's up */
726 printk(KERN_INFO "Booting processor %d APIC 0x%x ip 0x%lx\n",
727 cpu, apicid, start_ip);
730 * This grunge runs the startup process for
731 * the targeted processor.
734 atomic_set(&init_deasserted, 0);
736 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
738 pr_debug("Setting warm reset code and vector.\n");
740 smpboot_setup_warm_reset_vector(start_ip);
742 * Be paranoid about clearing APIC errors.
744 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
745 apic_write(APIC_ESR, 0);
751 * Kick the secondary CPU. Use the method in the APIC driver
752 * if it's defined - or use an INIT boot APIC message otherwise:
754 if (apic->wakeup_secondary_cpu)
755 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
757 boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip);
761 * allow APs to start initializing.
763 pr_debug("Before Callout %d.\n", cpu);
764 cpumask_set_cpu(cpu, cpu_callout_mask);
765 pr_debug("After Callout %d.\n", cpu);
768 * Wait 5s total for a response
770 for (timeout = 0; timeout < 50000; timeout++) {
771 if (cpumask_test_cpu(cpu, cpu_callin_mask))
772 break; /* It has booted */
776 if (cpumask_test_cpu(cpu, cpu_callin_mask)) {
777 /* number CPUs logically, starting from 1 (BSP is 0) */
779 printk(KERN_INFO "CPU%d: ", cpu);
780 print_cpu_info(&cpu_data(cpu));
781 pr_debug("CPU has booted.\n");
784 if (*((volatile unsigned char *)trampoline_base)
786 /* trampoline started but...? */
787 printk(KERN_ERR "Stuck ??\n");
789 /* trampoline code not run */
790 printk(KERN_ERR "Not responding.\n");
791 if (apic->inquire_remote_apic)
792 apic->inquire_remote_apic(apicid);
797 /* Try to put things back the way they were before ... */
798 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
800 /* was set by do_boot_cpu() */
801 cpumask_clear_cpu(cpu, cpu_callout_mask);
803 /* was set by cpu_init() */
804 cpumask_clear_cpu(cpu, cpu_initialized_mask);
806 set_cpu_present(cpu, false);
807 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
810 /* mark "stuck" area as not stuck */
811 *((volatile unsigned long *)trampoline_base) = 0;
814 * Cleanup possible dangling ends...
816 smpboot_restore_warm_reset_vector();
821 int __cpuinit native_cpu_up(unsigned int cpu)
823 int apicid = apic->cpu_present_to_apicid(cpu);
827 WARN_ON(irqs_disabled());
829 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
831 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
832 !physid_isset(apicid, phys_cpu_present_map)) {
833 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
838 * Already booted CPU?
840 if (cpumask_test_cpu(cpu, cpu_callin_mask)) {
841 pr_debug("do_boot_cpu %d Already started\n", cpu);
846 * Save current MTRR state in case it was changed since early boot
847 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
851 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
854 /* init low mem mapping */
855 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
856 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
860 err = do_boot_cpu(apicid, cpu);
865 err = do_boot_cpu(apicid, cpu);
868 pr_debug("do_boot_cpu failed %d\n", err);
873 * Check TSC synchronization with the AP (keep irqs disabled
876 local_irq_save(flags);
877 check_tsc_sync_source(cpu);
878 local_irq_restore(flags);
880 while (!cpu_online(cpu)) {
882 touch_nmi_watchdog();
889 * Fall back to non SMP mode after errors.
891 * RED-PEN audit/test this more. I bet there is more state messed up here.
893 static __init void disable_smp(void)
895 /* use the read/write pointers to the present and possible maps */
896 cpumask_copy(&cpu_present_map, cpumask_of(0));
897 cpumask_copy(&cpu_possible_map, cpumask_of(0));
898 smpboot_clear_io_apic_irqs();
900 if (smp_found_config)
901 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
903 physid_set_mask_of_physid(0, &phys_cpu_present_map);
904 map_cpu_to_logical_apicid();
905 cpumask_set_cpu(0, cpu_sibling_mask(0));
906 cpumask_set_cpu(0, cpu_core_mask(0));
910 * Various sanity checks.
912 static int __init smp_sanity_check(unsigned max_cpus)
916 #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
917 if (def_to_bigsmp && nr_cpu_ids > 8) {
922 "More than 8 CPUs detected - skipping them.\n"
923 "Use CONFIG_X86_BIGSMP.\n");
926 for_each_present_cpu(cpu) {
928 set_cpu_present(cpu, false);
933 for_each_possible_cpu(cpu) {
935 set_cpu_possible(cpu, false);
943 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
945 "weird, boot CPU (#%d) not listed by the BIOS.\n",
946 hard_smp_processor_id());
948 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
952 * If we couldn't find an SMP configuration at boot time,
953 * get out of here now!
955 if (!smp_found_config && !acpi_lapic) {
957 printk(KERN_NOTICE "SMP motherboard not detected.\n");
959 if (APIC_init_uniprocessor())
960 printk(KERN_NOTICE "Local APIC not detected."
961 " Using dummy APIC emulation.\n");
966 * Should not be necessary because the MP table should list the boot
967 * CPU too, but we do it for the sake of robustness anyway.
969 if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
971 "weird, boot CPU (#%d) not listed by the BIOS.\n",
972 boot_cpu_physical_apicid);
973 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
978 * If we couldn't find a local APIC, then get out of here now!
980 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
982 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
983 boot_cpu_physical_apicid);
984 printk(KERN_ERR "... forcing use of dummy APIC emulation."
985 "(tell your hw vendor)\n");
986 smpboot_clear_io_apic();
987 arch_disable_smp_support();
994 * If SMP should be disabled, then really disable it!
997 printk(KERN_INFO "SMP mode deactivated.\n");
998 smpboot_clear_io_apic();
1000 localise_nmi_watchdog();
1004 end_local_APIC_setup();
1011 static void __init smp_cpu_index_default(void)
1014 struct cpuinfo_x86 *c;
1016 for_each_possible_cpu(i) {
1018 /* mark all to hotplug */
1019 c->cpu_index = nr_cpu_ids;
1024 * Prepare for SMP bootup. The MP table or ACPI has been read
1025 * earlier. Just do some sanity checking here and enable APIC mode.
1027 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1030 smp_cpu_index_default();
1031 current_cpu_data = boot_cpu_data;
1032 cpumask_copy(cpu_callin_mask, cpumask_of(0));
1035 * Setup boot CPU information
1037 smp_store_cpu_info(0); /* Final full version of the data */
1038 #ifdef CONFIG_X86_32
1039 boot_cpu_logical_apicid = logical_smp_processor_id();
1041 current_thread_info()->cpu = 0; /* needed? */
1042 set_cpu_sibling_map(0);
1045 #ifdef CONFIG_X86_64
1046 default_setup_apic_routing();
1049 if (smp_sanity_check(max_cpus) < 0) {
1050 printk(KERN_INFO "SMP disabled\n");
1056 if (read_apic_id() != boot_cpu_physical_apicid) {
1057 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1058 read_apic_id(), boot_cpu_physical_apicid);
1059 /* Or can we switch back to PIC here? */
1066 * Switch from PIC to APIC mode.
1071 * Enable IO APIC before setting up error vector
1073 if (!skip_ioapic_setup && nr_ioapics)
1076 end_local_APIC_setup();
1078 map_cpu_to_logical_apicid();
1080 if (apic->setup_portio_remap)
1081 apic->setup_portio_remap();
1083 smpboot_setup_io_apic();
1085 * Set up local APIC timer on boot CPU.
1088 printk(KERN_INFO "CPU%d: ", 0);
1089 print_cpu_info(&cpu_data(0));
1098 * Early setup to make printk work.
1100 void __init native_smp_prepare_boot_cpu(void)
1102 int me = smp_processor_id();
1103 switch_to_new_gdt(me);
1104 /* already set me in cpu_online_mask in boot_cpu_init() */
1105 cpumask_set_cpu(me, cpu_callout_mask);
1106 per_cpu(cpu_state, me) = CPU_ONLINE;
1109 void __init native_smp_cpus_done(unsigned int max_cpus)
1111 pr_debug("Boot done.\n");
1114 #ifdef CONFIG_X86_IO_APIC
1115 setup_ioapic_dest();
1117 check_nmi_watchdog();
1120 static int __initdata setup_possible_cpus = -1;
1121 static int __init _setup_possible_cpus(char *str)
1123 get_option(&str, &setup_possible_cpus);
1126 early_param("possible_cpus", _setup_possible_cpus);
1130 * cpu_possible_map should be static, it cannot change as cpu's
1131 * are onlined, or offlined. The reason is per-cpu data-structures
1132 * are allocated by some modules at init time, and dont expect to
1133 * do this dynamically on cpu arrival/departure.
1134 * cpu_present_map on the other hand can change dynamically.
1135 * In case when cpu_hotplug is not compiled, then we resort to current
1136 * behaviour, which is cpu_possible == cpu_present.
1139 * Three ways to find out the number of additional hotplug CPUs:
1140 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1141 * - The user can overwrite it with possible_cpus=NUM
1142 * - Otherwise don't reserve additional CPUs.
1143 * We do this because additional CPUs waste a lot of memory.
1146 __init void prefill_possible_map(void)
1150 /* no processor from mptable or madt */
1151 if (!num_processors)
1154 if (setup_possible_cpus == -1)
1155 possible = num_processors + disabled_cpus;
1157 possible = setup_possible_cpus;
1159 total_cpus = max_t(int, possible, num_processors + disabled_cpus);
1161 if (possible > CONFIG_NR_CPUS) {
1163 "%d Processors exceeds NR_CPUS limit of %d\n",
1164 possible, CONFIG_NR_CPUS);
1165 possible = CONFIG_NR_CPUS;
1168 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1169 possible, max_t(int, possible - num_processors, 0));
1171 for (i = 0; i < possible; i++)
1172 set_cpu_possible(i, true);
1174 nr_cpu_ids = possible;
1177 #ifdef CONFIG_HOTPLUG_CPU
1179 static void remove_siblinginfo(int cpu)
1182 struct cpuinfo_x86 *c = &cpu_data(cpu);
1184 for_each_cpu(sibling, cpu_core_mask(cpu)) {
1185 cpumask_clear_cpu(cpu, cpu_core_mask(sibling));
1187 * last thread sibling in this cpu core going down
1189 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1)
1190 cpu_data(sibling).booted_cores--;
1193 for_each_cpu(sibling, cpu_sibling_mask(cpu))
1194 cpumask_clear_cpu(cpu, cpu_sibling_mask(sibling));
1195 cpumask_clear(cpu_sibling_mask(cpu));
1196 cpumask_clear(cpu_core_mask(cpu));
1197 c->phys_proc_id = 0;
1199 cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
1202 static void __ref remove_cpu_from_maps(int cpu)
1204 set_cpu_online(cpu, false);
1205 cpumask_clear_cpu(cpu, cpu_callout_mask);
1206 cpumask_clear_cpu(cpu, cpu_callin_mask);
1207 /* was set by cpu_init() */
1208 cpumask_clear_cpu(cpu, cpu_initialized_mask);
1209 numa_remove_cpu(cpu);
1212 void cpu_disable_common(void)
1214 int cpu = smp_processor_id();
1217 * Allow any queued timer interrupts to get serviced
1218 * This is only a temporary solution until we cleanup
1219 * fixup_irqs as we do for IA64.
1224 local_irq_disable();
1225 remove_siblinginfo(cpu);
1227 /* It's now safe to remove this processor from the online map */
1229 remove_cpu_from_maps(cpu);
1230 unlock_vector_lock();
1234 int native_cpu_disable(void)
1236 int cpu = smp_processor_id();
1239 * Perhaps use cpufreq to drop frequency, but that could go
1240 * into generic code.
1242 * We won't take down the boot processor on i386 due to some
1243 * interrupts only being able to be serviced by the BSP.
1244 * Especially so if we're not using an IOAPIC -zwane
1249 if (nmi_watchdog == NMI_LOCAL_APIC)
1250 stop_apic_nmi_watchdog(NULL);
1253 cpu_disable_common();
1257 void native_cpu_die(unsigned int cpu)
1259 /* We don't do anything here: idle task is faking death itself. */
1262 for (i = 0; i < 10; i++) {
1263 /* They ack this in play_dead by setting CPU_DEAD */
1264 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1265 printk(KERN_INFO "CPU %d is now offline\n", cpu);
1266 if (1 == num_online_cpus())
1267 alternatives_smp_switch(0);
1272 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1275 void play_dead_common(void)
1278 reset_lazy_tlbstate();
1279 irq_ctx_exit(raw_smp_processor_id());
1280 c1e_remove_cpu(raw_smp_processor_id());
1284 __get_cpu_var(cpu_state) = CPU_DEAD;
1287 * With physical CPU hotplug, we should halt the cpu
1289 local_irq_disable();
1292 void native_play_dead(void)
1298 #else /* ... !CONFIG_HOTPLUG_CPU */
1299 int native_cpu_disable(void)
1304 void native_cpu_die(unsigned int cpu)
1306 /* We said "no" in __cpu_disable */
1310 void native_play_dead(void)