2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
56 #include <asm/trampoline.h>
59 #include <asm/pgtable.h>
60 #include <asm/tlbflush.h>
63 #include <asm/genapic.h>
64 #include <linux/mc146818rtc.h>
66 #include <mach_apic.h>
67 #include <mach_wakecpu.h>
68 #include <smpboot_hooks.h>
71 u8 apicid_2_node[MAX_APICID];
72 static int low_mappings;
75 /* State of each CPU */
76 DEFINE_PER_CPU(int, cpu_state) = { 0 };
78 /* Store all idle threads, this can be reused instead of creating
79 * a new thread. Also avoids complicated thread destroy functionality
82 #ifdef CONFIG_HOTPLUG_CPU
84 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
85 * removed after init for !CONFIG_HOTPLUG_CPU.
87 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
88 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
89 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
91 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
92 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
93 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
96 /* Number of siblings per CPU package */
97 int smp_num_siblings = 1;
98 EXPORT_SYMBOL(smp_num_siblings);
100 /* Last level cache ID of each logical CPU */
101 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
103 /* bitmap of online cpus */
104 cpumask_t cpu_online_map __read_mostly;
105 EXPORT_SYMBOL(cpu_online_map);
107 cpumask_t cpu_callin_map;
108 cpumask_t cpu_callout_map;
109 cpumask_t cpu_possible_map;
110 EXPORT_SYMBOL(cpu_possible_map);
112 /* representing HT siblings of each logical CPU */
113 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
114 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
116 /* representing HT and core siblings of each logical CPU */
117 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
118 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
120 /* Per CPU bogomips and other parameters */
121 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
122 EXPORT_PER_CPU_SYMBOL(cpu_info);
124 static atomic_t init_deasserted;
126 static int boot_cpu_logical_apicid;
128 /* representing cpus for which sibling maps can be computed */
129 static cpumask_t cpu_sibling_setup_map;
131 /* Set if we find a B stepping CPU */
132 int __cpuinitdata smp_b_stepping;
134 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
136 /* which logical CPUs are on which nodes */
137 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
138 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
139 EXPORT_SYMBOL(node_to_cpumask_map);
140 /* which node each logical CPU is on */
141 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
142 EXPORT_SYMBOL(cpu_to_node_map);
144 /* set up a mapping between cpu and node. */
145 static void map_cpu_to_node(int cpu, int node)
147 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
148 cpu_set(cpu, node_to_cpumask_map[node]);
149 cpu_to_node_map[cpu] = node;
152 /* undo a mapping between cpu and node. */
153 static void unmap_cpu_to_node(int cpu)
157 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
158 for (node = 0; node < MAX_NUMNODES; node++)
159 cpu_clear(cpu, node_to_cpumask_map[node]);
160 cpu_to_node_map[cpu] = 0;
162 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
163 #define map_cpu_to_node(cpu, node) ({})
164 #define unmap_cpu_to_node(cpu) ({})
168 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
169 { [0 ... NR_CPUS-1] = BAD_APICID };
171 static void map_cpu_to_logical_apicid(void)
173 int cpu = smp_processor_id();
174 int apicid = logical_smp_processor_id();
175 int node = apicid_to_node(apicid);
177 if (!node_online(node))
178 node = first_online_node;
180 cpu_2_logical_apicid[cpu] = apicid;
181 map_cpu_to_node(cpu, node);
184 static void unmap_cpu_to_logical_apicid(int cpu)
186 cpu_2_logical_apicid[cpu] = BAD_APICID;
187 unmap_cpu_to_node(cpu);
190 #define unmap_cpu_to_logical_apicid(cpu) do {} while (0)
191 #define map_cpu_to_logical_apicid() do {} while (0)
195 * Report back to the Boot Processor.
198 static void __cpuinit smp_callin(void)
201 unsigned long timeout;
204 * If waken up by an INIT in an 82489DX configuration
205 * we may get here before an INIT-deassert IPI reaches
206 * our local APIC. We have to wait for the IPI or we'll
207 * lock up on an APIC access.
209 wait_for_init_deassert(&init_deasserted);
212 * (This works even if the APIC is not enabled.)
214 phys_id = GET_APIC_ID(read_apic_id());
215 cpuid = smp_processor_id();
216 if (cpu_isset(cpuid, cpu_callin_map)) {
217 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
220 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
223 * STARTUP IPIs are fragile beasts as they might sometimes
224 * trigger some glue motherboard logic. Complete APIC bus
225 * silence for 1 second, this overestimates the time the
226 * boot CPU is spending to send the up to 2 STARTUP IPIs
227 * by a factor of two. This should be enough.
231 * Waiting 2s total for startup (udelay is not yet working)
233 timeout = jiffies + 2*HZ;
234 while (time_before(jiffies, timeout)) {
236 * Has the boot CPU finished it's STARTUP sequence?
238 if (cpu_isset(cpuid, cpu_callout_map))
243 if (!time_before(jiffies, timeout)) {
244 panic("%s: CPU%d started up but did not get a callout!\n",
249 * the boot CPU has finished the init stage and is spinning
250 * on callin_map until we finish. We are free to set up this
251 * CPU, first the APIC. (this is probably redundant on most
255 Dprintk("CALLIN, before setup_local_APIC().\n");
256 smp_callin_clear_local_apic();
258 end_local_APIC_setup();
259 map_cpu_to_logical_apicid();
264 * Need to enable IRQs because it can take longer and then
265 * the NMI watchdog might kill us.
270 Dprintk("Stack at about %p\n", &cpuid);
273 * Save our processor parameters
275 smp_store_cpu_info(cpuid);
278 * Allow the master to continue.
280 cpu_set(cpuid, cpu_callin_map);
284 * Activate a secondary processor.
286 static void __cpuinit start_secondary(void *unused)
289 * Don't put *anything* before cpu_init(), SMP booting is too
290 * fragile that we want to limit the things done here to the
291 * most necessary things.
300 /* otherwise gcc will move up smp_processor_id before the cpu_init */
303 * Check TSC synchronization with the BP:
305 check_tsc_sync_target();
307 if (nmi_watchdog == NMI_IO_APIC) {
308 disable_8259A_irq(0);
309 enable_NMI_through_LVT0();
319 /* This must be done before setting cpu_online_map */
320 set_cpu_sibling_map(raw_smp_processor_id());
324 * We need to hold call_lock, so there is no inconsistency
325 * between the time smp_call_function() determines number of
326 * IPI recipients, and the time when the determination is made
327 * for which cpus receive the IPI. Holding this
328 * lock helps us to not include this cpu in a currently in progress
329 * smp_call_function().
331 lock_ipi_call_lock();
333 spin_lock(&vector_lock);
335 /* Setup the per cpu irq handling data structures */
336 __setup_vector_irq(smp_processor_id());
338 * Allow the master to continue.
340 spin_unlock(&vector_lock);
342 cpu_set(smp_processor_id(), cpu_online_map);
343 unlock_ipi_call_lock();
344 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
346 setup_secondary_clock();
352 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
355 * Mask B, Pentium, but not Pentium MMX
357 if (c->x86_vendor == X86_VENDOR_INTEL &&
359 c->x86_mask >= 1 && c->x86_mask <= 4 &&
362 * Remember we have B step Pentia with bugs
367 * Certain Athlons might work (for various values of 'work') in SMP
368 * but they are not certified as MP capable.
370 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
372 if (num_possible_cpus() == 1)
375 /* Athlon 660/661 is valid. */
376 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
380 /* Duron 670 is valid */
381 if ((c->x86_model == 7) && (c->x86_mask == 0))
385 * Athlon 662, Duron 671, and Athlon >model 7 have capability
386 * bit. It's worth noting that the A5 stepping (662) of some
387 * Athlon XP's have the MP bit set.
388 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
391 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
392 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
397 /* If we get here, not a certified SMP capable AMD system. */
398 add_taint(TAINT_UNSAFE_SMP);
405 static void __cpuinit smp_checks(void)
408 printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
409 "with B stepping processors.\n");
412 * Don't taint if we are running SMP kernel on a single non-MP
415 if (tainted & TAINT_UNSAFE_SMP) {
416 if (num_online_cpus())
417 printk(KERN_INFO "WARNING: This combination of AMD"
418 "processors is not suitable for SMP.\n");
420 tainted &= ~TAINT_UNSAFE_SMP;
425 * The bootstrap kernel entry code has set these up. Save them for
429 void __cpuinit smp_store_cpu_info(int id)
431 struct cpuinfo_x86 *c = &cpu_data(id);
436 identify_secondary_cpu(c);
441 void __cpuinit set_cpu_sibling_map(int cpu)
444 struct cpuinfo_x86 *c = &cpu_data(cpu);
446 cpu_set(cpu, cpu_sibling_setup_map);
448 if (smp_num_siblings > 1) {
449 for_each_cpu_mask(i, cpu_sibling_setup_map) {
450 if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
451 c->cpu_core_id == cpu_data(i).cpu_core_id) {
452 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
453 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
454 cpu_set(i, per_cpu(cpu_core_map, cpu));
455 cpu_set(cpu, per_cpu(cpu_core_map, i));
456 cpu_set(i, c->llc_shared_map);
457 cpu_set(cpu, cpu_data(i).llc_shared_map);
461 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
464 cpu_set(cpu, c->llc_shared_map);
466 if (current_cpu_data.x86_max_cores == 1) {
467 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
472 for_each_cpu_mask(i, cpu_sibling_setup_map) {
473 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
474 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
475 cpu_set(i, c->llc_shared_map);
476 cpu_set(cpu, cpu_data(i).llc_shared_map);
478 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
479 cpu_set(i, per_cpu(cpu_core_map, cpu));
480 cpu_set(cpu, per_cpu(cpu_core_map, i));
482 * Does this new cpu bringup a new core?
484 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
486 * for each core in package, increment
487 * the booted_cores for this new cpu
489 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
492 * increment the core count for all
493 * the other cpus in this package
496 cpu_data(i).booted_cores++;
497 } else if (i != cpu && !c->booted_cores)
498 c->booted_cores = cpu_data(i).booted_cores;
503 /* maps the cpu to the sched domain representing multi-core */
504 cpumask_t cpu_coregroup_map(int cpu)
506 struct cpuinfo_x86 *c = &cpu_data(cpu);
508 * For perf, we return last level cache shared map.
509 * And for power savings, we return cpu_core_map
511 if (sched_mc_power_savings || sched_smt_power_savings)
512 return per_cpu(cpu_core_map, cpu);
514 return c->llc_shared_map;
517 static void impress_friends(void)
520 unsigned long bogosum = 0;
522 * Allow the user to impress friends.
524 Dprintk("Before bogomips.\n");
525 for_each_possible_cpu(cpu)
526 if (cpu_isset(cpu, cpu_callout_map))
527 bogosum += cpu_data(cpu).loops_per_jiffy;
529 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
532 (bogosum/(5000/HZ))%100);
534 Dprintk("Before bogocount - setting activated=1.\n");
537 static inline void __inquire_remote_apic(int apicid)
539 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
540 char *names[] = { "ID", "VERSION", "SPIV" };
544 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
546 for (i = 0; i < ARRAY_SIZE(regs); i++) {
547 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
552 status = safe_apic_wait_icr_idle();
555 "a previous APIC delivery may have failed\n");
557 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
558 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
563 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
564 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
567 case APIC_ICR_RR_VALID:
568 status = apic_read(APIC_RRR);
569 printk(KERN_CONT "%08x\n", status);
572 printk(KERN_CONT "failed\n");
577 #ifdef WAKE_SECONDARY_VIA_NMI
579 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
580 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
581 * won't ... remember to clear down the APIC, etc later.
584 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
586 unsigned long send_status, accept_status = 0;
590 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
592 /* Boot on the stack */
593 /* Kick the second */
594 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
596 Dprintk("Waiting for send to finish...\n");
597 send_status = safe_apic_wait_icr_idle();
600 * Give the other CPU some time to accept the IPI.
604 * Due to the Pentium erratum 3AP.
606 maxlvt = lapic_get_maxlvt();
608 apic_read_around(APIC_SPIV);
609 apic_write(APIC_ESR, 0);
611 accept_status = (apic_read(APIC_ESR) & 0xEF);
612 Dprintk("NMI sent.\n");
615 printk(KERN_ERR "APIC never delivered???\n");
617 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
619 return (send_status | accept_status);
621 #endif /* WAKE_SECONDARY_VIA_NMI */
623 #ifdef WAKE_SECONDARY_VIA_INIT
625 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
627 unsigned long send_status, accept_status = 0;
628 int maxlvt, num_starts, j;
630 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) {
631 send_status = uv_wakeup_secondary(phys_apicid, start_eip);
632 atomic_set(&init_deasserted, 1);
637 * Be paranoid about clearing APIC errors.
639 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
640 apic_read_around(APIC_SPIV);
641 apic_write(APIC_ESR, 0);
645 Dprintk("Asserting INIT.\n");
648 * Turn INIT on target chip
650 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
655 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
658 Dprintk("Waiting for send to finish...\n");
659 send_status = safe_apic_wait_icr_idle();
663 Dprintk("Deasserting INIT.\n");
666 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
669 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
671 Dprintk("Waiting for send to finish...\n");
672 send_status = safe_apic_wait_icr_idle();
675 atomic_set(&init_deasserted, 1);
678 * Should we send STARTUP IPIs ?
680 * Determine this based on the APIC version.
681 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
683 if (APIC_INTEGRATED(apic_version[phys_apicid]))
689 * Paravirt / VMI wants a startup IPI hook here to set up the
690 * target processor state.
692 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
693 (unsigned long)stack_start.sp);
696 * Run STARTUP IPI loop.
698 Dprintk("#startup loops: %d.\n", num_starts);
700 maxlvt = lapic_get_maxlvt();
702 for (j = 1; j <= num_starts; j++) {
703 Dprintk("Sending STARTUP #%d.\n", j);
704 apic_read_around(APIC_SPIV);
705 apic_write(APIC_ESR, 0);
707 Dprintk("After apic_write.\n");
714 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
716 /* Boot on the stack */
717 /* Kick the second */
718 apic_write_around(APIC_ICR, APIC_DM_STARTUP
719 | (start_eip >> 12));
722 * Give the other CPU some time to accept the IPI.
726 Dprintk("Startup point 1.\n");
728 Dprintk("Waiting for send to finish...\n");
729 send_status = safe_apic_wait_icr_idle();
732 * Give the other CPU some time to accept the IPI.
736 * Due to the Pentium erratum 3AP.
739 apic_read_around(APIC_SPIV);
740 apic_write(APIC_ESR, 0);
742 accept_status = (apic_read(APIC_ESR) & 0xEF);
743 if (send_status || accept_status)
746 Dprintk("After Startup.\n");
749 printk(KERN_ERR "APIC never delivered???\n");
751 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
753 return (send_status | accept_status);
755 #endif /* WAKE_SECONDARY_VIA_INIT */
758 struct work_struct work;
759 struct task_struct *idle;
760 struct completion done;
764 static void __cpuinit do_fork_idle(struct work_struct *work)
766 struct create_idle *c_idle =
767 container_of(work, struct create_idle, work);
769 c_idle->idle = fork_idle(c_idle->cpu);
770 complete(&c_idle->done);
775 * Allocate node local memory for the AP pda.
777 * Must be called after the _cpu_pda pointer table is initialized.
779 static int __cpuinit get_local_pda(int cpu)
781 struct x8664_pda *oldpda, *newpda;
782 unsigned long size = sizeof(struct x8664_pda);
783 int node = cpu_to_node(cpu);
785 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem)
788 oldpda = cpu_pda(cpu);
789 newpda = kmalloc_node(size, GFP_ATOMIC, node);
791 printk(KERN_ERR "Could not allocate node local PDA "
792 "for CPU %d on node %d\n", cpu, node);
795 return 0; /* have a usable pda */
801 memcpy(newpda, oldpda, size);
803 free_bootmem((unsigned long)oldpda, size);
806 newpda->in_bootmem = 0;
807 cpu_pda(cpu) = newpda;
810 #endif /* CONFIG_X86_64 */
812 static int __cpuinit do_boot_cpu(int apicid, int cpu)
814 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
815 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
816 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
819 unsigned long boot_error = 0;
821 unsigned long start_ip;
822 unsigned short nmi_high = 0, nmi_low = 0;
823 struct create_idle c_idle = {
825 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
827 INIT_WORK(&c_idle.work, do_fork_idle);
830 /* Allocate node local memory for AP pdas */
832 boot_error = get_local_pda(cpu);
835 /* if can't get pda memory, can't start cpu */
839 alternatives_smp_switch(1);
841 c_idle.idle = get_idle_for_cpu(cpu);
844 * We can't use kernel_thread since we must avoid to
845 * reschedule the child.
848 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
849 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
850 init_idle(c_idle.idle, cpu);
854 if (!keventd_up() || current_is_keventd())
855 c_idle.work.func(&c_idle.work);
857 schedule_work(&c_idle.work);
858 wait_for_completion(&c_idle.done);
861 if (IS_ERR(c_idle.idle)) {
862 printk("failed fork for CPU %d\n", cpu);
863 return PTR_ERR(c_idle.idle);
866 set_idle_for_cpu(cpu, c_idle.idle);
869 per_cpu(current_task, cpu) = c_idle.idle;
871 /* Stack for startup_32 can be just as for start_secondary onwards */
874 cpu_pda(cpu)->pcurrent = c_idle.idle;
875 load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
876 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
878 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
879 initial_code = (unsigned long)start_secondary;
880 stack_start.sp = (void *) c_idle.idle->thread.sp;
882 /* start_ip had better be page-aligned! */
883 start_ip = setup_trampoline();
885 /* So we see what's up */
886 printk(KERN_INFO "Booting processor %d/%d ip %lx\n",
887 cpu, apicid, start_ip);
890 * This grunge runs the startup process for
891 * the targeted processor.
894 atomic_set(&init_deasserted, 0);
896 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
898 Dprintk("Setting warm reset code and vector.\n");
900 store_NMI_vector(&nmi_high, &nmi_low);
902 smpboot_setup_warm_reset_vector(start_ip);
904 * Be paranoid about clearing APIC errors.
906 apic_write(APIC_ESR, 0);
911 * Starting actual IPI sequence...
913 boot_error = wakeup_secondary_cpu(apicid, start_ip);
917 * allow APs to start initializing.
919 Dprintk("Before Callout %d.\n", cpu);
920 cpu_set(cpu, cpu_callout_map);
921 Dprintk("After Callout %d.\n", cpu);
924 * Wait 5s total for a response
926 for (timeout = 0; timeout < 50000; timeout++) {
927 if (cpu_isset(cpu, cpu_callin_map))
928 break; /* It has booted */
932 if (cpu_isset(cpu, cpu_callin_map)) {
933 /* number CPUs logically, starting from 1 (BSP is 0) */
935 printk(KERN_INFO "CPU%d: ", cpu);
936 print_cpu_info(&cpu_data(cpu));
937 Dprintk("CPU has booted.\n");
940 if (*((volatile unsigned char *)trampoline_base)
942 /* trampoline started but...? */
943 printk(KERN_ERR "Stuck ??\n");
945 /* trampoline code not run */
946 printk(KERN_ERR "Not responding.\n");
947 if (get_uv_system_type() != UV_NON_UNIQUE_APIC)
948 inquire_remote_apic(apicid);
955 /* Try to put things back the way they were before ... */
956 unmap_cpu_to_logical_apicid(cpu);
958 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
960 cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */
961 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
962 cpu_clear(cpu, cpu_present_map);
963 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
966 /* mark "stuck" area as not stuck */
967 *((volatile unsigned long *)trampoline_base) = 0;
970 * Cleanup possible dangling ends...
972 smpboot_restore_warm_reset_vector();
977 int __cpuinit native_cpu_up(unsigned int cpu)
979 int apicid = cpu_present_to_apicid(cpu);
983 WARN_ON(irqs_disabled());
985 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
987 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
988 !physid_isset(apicid, phys_cpu_present_map)) {
989 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
994 * Already booted CPU?
996 if (cpu_isset(cpu, cpu_callin_map)) {
997 Dprintk("do_boot_cpu %d Already started\n", cpu);
1002 * Save current MTRR state in case it was changed since early boot
1003 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
1007 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
1009 #ifdef CONFIG_X86_32
1010 /* init low mem mapping */
1011 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
1012 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
1016 err = do_boot_cpu(apicid, cpu);
1021 err = do_boot_cpu(apicid, cpu);
1024 Dprintk("do_boot_cpu failed %d\n", err);
1029 * Check TSC synchronization with the AP (keep irqs disabled
1032 local_irq_save(flags);
1033 check_tsc_sync_source(cpu);
1034 local_irq_restore(flags);
1036 while (!cpu_online(cpu)) {
1038 touch_nmi_watchdog();
1045 * Fall back to non SMP mode after errors.
1047 * RED-PEN audit/test this more. I bet there is more state messed up here.
1049 static __init void disable_smp(void)
1051 cpu_present_map = cpumask_of_cpu(0);
1052 cpu_possible_map = cpumask_of_cpu(0);
1053 smpboot_clear_io_apic_irqs();
1055 if (smp_found_config)
1056 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1058 physid_set_mask_of_physid(0, &phys_cpu_present_map);
1059 map_cpu_to_logical_apicid();
1060 cpu_set(0, per_cpu(cpu_sibling_map, 0));
1061 cpu_set(0, per_cpu(cpu_core_map, 0));
1065 * Various sanity checks.
1067 static int __init smp_sanity_check(unsigned max_cpus)
1070 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1071 printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
1072 "by the BIOS.\n", hard_smp_processor_id());
1073 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1077 * If we couldn't find an SMP configuration at boot time,
1078 * get out of here now!
1080 if (!smp_found_config && !acpi_lapic) {
1082 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1084 if (APIC_init_uniprocessor())
1085 printk(KERN_NOTICE "Local APIC not detected."
1086 " Using dummy APIC emulation.\n");
1091 * Should not be necessary because the MP table should list the boot
1092 * CPU too, but we do it for the sake of robustness anyway.
1094 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
1096 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1097 boot_cpu_physical_apicid);
1098 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1103 * If we couldn't find a local APIC, then get out of here now!
1105 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1107 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1108 boot_cpu_physical_apicid);
1109 printk(KERN_ERR "... forcing use of dummy APIC emulation."
1110 "(tell your hw vendor)\n");
1111 smpboot_clear_io_apic();
1115 verify_local_APIC();
1118 * If SMP should be disabled, then really disable it!
1121 printk(KERN_INFO "SMP mode deactivated.\n");
1122 smpboot_clear_io_apic();
1124 localise_nmi_watchdog();
1126 #ifdef CONFIG_X86_32
1130 end_local_APIC_setup();
1137 static void __init smp_cpu_index_default(void)
1140 struct cpuinfo_x86 *c;
1142 for_each_possible_cpu(i) {
1144 /* mark all to hotplug */
1145 c->cpu_index = NR_CPUS;
1150 * Prepare for SMP bootup. The MP table or ACPI has been read
1151 * earlier. Just do some sanity checking here and enable APIC mode.
1153 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1156 nmi_watchdog_default();
1157 smp_cpu_index_default();
1158 current_cpu_data = boot_cpu_data;
1159 cpu_callin_map = cpumask_of_cpu(0);
1162 * Setup boot CPU information
1164 smp_store_cpu_info(0); /* Final full version of the data */
1165 boot_cpu_logical_apicid = logical_smp_processor_id();
1166 current_thread_info()->cpu = 0; /* needed? */
1167 set_cpu_sibling_map(0);
1169 if (smp_sanity_check(max_cpus) < 0) {
1170 printk(KERN_INFO "SMP disabled\n");
1176 if (GET_APIC_ID(read_apic_id()) != boot_cpu_physical_apicid) {
1177 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1178 GET_APIC_ID(read_apic_id()), boot_cpu_physical_apicid);
1179 /* Or can we switch back to PIC here? */
1183 #ifdef CONFIG_X86_32
1187 * Switch from PIC to APIC mode.
1191 #ifdef CONFIG_X86_64
1193 * Enable IO APIC before setting up error vector
1195 if (!skip_ioapic_setup && nr_ioapics)
1198 end_local_APIC_setup();
1200 map_cpu_to_logical_apicid();
1202 setup_portio_remap();
1204 smpboot_setup_io_apic();
1206 * Set up local APIC timer on boot CPU.
1209 printk(KERN_INFO "CPU%d: ", 0);
1210 print_cpu_info(&cpu_data(0));
1216 * Early setup to make printk work.
1218 void __init native_smp_prepare_boot_cpu(void)
1220 int me = smp_processor_id();
1221 #ifdef CONFIG_X86_32
1224 switch_to_new_gdt();
1225 /* already set me in cpu_online_map in boot_cpu_init() */
1226 cpu_set(me, cpu_callout_map);
1227 per_cpu(cpu_state, me) = CPU_ONLINE;
1230 void __init native_smp_cpus_done(unsigned int max_cpus)
1232 Dprintk("Boot done.\n");
1236 #ifdef CONFIG_X86_IO_APIC
1237 setup_ioapic_dest();
1239 check_nmi_watchdog();
1242 #ifdef CONFIG_HOTPLUG_CPU
1244 # ifdef CONFIG_X86_32
1245 void cpu_exit_clear(void)
1247 int cpu = raw_smp_processor_id();
1254 cpu_clear(cpu, cpu_callout_map);
1255 cpu_clear(cpu, cpu_callin_map);
1257 unmap_cpu_to_logical_apicid(cpu);
1259 # endif /* CONFIG_X86_32 */
1261 static void remove_siblinginfo(int cpu)
1264 struct cpuinfo_x86 *c = &cpu_data(cpu);
1266 for_each_cpu_mask(sibling, per_cpu(cpu_core_map, cpu)) {
1267 cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
1269 * last thread sibling in this cpu core going down
1271 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
1272 cpu_data(sibling).booted_cores--;
1275 for_each_cpu_mask(sibling, per_cpu(cpu_sibling_map, cpu))
1276 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
1277 cpus_clear(per_cpu(cpu_sibling_map, cpu));
1278 cpus_clear(per_cpu(cpu_core_map, cpu));
1279 c->phys_proc_id = 0;
1281 cpu_clear(cpu, cpu_sibling_setup_map);
1284 static int additional_cpus __initdata = -1;
1286 static __init int setup_additional_cpus(char *s)
1288 return s && get_option(&s, &additional_cpus) ? 0 : -EINVAL;
1290 early_param("additional_cpus", setup_additional_cpus);
1293 * cpu_possible_map should be static, it cannot change as cpu's
1294 * are onlined, or offlined. The reason is per-cpu data-structures
1295 * are allocated by some modules at init time, and dont expect to
1296 * do this dynamically on cpu arrival/departure.
1297 * cpu_present_map on the other hand can change dynamically.
1298 * In case when cpu_hotplug is not compiled, then we resort to current
1299 * behaviour, which is cpu_possible == cpu_present.
1302 * Three ways to find out the number of additional hotplug CPUs:
1303 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1304 * - The user can overwrite it with additional_cpus=NUM
1305 * - Otherwise don't reserve additional CPUs.
1306 * We do this because additional CPUs waste a lot of memory.
1309 __init void prefill_possible_map(void)
1314 if (additional_cpus == -1) {
1315 if (disabled_cpus > 0)
1316 additional_cpus = disabled_cpus;
1318 additional_cpus = 0;
1320 possible = num_processors + additional_cpus;
1321 if (possible > NR_CPUS)
1324 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1325 possible, max_t(int, possible - num_processors, 0));
1327 for (i = 0; i < possible; i++)
1328 cpu_set(i, cpu_possible_map);
1330 nr_cpu_ids = possible;
1333 static void __ref remove_cpu_from_maps(int cpu)
1335 cpu_clear(cpu, cpu_online_map);
1336 #ifdef CONFIG_X86_64
1337 cpu_clear(cpu, cpu_callout_map);
1338 cpu_clear(cpu, cpu_callin_map);
1339 /* was set by cpu_init() */
1340 clear_bit(cpu, (unsigned long *)&cpu_initialized);
1341 numa_remove_cpu(cpu);
1345 int __cpu_disable(void)
1347 int cpu = smp_processor_id();
1350 * Perhaps use cpufreq to drop frequency, but that could go
1351 * into generic code.
1353 * We won't take down the boot processor on i386 due to some
1354 * interrupts only being able to be serviced by the BSP.
1355 * Especially so if we're not using an IOAPIC -zwane
1360 if (nmi_watchdog == NMI_LOCAL_APIC)
1361 stop_apic_nmi_watchdog(NULL);
1366 * Allow any queued timer interrupts to get serviced
1367 * This is only a temporary solution until we cleanup
1368 * fixup_irqs as we do for IA64.
1373 local_irq_disable();
1374 remove_siblinginfo(cpu);
1376 /* It's now safe to remove this processor from the online map */
1377 remove_cpu_from_maps(cpu);
1378 fixup_irqs(cpu_online_map);
1382 void __cpu_die(unsigned int cpu)
1384 /* We don't do anything here: idle task is faking death itself. */
1387 for (i = 0; i < 10; i++) {
1388 /* They ack this in play_dead by setting CPU_DEAD */
1389 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1390 printk(KERN_INFO "CPU %d is now offline\n", cpu);
1391 if (1 == num_online_cpus())
1392 alternatives_smp_switch(0);
1397 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1399 #else /* ... !CONFIG_HOTPLUG_CPU */
1400 int __cpu_disable(void)
1405 void __cpu_die(unsigned int cpu)
1407 /* We said "no" in __cpu_disable */
1413 * If the BIOS enumerates physical processors before logical,
1414 * maxcpus=N at enumeration-time can be used to disable HT.
1416 static int __init parse_maxcpus(char *arg)
1418 extern unsigned int maxcpus;
1420 maxcpus = simple_strtoul(arg, NULL, 0);
1423 early_param("maxcpus", parse_maxcpus);