2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
32 #include <asm/bios_ebda.h>
34 #include <mach_apic.h>
36 /* Have we found an MP table */
40 * Various Linux-internal data structures created from the
43 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
44 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
46 static int mp_current_pci_id = 0;
48 /* # of MP IRQ source entries */
49 struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
51 /* MP IRQ source entries */
54 /* Make it easy to share the UP and SMP code: */
55 #ifndef CONFIG_X86_SMP
56 unsigned int num_processors;
57 unsigned disabled_cpus __cpuinitdata;
58 #ifndef CONFIG_X86_LOCAL_APIC
59 unsigned int boot_cpu_physical_apicid = -1U;
64 * Intel MP BIOS table parsing routines:
68 * Checksum an MP configuration block.
71 static int __init mpf_checksum(unsigned char *mp, int len)
81 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
83 char *bootup_cpu = "";
85 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
89 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
90 bootup_cpu = " (Bootup-CPU)";
91 boot_cpu_physical_apicid = m->mpc_apicid;
94 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
95 generic_processor_info(m->mpc_apicid, 0);
98 static void __init MP_bus_info(struct mpc_config_bus *m)
102 memcpy(str, m->mpc_bustype, 6);
104 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
106 if (strncmp(str, "ISA", 3) == 0) {
107 set_bit(m->mpc_busid, mp_bus_not_pci);
108 } else if (strncmp(str, "PCI", 3) == 0) {
109 clear_bit(m->mpc_busid, mp_bus_not_pci);
110 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
113 printk(KERN_ERR "Unknown bustype %s\n", str);
117 static int bad_ioapic(unsigned long address)
119 if (nr_ioapics >= MAX_IO_APICS) {
120 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
121 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
122 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
125 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
126 " found in table, skipping!\n");
132 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
134 if (!(m->mpc_flags & MPC_APIC_USABLE))
137 printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
140 if (bad_ioapic(m->mpc_apicaddr))
143 mp_ioapics[nr_ioapics] = *m;
147 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
149 mp_irqs[mp_irq_entries] = *m;
150 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
151 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
152 m->mpc_irqtype, m->mpc_irqflag & 3,
153 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
154 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
155 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
156 panic("Max # of irq sources exceeded!!\n");
159 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
161 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
162 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
163 m->mpc_irqtype, m->mpc_irqflag & 3,
164 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
165 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
171 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
174 int count = sizeof(*mpc);
175 unsigned char *mpt = ((unsigned char *)mpc) + count;
177 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
178 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
179 mpc->mpc_signature[0],
180 mpc->mpc_signature[1],
181 mpc->mpc_signature[2], mpc->mpc_signature[3]);
184 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
185 printk(KERN_ERR "MPTABLE: checksum error!\n");
188 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
189 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
193 if (!mpc->mpc_lapic) {
194 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
197 memcpy(str, mpc->mpc_oem, 8);
199 printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
201 memcpy(str, mpc->mpc_productid, 12);
203 printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
205 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
207 /* save the local APIC address, it might be non-default */
209 mp_lapic_addr = mpc->mpc_lapic;
215 * Now process the configuration blocks.
217 while (count < mpc->mpc_length) {
221 struct mpc_config_processor *m =
222 (struct mpc_config_processor *)mpt;
224 MP_processor_info(m);
231 struct mpc_config_bus *m =
232 (struct mpc_config_bus *)mpt;
240 struct mpc_config_ioapic *m =
241 (struct mpc_config_ioapic *)mpt;
249 struct mpc_config_intsrc *m =
250 (struct mpc_config_intsrc *)mpt;
259 struct mpc_config_lintsrc *m =
260 (struct mpc_config_lintsrc *)mpt;
268 setup_apic_routing();
270 printk(KERN_ERR "MPTABLE: no processors registered!\n");
271 return num_processors;
274 static int __init ELCR_trigger(unsigned int irq)
278 port = 0x4d0 + (irq >> 3);
279 return (inb(port) >> (irq & 7)) & 1;
282 static void __init construct_default_ioirq_mptable(int mpc_default_type)
284 struct mpc_config_intsrc intsrc;
286 int ELCR_fallback = 0;
288 intsrc.mpc_type = MP_INTSRC;
289 intsrc.mpc_irqflag = 0; /* conforming */
290 intsrc.mpc_srcbus = 0;
291 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
293 intsrc.mpc_irqtype = mp_INT;
296 * If true, we have an ISA/PCI system with no IRQ entries
297 * in the MP table. To prevent the PCI interrupts from being set up
298 * incorrectly, we try to use the ELCR. The sanity check to see if
299 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
300 * never be level sensitive, so we simply see if the ELCR agrees.
301 * If it does, we assume it's valid.
303 if (mpc_default_type == 5) {
304 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
305 "falling back to ELCR\n");
307 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
309 printk(KERN_ERR "ELCR contains invalid data... "
313 "Using ELCR to identify PCI interrupts\n");
318 for (i = 0; i < 16; i++) {
319 switch (mpc_default_type) {
321 if (i == 0 || i == 13)
322 continue; /* IRQ0 & IRQ13 not connected */
326 continue; /* IRQ2 is never connected */
331 * If the ELCR indicates a level-sensitive interrupt, we
332 * copy that information over to the MP table in the
333 * irqflag field (level sensitive, active high polarity).
336 intsrc.mpc_irqflag = 13;
338 intsrc.mpc_irqflag = 0;
341 intsrc.mpc_srcbusirq = i;
342 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
343 MP_intsrc_info(&intsrc);
346 intsrc.mpc_irqtype = mp_ExtINT;
347 intsrc.mpc_srcbusirq = 0;
348 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
349 MP_intsrc_info(&intsrc);
352 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
354 struct mpc_config_processor processor;
355 struct mpc_config_bus bus;
356 struct mpc_config_ioapic ioapic;
357 struct mpc_config_lintsrc lintsrc;
358 int linttypes[2] = { mp_ExtINT, mp_NMI };
362 * local APIC has default address
364 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
367 * 2 CPUs, numbered 0 & 1.
369 processor.mpc_type = MP_PROCESSOR;
370 processor.mpc_apicver = 0;
371 processor.mpc_cpuflag = CPU_ENABLED;
372 processor.mpc_cpufeature = 0;
373 processor.mpc_featureflag = 0;
374 processor.mpc_reserved[0] = 0;
375 processor.mpc_reserved[1] = 0;
376 for (i = 0; i < 2; i++) {
377 processor.mpc_apicid = i;
378 MP_processor_info(&processor);
381 bus.mpc_type = MP_BUS;
383 switch (mpc_default_type) {
385 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
390 memcpy(bus.mpc_bustype, "ISA ", 6);
394 if (mpc_default_type > 4) {
396 memcpy(bus.mpc_bustype, "PCI ", 6);
400 ioapic.mpc_type = MP_IOAPIC;
401 ioapic.mpc_apicid = 2;
402 ioapic.mpc_apicver = 0;
403 ioapic.mpc_flags = MPC_APIC_USABLE;
404 ioapic.mpc_apicaddr = 0xFEC00000;
405 MP_ioapic_info(&ioapic);
408 * We set up most of the low 16 IO-APIC pins according to MPS rules.
410 construct_default_ioirq_mptable(mpc_default_type);
412 lintsrc.mpc_type = MP_LINTSRC;
413 lintsrc.mpc_irqflag = 0; /* conforming */
414 lintsrc.mpc_srcbusid = 0;
415 lintsrc.mpc_srcbusirq = 0;
416 lintsrc.mpc_destapic = MP_APIC_ALL;
417 for (i = 0; i < 2; i++) {
418 lintsrc.mpc_irqtype = linttypes[i];
419 lintsrc.mpc_destapiclint = i;
420 MP_lintsrc_info(&lintsrc);
424 static struct intel_mp_floating *mpf_found;
427 * Scan the memory blocks for an SMP configuration block.
429 static void __init __get_smp_config(unsigned early)
431 struct intel_mp_floating *mpf = mpf_found;
433 if (acpi_lapic && early)
436 * ACPI supports both logical (e.g. Hyper-Threading) and physical
437 * processors, where MPS only supports physical.
439 if (acpi_lapic && acpi_ioapic) {
440 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
443 } else if (acpi_lapic)
444 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
445 "configuration information\n");
447 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
448 mpf->mpf_specification);
451 * Now see if we need to read further.
453 if (mpf->mpf_feature1 != 0) {
456 * local APIC has default address
458 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
462 printk(KERN_INFO "Default MP configuration #%d\n",
464 construct_default_ISA_mptable(mpf->mpf_feature1);
466 } else if (mpf->mpf_physptr) {
469 * Read the physical hardware table. Anything here will
470 * override the defaults.
472 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
473 smp_found_config = 0;
475 "BIOS bug, MP table errors detected!...\n");
476 printk(KERN_ERR "... disabling SMP support. "
477 "(tell your hw vendor)\n");
484 * If there are no explicit MP IRQ entries, then we are
485 * broken. We set up most of the low 16 IO-APIC pins to
486 * ISA defaults and hope it will work.
488 if (!mp_irq_entries) {
489 struct mpc_config_bus bus;
491 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
492 "using default mptable. "
493 "(tell your hw vendor)\n");
495 bus.mpc_type = MP_BUS;
497 memcpy(bus.mpc_bustype, "ISA ", 6);
500 construct_default_ioirq_mptable(0);
507 printk(KERN_INFO "Processors: %d\n", num_processors);
509 * Only use the first configuration found.
513 void __init early_get_smp_config(void)
518 void __init get_smp_config(void)
523 static int __init smp_scan_config(unsigned long base, unsigned long length,
526 extern void __bad_mpf_size(void);
527 unsigned int *bp = phys_to_virt(base);
528 struct intel_mp_floating *mpf;
530 Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
531 if (sizeof(*mpf) != 16)
535 mpf = (struct intel_mp_floating *)bp;
536 if ((*bp == SMP_MAGIC_IDENT) &&
537 (mpf->mpf_length == 1) &&
538 !mpf_checksum((unsigned char *)bp, 16) &&
539 ((mpf->mpf_specification == 1)
540 || (mpf->mpf_specification == 4))) {
542 smp_found_config = 1;
548 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
549 if (mpf->mpf_physptr)
550 reserve_bootmem_generic(mpf->mpf_physptr,
560 static void __init __find_smp_config(unsigned reserve)
562 unsigned int address;
565 * FIXME: Linux assumes you have 640K of base ram..
566 * this continues the error...
568 * 1) Scan the bottom 1K for a signature
569 * 2) Scan the top 1K of base RAM
570 * 3) Scan the 64K of bios
572 if (smp_scan_config(0x0, 0x400, reserve) ||
573 smp_scan_config(639 * 0x400, 0x400, reserve) ||
574 smp_scan_config(0xF0000, 0x10000, reserve))
577 * If it is an SMP machine we should know now.
579 * there is a real-mode segmented pointer pointing to the
580 * 4K EBDA area at 0x40E, calculate and scan it here.
582 * NOTE! There are Linux loaders that will corrupt the EBDA
583 * area, and as such this kind of SMP config may be less
584 * trustworthy, simply because the SMP table may have been
585 * stomped on during early boot. These loaders are buggy and
588 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
591 address = get_bios_ebda();
593 smp_scan_config(address, 0x400, reserve);
596 void __init early_find_smp_config(void)
598 __find_smp_config(0);
601 void __init find_smp_config(void)
603 __find_smp_config(1);
606 /* --------------------------------------------------------------------------
607 ACPI-based MP Configuration
608 -------------------------------------------------------------------------- */
612 void __init mp_register_lapic_address(u64 address)
614 mp_lapic_addr = (unsigned long)address;
615 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
616 if (boot_cpu_physical_apicid == -1U)
617 boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());
619 void __cpuinit mp_register_lapic(int id, u8 enabled)
626 generic_processor_info(id, 0);
631 #define MP_MAX_IOAPIC_PIN 127
633 static struct mp_ioapic_routing {
637 u32 pin_programmed[4];
638 } mp_ioapic_routing[MAX_IO_APICS];
640 static int mp_find_ioapic(int gsi)
644 /* Find the IOAPIC that manages this GSI. */
645 for (i = 0; i < nr_ioapics; i++) {
646 if ((gsi >= mp_ioapic_routing[i].gsi_base)
647 && (gsi <= mp_ioapic_routing[i].gsi_end))
651 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
655 static u8 uniq_ioapic_id(u8 id)
658 DECLARE_BITMAP(used, 256);
659 bitmap_zero(used, 256);
660 for (i = 0; i < nr_ioapics; i++) {
661 struct mpc_config_ioapic *ia = &mp_ioapics[i];
662 __set_bit(ia->mpc_apicid, used);
664 if (!test_bit(id, used))
666 return find_first_zero_bit(used, 256);
669 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
673 if (bad_ioapic(address))
678 mp_ioapics[idx].mpc_type = MP_IOAPIC;
679 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
680 mp_ioapics[idx].mpc_apicaddr = address;
682 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
683 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
684 mp_ioapics[idx].mpc_apicver = 0;
687 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
688 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
690 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
691 mp_ioapic_routing[idx].gsi_base = gsi_base;
692 mp_ioapic_routing[idx].gsi_end = gsi_base +
693 io_apic_get_redir_entries(idx);
695 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
696 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
697 mp_ioapics[idx].mpc_apicaddr,
698 mp_ioapic_routing[idx].gsi_base,
699 mp_ioapic_routing[idx].gsi_end);
704 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
706 struct mpc_config_intsrc intsrc;
711 * Convert 'gsi' to 'ioapic.pin'.
713 ioapic = mp_find_ioapic(gsi);
716 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
719 * TBD: This check is for faulty timer entries, where the override
720 * erroneously sets the trigger to level, resulting in a HUGE
721 * increase of timer interrupts!
723 if ((bus_irq == 0) && (trigger == 3))
726 intsrc.mpc_type = MP_INTSRC;
727 intsrc.mpc_irqtype = mp_INT;
728 intsrc.mpc_irqflag = (trigger << 2) | polarity;
729 intsrc.mpc_srcbus = MP_ISA_BUS;
730 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
731 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
732 intsrc.mpc_dstirq = pin; /* INTIN# */
734 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
735 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
736 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
737 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
739 mp_irqs[mp_irq_entries] = intsrc;
740 if (++mp_irq_entries == MAX_IRQ_SOURCES)
741 panic("Max # of irq sources exceeded!\n");
744 void __init mp_config_acpi_legacy_irqs(void)
746 struct mpc_config_intsrc intsrc;
751 * Fabricate the legacy ISA bus (bus #31).
753 set_bit(MP_ISA_BUS, mp_bus_not_pci);
756 * Locate the IOAPIC that manages the ISA IRQs (0-15).
758 ioapic = mp_find_ioapic(0);
762 intsrc.mpc_type = MP_INTSRC;
763 intsrc.mpc_irqflag = 0; /* Conforming */
764 intsrc.mpc_srcbus = MP_ISA_BUS;
765 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
768 * Use the default configuration for the IRQs 0-15. Unless
769 * overridden by (MADT) interrupt source override entries.
771 for (i = 0; i < 16; i++) {
774 for (idx = 0; idx < mp_irq_entries; idx++) {
775 struct mpc_config_intsrc *irq = mp_irqs + idx;
777 /* Do we already have a mapping for this ISA IRQ? */
778 if (irq->mpc_srcbus == MP_ISA_BUS
779 && irq->mpc_srcbusirq == i)
782 /* Do we already have a mapping for this IOAPIC pin */
783 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
784 (irq->mpc_dstirq == i))
788 if (idx != mp_irq_entries) {
789 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
790 continue; /* IRQ already used */
793 intsrc.mpc_irqtype = mp_INT;
794 intsrc.mpc_srcbusirq = i; /* Identity mapped */
795 intsrc.mpc_dstirq = i;
797 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
798 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
799 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
800 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
803 mp_irqs[mp_irq_entries] = intsrc;
804 if (++mp_irq_entries == MAX_IRQ_SOURCES)
805 panic("Max # of irq sources exceeded!\n");
809 int mp_register_gsi(u32 gsi, int triggering, int polarity)
815 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
818 /* Don't set up the ACPI SCI because it's already set up */
819 if (acpi_gbl_FADT.sci_interrupt == gsi)
822 ioapic = mp_find_ioapic(gsi);
824 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
828 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
831 * Avoid pin reprogramming. PRTs typically include entries
832 * with redundant pin->gsi mappings (but unique PCI devices);
833 * we only program the IOAPIC on the first.
835 bit = ioapic_pin % 32;
836 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
838 printk(KERN_ERR "Invalid reference to IOAPIC pin "
839 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
843 if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
844 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
845 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
849 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
851 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
852 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
853 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
856 #endif /* CONFIG_ACPI */