2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
32 #include <asm/bios_ebda.h>
34 #include <mach_apic.h>
36 /* Have we found an MP table */
38 unsigned int __cpuinitdata maxcpus = NR_CPUS;
41 * Various Linux-internal data structures created from the
44 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
45 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
47 static int mp_current_pci_id = 0;
48 /* I/O APIC entries */
49 struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
51 /* # of MP IRQ source entries */
52 struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
54 /* MP IRQ source entries */
59 /* Processor that is doing the boot up */
60 unsigned int boot_cpu_physical_apicid = -1U;
61 EXPORT_SYMBOL(boot_cpu_physical_apicid);
63 /* Internal processor count */
64 unsigned int num_processors;
66 unsigned disabled_cpus __cpuinitdata;
68 /* Bitmask of physically existing CPUs */
69 physid_mask_t phys_cpu_present_map = PHYSID_MASK_NONE;
72 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
73 = {[0 ... NR_CPUS - 1] = BAD_APICID };
74 void *x86_bios_cpu_apicid_early_ptr;
76 DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
77 EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
80 * Intel MP BIOS table parsing routines:
84 * Checksum an MP configuration block.
87 static int __init mpf_checksum(unsigned char *mp, int len)
97 void __cpuinit generic_processor_info(int apicid, int version)
102 if (num_processors >= NR_CPUS) {
103 printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
104 " Processor ignored.\n", NR_CPUS);
108 if (num_processors >= maxcpus) {
109 printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
110 " Processor ignored.\n", maxcpus);
115 cpus_complement(tmp_map, cpu_present_map);
116 cpu = first_cpu(tmp_map);
118 physid_set(apicid, phys_cpu_present_map);
119 if (apicid == boot_cpu_physical_apicid) {
121 * x86_bios_cpu_apicid is required to have processors listed
122 * in same order as logical cpu numbers. Hence the first
123 * entry is BSP, and so on.
127 /* are we being called early in kernel startup? */
128 if (x86_cpu_to_apicid_early_ptr) {
129 u16 *cpu_to_apicid = x86_cpu_to_apicid_early_ptr;
130 u16 *bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr;
132 cpu_to_apicid[cpu] = apicid;
133 bios_cpu_apicid[cpu] = apicid;
135 per_cpu(x86_cpu_to_apicid, cpu) = apicid;
136 per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
139 cpu_set(cpu, cpu_possible_map);
140 cpu_set(cpu, cpu_present_map);
143 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
145 char *bootup_cpu = "";
147 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
151 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
152 bootup_cpu = " (Bootup-CPU)";
153 boot_cpu_physical_apicid = m->mpc_apicid;
156 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
157 generic_processor_info(m->mpc_apicid, 0);
160 static void __init MP_bus_info(struct mpc_config_bus *m)
164 memcpy(str, m->mpc_bustype, 6);
166 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
168 if (strncmp(str, "ISA", 3) == 0) {
169 set_bit(m->mpc_busid, mp_bus_not_pci);
170 } else if (strncmp(str, "PCI", 3) == 0) {
171 clear_bit(m->mpc_busid, mp_bus_not_pci);
172 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
175 printk(KERN_ERR "Unknown bustype %s\n", str);
179 static int bad_ioapic(unsigned long address)
181 if (nr_ioapics >= MAX_IO_APICS) {
182 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
183 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
184 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
187 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
188 " found in table, skipping!\n");
194 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
196 if (!(m->mpc_flags & MPC_APIC_USABLE))
199 printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
202 if (bad_ioapic(m->mpc_apicaddr))
205 mp_ioapics[nr_ioapics] = *m;
209 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
211 mp_irqs[mp_irq_entries] = *m;
212 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
213 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
214 m->mpc_irqtype, m->mpc_irqflag & 3,
215 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
216 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
217 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
218 panic("Max # of irq sources exceeded!!\n");
221 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
223 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
224 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
225 m->mpc_irqtype, m->mpc_irqflag & 3,
226 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
227 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
233 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
236 int count = sizeof(*mpc);
237 unsigned char *mpt = ((unsigned char *)mpc) + count;
239 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
240 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
241 mpc->mpc_signature[0],
242 mpc->mpc_signature[1],
243 mpc->mpc_signature[2], mpc->mpc_signature[3]);
246 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
247 printk(KERN_ERR "MPTABLE: checksum error!\n");
250 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
251 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
255 if (!mpc->mpc_lapic) {
256 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
259 memcpy(str, mpc->mpc_oem, 8);
261 printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
263 memcpy(str, mpc->mpc_productid, 12);
265 printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
267 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
269 /* save the local APIC address, it might be non-default */
271 mp_lapic_addr = mpc->mpc_lapic;
277 * Now process the configuration blocks.
279 while (count < mpc->mpc_length) {
283 struct mpc_config_processor *m =
284 (struct mpc_config_processor *)mpt;
286 MP_processor_info(m);
293 struct mpc_config_bus *m =
294 (struct mpc_config_bus *)mpt;
302 struct mpc_config_ioapic *m =
303 (struct mpc_config_ioapic *)mpt;
311 struct mpc_config_intsrc *m =
312 (struct mpc_config_intsrc *)mpt;
321 struct mpc_config_lintsrc *m =
322 (struct mpc_config_lintsrc *)mpt;
330 setup_apic_routing();
332 printk(KERN_ERR "MPTABLE: no processors registered!\n");
333 return num_processors;
336 static int __init ELCR_trigger(unsigned int irq)
340 port = 0x4d0 + (irq >> 3);
341 return (inb(port) >> (irq & 7)) & 1;
344 static void __init construct_default_ioirq_mptable(int mpc_default_type)
346 struct mpc_config_intsrc intsrc;
348 int ELCR_fallback = 0;
350 intsrc.mpc_type = MP_INTSRC;
351 intsrc.mpc_irqflag = 0; /* conforming */
352 intsrc.mpc_srcbus = 0;
353 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
355 intsrc.mpc_irqtype = mp_INT;
358 * If true, we have an ISA/PCI system with no IRQ entries
359 * in the MP table. To prevent the PCI interrupts from being set up
360 * incorrectly, we try to use the ELCR. The sanity check to see if
361 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
362 * never be level sensitive, so we simply see if the ELCR agrees.
363 * If it does, we assume it's valid.
365 if (mpc_default_type == 5) {
366 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
367 "falling back to ELCR\n");
369 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
371 printk(KERN_ERR "ELCR contains invalid data... "
375 "Using ELCR to identify PCI interrupts\n");
380 for (i = 0; i < 16; i++) {
381 switch (mpc_default_type) {
383 if (i == 0 || i == 13)
384 continue; /* IRQ0 & IRQ13 not connected */
388 continue; /* IRQ2 is never connected */
393 * If the ELCR indicates a level-sensitive interrupt, we
394 * copy that information over to the MP table in the
395 * irqflag field (level sensitive, active high polarity).
398 intsrc.mpc_irqflag = 13;
400 intsrc.mpc_irqflag = 0;
403 intsrc.mpc_srcbusirq = i;
404 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
405 MP_intsrc_info(&intsrc);
408 intsrc.mpc_irqtype = mp_ExtINT;
409 intsrc.mpc_srcbusirq = 0;
410 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
411 MP_intsrc_info(&intsrc);
414 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
416 struct mpc_config_processor processor;
417 struct mpc_config_bus bus;
418 struct mpc_config_ioapic ioapic;
419 struct mpc_config_lintsrc lintsrc;
420 int linttypes[2] = { mp_ExtINT, mp_NMI };
424 * local APIC has default address
426 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
429 * 2 CPUs, numbered 0 & 1.
431 processor.mpc_type = MP_PROCESSOR;
432 processor.mpc_apicver = 0;
433 processor.mpc_cpuflag = CPU_ENABLED;
434 processor.mpc_cpufeature = 0;
435 processor.mpc_featureflag = 0;
436 processor.mpc_reserved[0] = 0;
437 processor.mpc_reserved[1] = 0;
438 for (i = 0; i < 2; i++) {
439 processor.mpc_apicid = i;
440 MP_processor_info(&processor);
443 bus.mpc_type = MP_BUS;
445 switch (mpc_default_type) {
447 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
452 memcpy(bus.mpc_bustype, "ISA ", 6);
456 if (mpc_default_type > 4) {
458 memcpy(bus.mpc_bustype, "PCI ", 6);
462 ioapic.mpc_type = MP_IOAPIC;
463 ioapic.mpc_apicid = 2;
464 ioapic.mpc_apicver = 0;
465 ioapic.mpc_flags = MPC_APIC_USABLE;
466 ioapic.mpc_apicaddr = 0xFEC00000;
467 MP_ioapic_info(&ioapic);
470 * We set up most of the low 16 IO-APIC pins according to MPS rules.
472 construct_default_ioirq_mptable(mpc_default_type);
474 lintsrc.mpc_type = MP_LINTSRC;
475 lintsrc.mpc_irqflag = 0; /* conforming */
476 lintsrc.mpc_srcbusid = 0;
477 lintsrc.mpc_srcbusirq = 0;
478 lintsrc.mpc_destapic = MP_APIC_ALL;
479 for (i = 0; i < 2; i++) {
480 lintsrc.mpc_irqtype = linttypes[i];
481 lintsrc.mpc_destapiclint = i;
482 MP_lintsrc_info(&lintsrc);
486 static struct intel_mp_floating *mpf_found;
489 * Scan the memory blocks for an SMP configuration block.
491 static void __init __get_smp_config(unsigned early)
493 struct intel_mp_floating *mpf = mpf_found;
495 if (acpi_lapic && early)
498 * ACPI supports both logical (e.g. Hyper-Threading) and physical
499 * processors, where MPS only supports physical.
501 if (acpi_lapic && acpi_ioapic) {
502 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
505 } else if (acpi_lapic)
506 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
507 "configuration information\n");
509 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
510 mpf->mpf_specification);
513 * Now see if we need to read further.
515 if (mpf->mpf_feature1 != 0) {
518 * local APIC has default address
520 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
524 printk(KERN_INFO "Default MP configuration #%d\n",
526 construct_default_ISA_mptable(mpf->mpf_feature1);
528 } else if (mpf->mpf_physptr) {
531 * Read the physical hardware table. Anything here will
532 * override the defaults.
534 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
535 smp_found_config = 0;
537 "BIOS bug, MP table errors detected!...\n");
538 printk(KERN_ERR "... disabling SMP support. "
539 "(tell your hw vendor)\n");
546 * If there are no explicit MP IRQ entries, then we are
547 * broken. We set up most of the low 16 IO-APIC pins to
548 * ISA defaults and hope it will work.
550 if (!mp_irq_entries) {
551 struct mpc_config_bus bus;
553 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
554 "using default mptable. "
555 "(tell your hw vendor)\n");
557 bus.mpc_type = MP_BUS;
559 memcpy(bus.mpc_bustype, "ISA ", 6);
562 construct_default_ioirq_mptable(0);
569 printk(KERN_INFO "Processors: %d\n", num_processors);
571 * Only use the first configuration found.
575 void __init early_get_smp_config(void)
580 void __init get_smp_config(void)
585 static int __init smp_scan_config(unsigned long base, unsigned long length,
588 extern void __bad_mpf_size(void);
589 unsigned int *bp = phys_to_virt(base);
590 struct intel_mp_floating *mpf;
592 Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
593 if (sizeof(*mpf) != 16)
597 mpf = (struct intel_mp_floating *)bp;
598 if ((*bp == SMP_MAGIC_IDENT) &&
599 (mpf->mpf_length == 1) &&
600 !mpf_checksum((unsigned char *)bp, 16) &&
601 ((mpf->mpf_specification == 1)
602 || (mpf->mpf_specification == 4))) {
604 smp_found_config = 1;
610 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
611 if (mpf->mpf_physptr)
612 reserve_bootmem_generic(mpf->mpf_physptr,
622 static void __init __find_smp_config(unsigned reserve)
624 unsigned int address;
627 * FIXME: Linux assumes you have 640K of base ram..
628 * this continues the error...
630 * 1) Scan the bottom 1K for a signature
631 * 2) Scan the top 1K of base RAM
632 * 3) Scan the 64K of bios
634 if (smp_scan_config(0x0, 0x400, reserve) ||
635 smp_scan_config(639 * 0x400, 0x400, reserve) ||
636 smp_scan_config(0xF0000, 0x10000, reserve))
639 * If it is an SMP machine we should know now.
641 * there is a real-mode segmented pointer pointing to the
642 * 4K EBDA area at 0x40E, calculate and scan it here.
644 * NOTE! There are Linux loaders that will corrupt the EBDA
645 * area, and as such this kind of SMP config may be less
646 * trustworthy, simply because the SMP table may have been
647 * stomped on during early boot. These loaders are buggy and
650 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
653 address = get_bios_ebda();
655 smp_scan_config(address, 0x400, reserve);
658 void __init early_find_smp_config(void)
660 __find_smp_config(0);
663 void __init find_smp_config(void)
665 __find_smp_config(1);
668 /* --------------------------------------------------------------------------
669 ACPI-based MP Configuration
670 -------------------------------------------------------------------------- */
674 void __init mp_register_lapic_address(u64 address)
676 mp_lapic_addr = (unsigned long)address;
677 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
678 if (boot_cpu_physical_apicid == -1U)
679 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
682 void __cpuinit mp_register_lapic(u8 id, u8 enabled)
689 generic_processor_info(id, 0);
693 #define MP_MAX_IOAPIC_PIN 127
695 static struct mp_ioapic_routing {
699 u32 pin_programmed[4];
700 } mp_ioapic_routing[MAX_IO_APICS];
702 static int mp_find_ioapic(int gsi)
706 /* Find the IOAPIC that manages this GSI. */
707 for (i = 0; i < nr_ioapics; i++) {
708 if ((gsi >= mp_ioapic_routing[i].gsi_base)
709 && (gsi <= mp_ioapic_routing[i].gsi_end))
713 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
717 static u8 uniq_ioapic_id(u8 id)
720 DECLARE_BITMAP(used, 256);
721 bitmap_zero(used, 256);
722 for (i = 0; i < nr_ioapics; i++) {
723 struct mpc_config_ioapic *ia = &mp_ioapics[i];
724 __set_bit(ia->mpc_apicid, used);
726 if (!test_bit(id, used))
728 return find_first_zero_bit(used, 256);
731 void __init mp_register_ioapic(u8 id, u32 address, u32 gsi_base)
735 if (bad_ioapic(address))
740 mp_ioapics[idx].mpc_type = MP_IOAPIC;
741 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
742 mp_ioapics[idx].mpc_apicaddr = address;
744 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
745 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
746 mp_ioapics[idx].mpc_apicver = 0;
749 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
750 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
752 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
753 mp_ioapic_routing[idx].gsi_base = gsi_base;
754 mp_ioapic_routing[idx].gsi_end = gsi_base +
755 io_apic_get_redir_entries(idx);
757 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
758 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
759 mp_ioapics[idx].mpc_apicaddr,
760 mp_ioapic_routing[idx].gsi_base,
761 mp_ioapic_routing[idx].gsi_end);
766 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
768 struct mpc_config_intsrc intsrc;
773 * Convert 'gsi' to 'ioapic.pin'.
775 ioapic = mp_find_ioapic(gsi);
778 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
781 * TBD: This check is for faulty timer entries, where the override
782 * erroneously sets the trigger to level, resulting in a HUGE
783 * increase of timer interrupts!
785 if ((bus_irq == 0) && (trigger == 3))
788 intsrc.mpc_type = MP_INTSRC;
789 intsrc.mpc_irqtype = mp_INT;
790 intsrc.mpc_irqflag = (trigger << 2) | polarity;
791 intsrc.mpc_srcbus = MP_ISA_BUS;
792 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
793 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
794 intsrc.mpc_dstirq = pin; /* INTIN# */
796 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
797 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
798 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
799 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
801 mp_irqs[mp_irq_entries] = intsrc;
802 if (++mp_irq_entries == MAX_IRQ_SOURCES)
803 panic("Max # of irq sources exceeded!\n");
806 void __init mp_config_acpi_legacy_irqs(void)
808 struct mpc_config_intsrc intsrc;
813 * Fabricate the legacy ISA bus (bus #31).
815 set_bit(MP_ISA_BUS, mp_bus_not_pci);
818 * Locate the IOAPIC that manages the ISA IRQs (0-15).
820 ioapic = mp_find_ioapic(0);
824 intsrc.mpc_type = MP_INTSRC;
825 intsrc.mpc_irqflag = 0; /* Conforming */
826 intsrc.mpc_srcbus = MP_ISA_BUS;
827 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
830 * Use the default configuration for the IRQs 0-15. Unless
831 * overridden by (MADT) interrupt source override entries.
833 for (i = 0; i < 16; i++) {
836 for (idx = 0; idx < mp_irq_entries; idx++) {
837 struct mpc_config_intsrc *irq = mp_irqs + idx;
839 /* Do we already have a mapping for this ISA IRQ? */
840 if (irq->mpc_srcbus == MP_ISA_BUS
841 && irq->mpc_srcbusirq == i)
844 /* Do we already have a mapping for this IOAPIC pin */
845 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
846 (irq->mpc_dstirq == i))
850 if (idx != mp_irq_entries) {
851 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
852 continue; /* IRQ already used */
855 intsrc.mpc_irqtype = mp_INT;
856 intsrc.mpc_srcbusirq = i; /* Identity mapped */
857 intsrc.mpc_dstirq = i;
859 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
860 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
861 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
862 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
865 mp_irqs[mp_irq_entries] = intsrc;
866 if (++mp_irq_entries == MAX_IRQ_SOURCES)
867 panic("Max # of irq sources exceeded!\n");
871 int mp_register_gsi(u32 gsi, int triggering, int polarity)
877 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
880 /* Don't set up the ACPI SCI because it's already set up */
881 if (acpi_gbl_FADT.sci_interrupt == gsi)
884 ioapic = mp_find_ioapic(gsi);
886 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
890 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
893 * Avoid pin reprogramming. PRTs typically include entries
894 * with redundant pin->gsi mappings (but unique PCI devices);
895 * we only program the IOAPIC on the first.
897 bit = ioapic_pin % 32;
898 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
900 printk(KERN_ERR "Invalid reference to IOAPIC pin "
901 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
905 if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
906 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
907 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
911 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
913 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
914 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
915 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
918 #endif /* CONFIG_ACPI */