2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
32 #include <asm/bios_ebda.h>
34 #include <mach_apic.h>
36 /* Have we found an MP table */
38 unsigned int __cpuinitdata maxcpus = NR_CPUS;
41 * Various Linux-internal data structures created from the
44 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
45 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
47 static int mp_current_pci_id = 0;
48 /* I/O APIC entries */
49 struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
51 /* # of MP IRQ source entries */
52 struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
54 /* MP IRQ source entries */
58 unsigned long mp_lapic_addr = 0;
60 /* Processor that is doing the boot up */
61 unsigned int boot_cpu_physical_apicid = -1U;
62 EXPORT_SYMBOL(boot_cpu_physical_apicid);
64 /* Internal processor count */
65 unsigned int num_processors;
67 unsigned disabled_cpus __cpuinitdata;
69 /* Bitmask of physically existing CPUs */
70 physid_mask_t phys_cpu_present_map = PHYSID_MASK_NONE;
72 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
73 = {[0 ... NR_CPUS - 1] = BAD_APICID };
74 void *x86_bios_cpu_apicid_early_ptr;
75 DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
76 EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
79 * Intel MP BIOS table parsing routines:
83 * Checksum an MP configuration block.
86 static int __init mpf_checksum(unsigned char *mp, int len)
96 void __cpuinit generic_processor_info(int apicid, int version)
101 if (num_processors >= NR_CPUS) {
102 printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
103 " Processor ignored.\n", NR_CPUS);
107 if (num_processors >= maxcpus) {
108 printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
109 " Processor ignored.\n", maxcpus);
114 cpus_complement(tmp_map, cpu_present_map);
115 cpu = first_cpu(tmp_map);
117 physid_set(apicid, phys_cpu_present_map);
118 if (apicid == boot_cpu_physical_apicid) {
120 * x86_bios_cpu_apicid is required to have processors listed
121 * in same order as logical cpu numbers. Hence the first
122 * entry is BSP, and so on.
126 /* are we being called early in kernel startup? */
127 if (x86_cpu_to_apicid_early_ptr) {
128 u16 *cpu_to_apicid = x86_cpu_to_apicid_early_ptr;
129 u16 *bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr;
131 cpu_to_apicid[cpu] = apicid;
132 bios_cpu_apicid[cpu] = apicid;
134 per_cpu(x86_cpu_to_apicid, cpu) = apicid;
135 per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
138 cpu_set(cpu, cpu_possible_map);
139 cpu_set(cpu, cpu_present_map);
142 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
144 char *bootup_cpu = "";
146 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
150 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
151 bootup_cpu = " (Bootup-CPU)";
152 boot_cpu_physical_apicid = m->mpc_apicid;
155 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
156 generic_processor_info(m->mpc_apicid, 0);
159 static void __init MP_bus_info(struct mpc_config_bus *m)
163 memcpy(str, m->mpc_bustype, 6);
165 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
167 if (strncmp(str, "ISA", 3) == 0) {
168 set_bit(m->mpc_busid, mp_bus_not_pci);
169 } else if (strncmp(str, "PCI", 3) == 0) {
170 clear_bit(m->mpc_busid, mp_bus_not_pci);
171 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
174 printk(KERN_ERR "Unknown bustype %s\n", str);
178 static int bad_ioapic(unsigned long address)
180 if (nr_ioapics >= MAX_IO_APICS) {
181 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
182 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
183 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
186 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
187 " found in table, skipping!\n");
193 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
195 if (!(m->mpc_flags & MPC_APIC_USABLE))
198 printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
201 if (bad_ioapic(m->mpc_apicaddr))
204 mp_ioapics[nr_ioapics] = *m;
208 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
210 mp_irqs[mp_irq_entries] = *m;
211 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
212 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
213 m->mpc_irqtype, m->mpc_irqflag & 3,
214 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
215 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
216 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
217 panic("Max # of irq sources exceeded!!\n");
220 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
222 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
223 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
224 m->mpc_irqtype, m->mpc_irqflag & 3,
225 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
226 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
232 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
235 int count = sizeof(*mpc);
236 unsigned char *mpt = ((unsigned char *)mpc) + count;
238 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
239 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
240 mpc->mpc_signature[0],
241 mpc->mpc_signature[1],
242 mpc->mpc_signature[2], mpc->mpc_signature[3]);
245 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
246 printk(KERN_ERR "MPTABLE: checksum error!\n");
249 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
250 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
254 if (!mpc->mpc_lapic) {
255 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
258 memcpy(str, mpc->mpc_oem, 8);
260 printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
262 memcpy(str, mpc->mpc_productid, 12);
264 printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
266 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
268 /* save the local APIC address, it might be non-default */
270 mp_lapic_addr = mpc->mpc_lapic;
276 * Now process the configuration blocks.
278 while (count < mpc->mpc_length) {
282 struct mpc_config_processor *m =
283 (struct mpc_config_processor *)mpt;
285 MP_processor_info(m);
292 struct mpc_config_bus *m =
293 (struct mpc_config_bus *)mpt;
301 struct mpc_config_ioapic *m =
302 (struct mpc_config_ioapic *)mpt;
310 struct mpc_config_intsrc *m =
311 (struct mpc_config_intsrc *)mpt;
320 struct mpc_config_lintsrc *m =
321 (struct mpc_config_lintsrc *)mpt;
329 setup_apic_routing();
331 printk(KERN_ERR "MPTABLE: no processors registered!\n");
332 return num_processors;
335 static int __init ELCR_trigger(unsigned int irq)
339 port = 0x4d0 + (irq >> 3);
340 return (inb(port) >> (irq & 7)) & 1;
343 static void __init construct_default_ioirq_mptable(int mpc_default_type)
345 struct mpc_config_intsrc intsrc;
347 int ELCR_fallback = 0;
349 intsrc.mpc_type = MP_INTSRC;
350 intsrc.mpc_irqflag = 0; /* conforming */
351 intsrc.mpc_srcbus = 0;
352 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
354 intsrc.mpc_irqtype = mp_INT;
357 * If true, we have an ISA/PCI system with no IRQ entries
358 * in the MP table. To prevent the PCI interrupts from being set up
359 * incorrectly, we try to use the ELCR. The sanity check to see if
360 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
361 * never be level sensitive, so we simply see if the ELCR agrees.
362 * If it does, we assume it's valid.
364 if (mpc_default_type == 5) {
365 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
366 "falling back to ELCR\n");
368 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
370 printk(KERN_ERR "ELCR contains invalid data... "
374 "Using ELCR to identify PCI interrupts\n");
379 for (i = 0; i < 16; i++) {
380 switch (mpc_default_type) {
382 if (i == 0 || i == 13)
383 continue; /* IRQ0 & IRQ13 not connected */
387 continue; /* IRQ2 is never connected */
392 * If the ELCR indicates a level-sensitive interrupt, we
393 * copy that information over to the MP table in the
394 * irqflag field (level sensitive, active high polarity).
397 intsrc.mpc_irqflag = 13;
399 intsrc.mpc_irqflag = 0;
402 intsrc.mpc_srcbusirq = i;
403 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
404 MP_intsrc_info(&intsrc);
407 intsrc.mpc_irqtype = mp_ExtINT;
408 intsrc.mpc_srcbusirq = 0;
409 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
410 MP_intsrc_info(&intsrc);
413 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
415 struct mpc_config_processor processor;
416 struct mpc_config_bus bus;
417 struct mpc_config_ioapic ioapic;
418 struct mpc_config_lintsrc lintsrc;
419 int linttypes[2] = { mp_ExtINT, mp_NMI };
423 * local APIC has default address
425 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
428 * 2 CPUs, numbered 0 & 1.
430 processor.mpc_type = MP_PROCESSOR;
431 processor.mpc_apicver = 0;
432 processor.mpc_cpuflag = CPU_ENABLED;
433 processor.mpc_cpufeature = 0;
434 processor.mpc_featureflag = 0;
435 processor.mpc_reserved[0] = 0;
436 processor.mpc_reserved[1] = 0;
437 for (i = 0; i < 2; i++) {
438 processor.mpc_apicid = i;
439 MP_processor_info(&processor);
442 bus.mpc_type = MP_BUS;
444 switch (mpc_default_type) {
446 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
451 memcpy(bus.mpc_bustype, "ISA ", 6);
455 if (mpc_default_type > 4) {
457 memcpy(bus.mpc_bustype, "PCI ", 6);
461 ioapic.mpc_type = MP_IOAPIC;
462 ioapic.mpc_apicid = 2;
463 ioapic.mpc_apicver = 0;
464 ioapic.mpc_flags = MPC_APIC_USABLE;
465 ioapic.mpc_apicaddr = 0xFEC00000;
466 MP_ioapic_info(&ioapic);
469 * We set up most of the low 16 IO-APIC pins according to MPS rules.
471 construct_default_ioirq_mptable(mpc_default_type);
473 lintsrc.mpc_type = MP_LINTSRC;
474 lintsrc.mpc_irqflag = 0; /* conforming */
475 lintsrc.mpc_srcbusid = 0;
476 lintsrc.mpc_srcbusirq = 0;
477 lintsrc.mpc_destapic = MP_APIC_ALL;
478 for (i = 0; i < 2; i++) {
479 lintsrc.mpc_irqtype = linttypes[i];
480 lintsrc.mpc_destapiclint = i;
481 MP_lintsrc_info(&lintsrc);
485 static struct intel_mp_floating *mpf_found;
488 * Scan the memory blocks for an SMP configuration block.
490 static void __init __get_smp_config(unsigned early)
492 struct intel_mp_floating *mpf = mpf_found;
494 if (acpi_lapic && early)
497 * ACPI supports both logical (e.g. Hyper-Threading) and physical
498 * processors, where MPS only supports physical.
500 if (acpi_lapic && acpi_ioapic) {
501 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
504 } else if (acpi_lapic)
505 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
506 "configuration information\n");
508 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
509 mpf->mpf_specification);
512 * Now see if we need to read further.
514 if (mpf->mpf_feature1 != 0) {
517 * local APIC has default address
519 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
523 printk(KERN_INFO "Default MP configuration #%d\n",
525 construct_default_ISA_mptable(mpf->mpf_feature1);
527 } else if (mpf->mpf_physptr) {
530 * Read the physical hardware table. Anything here will
531 * override the defaults.
533 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
534 smp_found_config = 0;
536 "BIOS bug, MP table errors detected!...\n");
537 printk(KERN_ERR "... disabling SMP support. "
538 "(tell your hw vendor)\n");
545 * If there are no explicit MP IRQ entries, then we are
546 * broken. We set up most of the low 16 IO-APIC pins to
547 * ISA defaults and hope it will work.
549 if (!mp_irq_entries) {
550 struct mpc_config_bus bus;
552 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
553 "using default mptable. "
554 "(tell your hw vendor)\n");
556 bus.mpc_type = MP_BUS;
558 memcpy(bus.mpc_bustype, "ISA ", 6);
561 construct_default_ioirq_mptable(0);
568 printk(KERN_INFO "Processors: %d\n", num_processors);
570 * Only use the first configuration found.
574 void __init early_get_smp_config(void)
579 void __init get_smp_config(void)
584 static int __init smp_scan_config(unsigned long base, unsigned long length,
587 extern void __bad_mpf_size(void);
588 unsigned int *bp = phys_to_virt(base);
589 struct intel_mp_floating *mpf;
591 Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
592 if (sizeof(*mpf) != 16)
596 mpf = (struct intel_mp_floating *)bp;
597 if ((*bp == SMP_MAGIC_IDENT) &&
598 (mpf->mpf_length == 1) &&
599 !mpf_checksum((unsigned char *)bp, 16) &&
600 ((mpf->mpf_specification == 1)
601 || (mpf->mpf_specification == 4))) {
603 smp_found_config = 1;
609 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
610 if (mpf->mpf_physptr)
611 reserve_bootmem_generic(mpf->mpf_physptr,
621 static void __init __find_smp_config(unsigned reserve)
623 unsigned int address;
626 * FIXME: Linux assumes you have 640K of base ram..
627 * this continues the error...
629 * 1) Scan the bottom 1K for a signature
630 * 2) Scan the top 1K of base RAM
631 * 3) Scan the 64K of bios
633 if (smp_scan_config(0x0, 0x400, reserve) ||
634 smp_scan_config(639 * 0x400, 0x400, reserve) ||
635 smp_scan_config(0xF0000, 0x10000, reserve))
638 * If it is an SMP machine we should know now.
640 * there is a real-mode segmented pointer pointing to the
641 * 4K EBDA area at 0x40E, calculate and scan it here.
643 * NOTE! There are Linux loaders that will corrupt the EBDA
644 * area, and as such this kind of SMP config may be less
645 * trustworthy, simply because the SMP table may have been
646 * stomped on during early boot. These loaders are buggy and
649 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
652 address = get_bios_ebda();
654 smp_scan_config(address, 0x400, reserve);
657 void __init early_find_smp_config(void)
659 __find_smp_config(0);
662 void __init find_smp_config(void)
664 __find_smp_config(1);
667 /* --------------------------------------------------------------------------
668 ACPI-based MP Configuration
669 -------------------------------------------------------------------------- */
673 void __init mp_register_lapic_address(u64 address)
675 mp_lapic_addr = (unsigned long)address;
676 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
677 if (boot_cpu_physical_apicid == -1U)
678 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
681 void __cpuinit mp_register_lapic(u8 id, u8 enabled)
683 struct mpc_config_processor processor;
690 if (id == boot_cpu_physical_apicid)
693 processor.mpc_type = MP_PROCESSOR;
694 processor.mpc_apicid = id;
695 processor.mpc_apicver = 0;
696 processor.mpc_cpuflag = (enabled ? CPU_ENABLED : 0);
697 processor.mpc_cpuflag |= (boot_cpu ? CPU_BOOTPROCESSOR : 0);
698 processor.mpc_cpufeature = 0;
699 processor.mpc_featureflag = 0;
700 processor.mpc_reserved[0] = 0;
701 processor.mpc_reserved[1] = 0;
703 MP_processor_info(&processor);
707 #define MP_MAX_IOAPIC_PIN 127
709 static struct mp_ioapic_routing {
713 u32 pin_programmed[4];
714 } mp_ioapic_routing[MAX_IO_APICS];
716 static int mp_find_ioapic(int gsi)
720 /* Find the IOAPIC that manages this GSI. */
721 for (i = 0; i < nr_ioapics; i++) {
722 if ((gsi >= mp_ioapic_routing[i].gsi_base)
723 && (gsi <= mp_ioapic_routing[i].gsi_end))
727 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
731 static u8 uniq_ioapic_id(u8 id)
734 DECLARE_BITMAP(used, 256);
735 bitmap_zero(used, 256);
736 for (i = 0; i < nr_ioapics; i++) {
737 struct mpc_config_ioapic *ia = &mp_ioapics[i];
738 __set_bit(ia->mpc_apicid, used);
740 if (!test_bit(id, used))
742 return find_first_zero_bit(used, 256);
745 void __init mp_register_ioapic(u8 id, u32 address, u32 gsi_base)
749 if (bad_ioapic(address))
754 mp_ioapics[idx].mpc_type = MP_IOAPIC;
755 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
756 mp_ioapics[idx].mpc_apicaddr = address;
758 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
759 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
760 mp_ioapics[idx].mpc_apicver = 0;
763 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
764 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
766 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
767 mp_ioapic_routing[idx].gsi_base = gsi_base;
768 mp_ioapic_routing[idx].gsi_end = gsi_base +
769 io_apic_get_redir_entries(idx);
771 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
772 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
773 mp_ioapics[idx].mpc_apicaddr,
774 mp_ioapic_routing[idx].gsi_base,
775 mp_ioapic_routing[idx].gsi_end);
780 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
782 struct mpc_config_intsrc intsrc;
787 * Convert 'gsi' to 'ioapic.pin'.
789 ioapic = mp_find_ioapic(gsi);
792 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
795 * TBD: This check is for faulty timer entries, where the override
796 * erroneously sets the trigger to level, resulting in a HUGE
797 * increase of timer interrupts!
799 if ((bus_irq == 0) && (trigger == 3))
802 intsrc.mpc_type = MP_INTSRC;
803 intsrc.mpc_irqtype = mp_INT;
804 intsrc.mpc_irqflag = (trigger << 2) | polarity;
805 intsrc.mpc_srcbus = MP_ISA_BUS;
806 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
807 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
808 intsrc.mpc_dstirq = pin; /* INTIN# */
810 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
811 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
812 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
813 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
815 mp_irqs[mp_irq_entries] = intsrc;
816 if (++mp_irq_entries == MAX_IRQ_SOURCES)
817 panic("Max # of irq sources exceeded!\n");
820 void __init mp_config_acpi_legacy_irqs(void)
822 struct mpc_config_intsrc intsrc;
827 * Fabricate the legacy ISA bus (bus #31).
829 set_bit(MP_ISA_BUS, mp_bus_not_pci);
832 * Locate the IOAPIC that manages the ISA IRQs (0-15).
834 ioapic = mp_find_ioapic(0);
838 intsrc.mpc_type = MP_INTSRC;
839 intsrc.mpc_irqflag = 0; /* Conforming */
840 intsrc.mpc_srcbus = MP_ISA_BUS;
841 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
844 * Use the default configuration for the IRQs 0-15. Unless
845 * overridden by (MADT) interrupt source override entries.
847 for (i = 0; i < 16; i++) {
850 for (idx = 0; idx < mp_irq_entries; idx++) {
851 struct mpc_config_intsrc *irq = mp_irqs + idx;
853 /* Do we already have a mapping for this ISA IRQ? */
854 if (irq->mpc_srcbus == MP_ISA_BUS
855 && irq->mpc_srcbusirq == i)
858 /* Do we already have a mapping for this IOAPIC pin */
859 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
860 (irq->mpc_dstirq == i))
864 if (idx != mp_irq_entries) {
865 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
866 continue; /* IRQ already used */
869 intsrc.mpc_irqtype = mp_INT;
870 intsrc.mpc_srcbusirq = i; /* Identity mapped */
871 intsrc.mpc_dstirq = i;
873 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
874 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
875 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
876 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
879 mp_irqs[mp_irq_entries] = intsrc;
880 if (++mp_irq_entries == MAX_IRQ_SOURCES)
881 panic("Max # of irq sources exceeded!\n");
885 int mp_register_gsi(u32 gsi, int triggering, int polarity)
891 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
894 /* Don't set up the ACPI SCI because it's already set up */
895 if (acpi_gbl_FADT.sci_interrupt == gsi)
898 ioapic = mp_find_ioapic(gsi);
900 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
904 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
907 * Avoid pin reprogramming. PRTs typically include entries
908 * with redundant pin->gsi mappings (but unique PCI devices);
909 * we only program the IOAPIC on the first.
911 bit = ioapic_pin % 32;
912 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
914 printk(KERN_ERR "Invalid reference to IOAPIC pin "
915 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
919 if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
920 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
921 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
925 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
927 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
928 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
929 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
932 #endif /* CONFIG_ACPI */