2 * Intel CPU Microcode Update Driver for Linux
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
7 * This driver allows to upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
15 * http://developer.intel.com/design/pentium4/manuals/253668.htm
17 * For more information, go to http://www.urbanmyth.org/microcode
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
24 * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
26 * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
27 * Added read() support + cleanups.
28 * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
29 * Added 'device trimming' support. open(O_WRONLY) zeroes
30 * and frees the saved copy of applied microcode.
31 * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
32 * Made to use devfs (/dev/cpu/microcode) + cleanups.
33 * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
34 * Added misc device support (now uses both devfs and misc).
35 * Added MICROCODE_IOCFREE ioctl to clear memory.
36 * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
37 * Messages for error cases (non Intel & no suitable microcode).
38 * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
39 * Removed ->release(). Removed exclusive open and status bitmap.
40 * Added microcode_rwsem to serialize read()/write()/ioctl().
41 * Removed global kernel lock usage.
42 * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
43 * Write 0 to 0x8B msr and then cpuid before reading revision,
44 * so that it works even if there were no update done by the
45 * BIOS. Otherwise, reading from 0x8B gives junk (which happened
46 * to be 0 on my machine which is why it worked even when I
47 * disabled update by the BIOS)
48 * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
49 * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
50 * Tigran Aivazian <tigran@veritas.com>
51 * Intel Pentium 4 processor support and bugfixes.
52 * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
53 * Bugfix for HT (Hyper-Threading) enabled processors
54 * whereby processor resources are shared by all logical processors
55 * in a single CPU package.
56 * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
57 * Tigran Aivazian <tigran@veritas.com>,
58 * Serialize updates as required on HT processors due to speculative
59 * nature of implementation.
60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
61 * Fix the panic when writing zero-length microcode chunk.
62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
63 * Jun Nakajima <jun.nakajima@intel.com>
64 * Support for the microcode updates in the new format.
65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
67 * because we no longer hold a copy of applied microcode
69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
71 * Thanks to Stuart Swales for pointing out this bug.
74 //#define DEBUG /* pr_debug */
75 #include <linux/capability.h>
76 #include <linux/kernel.h>
77 #include <linux/init.h>
78 #include <linux/sched.h>
79 #include <linux/smp_lock.h>
80 #include <linux/cpumask.h>
81 #include <linux/module.h>
82 #include <linux/slab.h>
83 #include <linux/vmalloc.h>
84 #include <linux/miscdevice.h>
85 #include <linux/spinlock.h>
88 #include <linux/mutex.h>
89 #include <linux/cpu.h>
90 #include <linux/firmware.h>
91 #include <linux/platform_device.h>
94 #include <asm/uaccess.h>
95 #include <asm/processor.h>
96 #include <asm/microcode.h>
98 MODULE_DESCRIPTION("Microcode Update Driver");
99 MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
100 MODULE_LICENSE("GPL");
102 #define DEFAULT_UCODE_DATASIZE (2000) /* 2000 bytes */
103 #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel)) /* 48 bytes */
104 #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE) /* 2048 bytes */
105 #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable)) /* 20 bytes */
106 #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature)) /* 12 bytes */
107 #define DWSIZE (sizeof(u32))
108 #define get_totalsize(mc) \
109 (((struct microcode_intel *)mc)->hdr.totalsize ? \
110 ((struct microcode_intel *)mc)->hdr.totalsize : \
111 DEFAULT_UCODE_TOTALSIZE)
113 #define get_datasize(mc) \
114 (((struct microcode_intel *)mc)->hdr.datasize ? \
115 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
117 #define sigmatch(s1, s2, p1, p2) \
118 (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
120 #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
122 /* serialize access to the physical write to MSR 0x79 */
123 static DEFINE_SPINLOCK(microcode_update_lock);
125 /* no concurrent ->write()s are allowed on /dev/cpu/microcode */
126 extern struct mutex microcode_mutex;
128 extern struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
130 static void collect_cpu_info(int cpu_num)
132 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
133 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
136 /* We should bind the task to the CPU */
137 BUG_ON(raw_smp_processor_id() != cpu_num);
138 uci->pf = uci->rev = 0;
139 uci->mc.mc_intel = NULL;
142 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
143 cpu_has(c, X86_FEATURE_IA64)) {
144 printk(KERN_ERR "microcode: CPU%d not a capable Intel "
145 "processor\n", cpu_num);
150 uci->sig = cpuid_eax(0x00000001);
152 if ((c->x86_model >= 5) || (c->x86 > 6)) {
153 /* get processor flags from MSR 0x17 */
154 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
155 uci->pf = 1 << ((val[1] >> 18) & 7);
158 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
159 /* see notes above for revision 1.07. Apparent chip bug */
161 /* get the current revision from MSR 0x8B */
162 rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev);
163 pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
164 uci->sig, uci->pf, uci->rev);
167 static inline int microcode_update_match(int cpu_num,
168 struct microcode_header_intel *mc_header, int sig, int pf)
170 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
172 if (!sigmatch(sig, uci->sig, pf, uci->pf)
173 || mc_header->rev <= uci->rev)
178 static int microcode_sanity_check(void *mc)
180 struct microcode_header_intel *mc_header = mc;
181 struct extended_sigtable *ext_header = NULL;
182 struct extended_signature *ext_sig;
183 unsigned long total_size, data_size, ext_table_size;
184 int sum, orig_sum, ext_sigcount = 0, i;
186 total_size = get_totalsize(mc_header);
187 data_size = get_datasize(mc_header);
188 if (data_size + MC_HEADER_SIZE > total_size) {
189 printk(KERN_ERR "microcode: error! "
190 "Bad data size in microcode data file\n");
194 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
195 printk(KERN_ERR "microcode: error! "
196 "Unknown microcode update format\n");
199 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
200 if (ext_table_size) {
201 if ((ext_table_size < EXT_HEADER_SIZE)
202 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
203 printk(KERN_ERR "microcode: error! "
204 "Small exttable size in microcode data file\n");
207 ext_header = mc + MC_HEADER_SIZE + data_size;
208 if (ext_table_size != exttable_size(ext_header)) {
209 printk(KERN_ERR "microcode: error! "
210 "Bad exttable size in microcode data file\n");
213 ext_sigcount = ext_header->count;
216 /* check extended table checksum */
217 if (ext_table_size) {
218 int ext_table_sum = 0;
219 int *ext_tablep = (int *)ext_header;
221 i = ext_table_size / DWSIZE;
223 ext_table_sum += ext_tablep[i];
225 printk(KERN_WARNING "microcode: aborting, "
226 "bad extended signature table checksum\n");
231 /* calculate the checksum */
233 i = (MC_HEADER_SIZE + data_size) / DWSIZE;
235 orig_sum += ((int *)mc)[i];
237 printk(KERN_ERR "microcode: aborting, bad checksum\n");
242 /* check extended signature checksum */
243 for (i = 0; i < ext_sigcount; i++) {
244 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
245 EXT_SIGNATURE_SIZE * i;
247 - (mc_header->sig + mc_header->pf + mc_header->cksum)
248 + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
250 printk(KERN_ERR "microcode: aborting, bad checksum\n");
258 * return 0 - no update found
259 * return 1 - found update
262 static int get_matching_microcode(void *mc, int cpu)
264 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
265 struct microcode_header_intel *mc_header = mc;
266 struct extended_sigtable *ext_header;
267 unsigned long total_size = get_totalsize(mc_header);
269 struct extended_signature *ext_sig;
272 if (microcode_update_match(cpu, mc_header,
273 mc_header->sig, mc_header->pf))
276 if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
279 ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
280 ext_sigcount = ext_header->count;
281 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
282 for (i = 0; i < ext_sigcount; i++) {
283 if (microcode_update_match(cpu, mc_header,
284 ext_sig->sig, ext_sig->pf))
290 pr_debug("microcode: CPU%d found a matching microcode update with"
291 " version 0x%x (current=0x%x)\n",
292 cpu, mc_header->rev, uci->rev);
293 new_mc = vmalloc(total_size);
295 printk(KERN_ERR "microcode: error! Can not allocate memory\n");
299 /* free previous update file */
300 vfree(uci->mc.mc_intel);
302 memcpy(new_mc, mc, total_size);
303 uci->mc.mc_intel = new_mc;
307 static void apply_microcode(int cpu)
311 int cpu_num = raw_smp_processor_id();
312 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
314 /* We should bind the task to the CPU */
315 BUG_ON(cpu_num != cpu);
317 if (uci->mc.mc_intel == NULL)
320 /* serialize access to the physical write to MSR 0x79 */
321 spin_lock_irqsave(µcode_update_lock, flags);
323 /* write microcode via MSR 0x79 */
324 wrmsr(MSR_IA32_UCODE_WRITE,
325 (unsigned long) uci->mc.mc_intel->bits,
326 (unsigned long) uci->mc.mc_intel->bits >> 16 >> 16);
327 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
329 /* see notes above for revision 1.07. Apparent chip bug */
332 /* get the current revision from MSR 0x8B */
333 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
335 spin_unlock_irqrestore(µcode_update_lock, flags);
336 if (val[1] != uci->mc.mc_intel->hdr.rev) {
337 printk(KERN_ERR "microcode: CPU%d update from revision "
338 "0x%x to 0x%x failed\n", cpu_num, uci->rev, val[1]);
341 printk(KERN_INFO "microcode: CPU%d updated from revision "
342 "0x%x to 0x%x, date = %08x \n",
343 cpu_num, uci->rev, val[1], uci->mc.mc_intel->hdr.date);
347 #ifdef CONFIG_MICROCODE_OLD_INTERFACE
348 extern void __user *user_buffer; /* user area microcode data buffer */
349 extern unsigned int user_buffer_size; /* it's size */
351 static long get_next_ucode(void **mc, long offset)
353 struct microcode_header_intel mc_header;
354 unsigned long total_size;
357 if (offset >= user_buffer_size)
359 if (copy_from_user(&mc_header, user_buffer + offset, MC_HEADER_SIZE)) {
360 printk(KERN_ERR "microcode: error! Can not read user data\n");
363 total_size = get_totalsize(&mc_header);
364 if (offset + total_size > user_buffer_size) {
365 printk(KERN_ERR "microcode: error! Bad total size in microcode "
369 *mc = vmalloc(total_size);
372 if (copy_from_user(*mc, user_buffer + offset, total_size)) {
373 printk(KERN_ERR "microcode: error! Can not read user data\n");
377 return offset + total_size;
381 static long get_next_ucode_from_buffer(void **mc, const u8 *buf,
382 unsigned long size, long offset)
384 struct microcode_header_intel *mc_header;
385 unsigned long total_size;
390 mc_header = (struct microcode_header_intel *)(buf + offset);
391 total_size = get_totalsize(mc_header);
393 if (offset + total_size > size) {
394 printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
398 *mc = vmalloc(total_size);
400 printk(KERN_ERR "microcode: error! Can not allocate memory\n");
403 memcpy(*mc, buf + offset, total_size);
404 return offset + total_size;
407 /* fake device for request_firmware */
408 extern struct platform_device *microcode_pdev;
410 static int cpu_request_microcode(int cpu)
413 struct cpuinfo_x86 *c = &cpu_data(cpu);
414 const struct firmware *firmware;
421 /* We should bind the task to the CPU */
422 BUG_ON(cpu != raw_smp_processor_id());
423 sprintf(name, "intel-ucode/%02x-%02x-%02x",
424 c->x86, c->x86_model, c->x86_mask);
425 error = request_firmware(&firmware, name, µcode_pdev->dev);
427 pr_debug("microcode: data file %s load failed\n", name);
430 buf = firmware->data;
431 size = firmware->size;
432 while ((offset = get_next_ucode_from_buffer(&mc, buf, size, offset))
434 error = microcode_sanity_check(mc);
437 error = get_matching_microcode(mc, cpu);
441 * It's possible the data file has multiple matching ucode,
442 * lets keep searching till the latest version
445 apply_microcode(cpu);
454 release_firmware(firmware);
459 static int apply_microcode_check_cpu(int cpu)
461 struct cpuinfo_x86 *c = &cpu_data(cpu);
462 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
464 cpumask_of_cpu_ptr(newmask, cpu);
468 /* Check if the microcode is available */
469 if (!uci->mc.mc_intel)
472 old = current->cpus_allowed;
473 set_cpus_allowed_ptr(current, newmask);
475 /* Check if the microcode we have in memory matches the CPU */
476 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
477 cpu_has(c, X86_FEATURE_IA64) || uci->sig != cpuid_eax(0x00000001))
480 if (!err && ((c->x86_model >= 5) || (c->x86 > 6))) {
481 /* get processor flags from MSR 0x17 */
482 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
483 if (uci->pf != (1 << ((val[1] >> 18) & 7)))
488 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
489 /* see notes above for revision 1.07. Apparent chip bug */
491 /* get the current revision from MSR 0x8B */
492 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
493 if (uci->rev != val[1])
498 apply_microcode(cpu);
500 printk(KERN_ERR "microcode: Could not apply microcode to CPU%d:"
501 " sig=0x%x, pf=0x%x, rev=0x%x\n",
502 cpu, uci->sig, uci->pf, uci->rev);
504 set_cpus_allowed_ptr(current, &old);
508 static void microcode_fini_cpu(int cpu)
510 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
512 mutex_lock(µcode_mutex);
514 vfree(uci->mc.mc_intel);
515 uci->mc.mc_intel = NULL;
516 mutex_unlock(µcode_mutex);
519 static struct microcode_ops microcode_intel_ops = {
520 .get_next_ucode = get_next_ucode,
521 .get_matching_microcode = get_matching_microcode,
522 .microcode_sanity_check = microcode_sanity_check,
523 .apply_microcode_check_cpu = apply_microcode_check_cpu,
524 .cpu_request_microcode = cpu_request_microcode,
525 .collect_cpu_info = collect_cpu_info,
526 .apply_microcode = apply_microcode,
527 .microcode_fini_cpu = microcode_fini_cpu,
530 static int __init microcode_intel_module_init(void)
532 struct cpuinfo_x86 *c = &cpu_data(get_cpu());
534 if (c->x86_vendor == X86_VENDOR_INTEL)
535 return microcode_init(µcode_intel_ops, THIS_MODULE);
540 static void __exit microcode_intel_module_exit(void)
545 module_init(microcode_intel_module_init)
546 module_exit(microcode_intel_module_exit)