1 #include <linux/linkage.h>
2 #include <linux/errno.h>
3 #include <linux/signal.h>
4 #include <linux/sched.h>
5 #include <linux/ioport.h>
6 #include <linux/interrupt.h>
7 #include <linux/timex.h>
8 #include <linux/slab.h>
9 #include <linux/random.h>
10 #include <linux/init.h>
11 #include <linux/kernel_stat.h>
12 #include <linux/sysdev.h>
13 #include <linux/bitops.h>
16 #include <asm/atomic.h>
17 #include <asm/system.h>
19 #include <asm/hw_irq.h>
20 #include <asm/pgtable.h>
21 #include <asm/delay.h>
24 #include <asm/i8259.h>
27 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
28 * (these are usually mapped to vectors 0x30-0x3f)
32 * The IO-APIC gives us many more interrupt sources. Most of these
33 * are unused but an SMP system is supposed to have enough memory ...
34 * sometimes (mostly wrt. hw bugs) we get corrupted vectors all
35 * across the spectrum, so we really want to be prepared to get all
36 * of these. Plus, more powerful systems might have more than 64
39 * (these are usually mapped into the 0x30-0xff vector range)
43 * IRQ2 is cascade interrupt to second interrupt controller
46 static struct irqaction irq2 = {
48 .mask = CPU_MASK_NONE,
51 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
52 [0 ... IRQ0_VECTOR - 1] = -1,
69 [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1
72 int vector_used_by_percpu_irq(unsigned int vector)
76 for_each_online_cpu(cpu) {
77 if (per_cpu(vector_irq, cpu)[vector] != -1)
84 void __init init_ISA_irqs(void)
91 for (i = 0; i < NR_IRQS_LEGACY; i++) {
92 struct irq_desc *desc = irq_to_desc(i);
94 desc->status = IRQ_DISABLED;
99 * 16 old-style INTA-cycle interrupts:
101 set_irq_chip_and_handler_name(i, &i8259A_chip,
102 handle_level_irq, "XT");
106 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
108 static void __init smp_intr_init(void)
112 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
113 * IPI, driven by wakeup.
115 alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
117 /* IPIs for invalidation */
118 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0);
119 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1);
120 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2);
121 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3);
122 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4);
123 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5);
124 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6);
125 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7);
127 /* IPI for generic function call */
128 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
130 /* IPI for generic single function call */
131 alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR,
132 call_function_single_interrupt);
134 /* Low priority IPI to cleanup after moving an irq */
135 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
136 set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors);
140 static void __init apic_intr_init(void)
144 alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
145 alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
147 /* self generated IPI for local APIC timer */
148 alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
150 /* IPI vectors for APIC spurious and error interrupts */
151 alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
152 alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
155 void __init native_init_IRQ(void)
161 * Cover the whole vector space, no vector can escape
162 * us. (some of these will be overridden and become
163 * 'special' SMP interrupts)
165 for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) {
166 int vector = FIRST_EXTERNAL_VECTOR + i;
167 if (vector != IA32_SYSCALL_VECTOR)
168 set_intr_gate(vector, interrupt[i]);