1 #include <linux/errno.h>
2 #include <linux/signal.h>
3 #include <linux/sched.h>
4 #include <linux/ioport.h>
5 #include <linux/interrupt.h>
6 #include <linux/slab.h>
7 #include <linux/random.h>
8 #include <linux/init.h>
9 #include <linux/kernel_stat.h>
10 #include <linux/sysdev.h>
11 #include <linux/bitops.h>
13 #include <asm/atomic.h>
14 #include <asm/system.h>
16 #include <asm/timer.h>
17 #include <asm/pgtable.h>
18 #include <asm/delay.h>
21 #include <asm/arch_hooks.h>
22 #include <asm/i8259.h>
27 * Note that on a 486, we don't want to do a SIGFPE on an irq13
28 * as the irq is unreliable, and exception 16 works correctly
29 * (ie as explained in the intel literature). On a 386, you
30 * can't use exception 16 due to bad IBM design, so we have to
31 * rely on the less exact irq13.
33 * Careful.. Not only is IRQ13 unreliable, but it is also
34 * leads to races. IBM designers who came up with it should
39 static irqreturn_t math_error_irq(int cpl, void *dev_id)
41 extern void math_error(void __user *);
43 if (ignore_fpu_irq || !boot_cpu_data.hard_math)
45 math_error((void __user *)get_irq_regs()->ip);
50 * New motherboards sometimes make IRQ 13 be a PCI interrupt,
51 * so allow interrupt sharing.
53 static struct irqaction fpu_irq = {
54 .handler = math_error_irq,
55 .mask = CPU_MASK_NONE,
59 void __init init_ISA_irqs (void)
63 #ifdef CONFIG_X86_LOCAL_APIC
69 * 16 old-style INTA-cycle interrupts:
71 for (i = 0; i < 16; i++) {
72 /* first time call this irq_desc */
73 struct irq_desc *desc = irq_to_desc_alloc(i);
75 desc->status = IRQ_DISABLED;
79 set_irq_chip_and_handler_name(i, &i8259A_chip,
80 handle_level_irq, "XT");
85 * IRQ2 is cascade interrupt to second interrupt controller
87 static struct irqaction irq2 = {
89 .mask = CPU_MASK_NONE,
93 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
94 [0 ... IRQ0_VECTOR - 1] = -1,
111 [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1
114 /* Overridden in paravirt.c */
115 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
117 void __init native_init_IRQ(void)
121 /* all the set up before the call gates are initialised */
122 pre_intr_init_hook();
125 * Cover the whole vector space, no vector can escape
126 * us. (some of these will be overridden and become
127 * 'special' SMP interrupts)
129 for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
130 /* SYSCALL_VECTOR was reserved in trap_init. */
131 if (i != SYSCALL_VECTOR)
132 set_intr_gate(i, interrupt[i]);
136 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_SMP)
138 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
139 * IPI, driven by wakeup.
141 alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
143 /* IPI for invalidation */
144 alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
146 /* IPI for generic function call */
147 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
149 /* IPI for single call function */
150 set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, call_function_single_interrupt);
152 /* Low priority IPI to cleanup after moving an irq */
153 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
156 #ifdef CONFIG_X86_LOCAL_APIC
157 /* self generated IPI for local APIC timer */
158 alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
160 /* IPI vectors for APIC spurious and error interrupts */
161 alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
162 alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
165 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_MCE_P4THERMAL)
166 /* thermal monitor LVT interrupt */
167 alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
173 /* setup after call gates are initialised (usually add in
174 * the architecture specific gates)
179 * External FPU? Set up irq13 if so, for
180 * original braindamaged IBM FERR coupling.
182 if (boot_cpu_data.hard_math && !cpu_has_fpu)
183 setup_irq(FPU_IRQ, &fpu_irq);
185 irq_ctx_init(smp_processor_id());