2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
12 #include <asm/sigcontext.h>
13 #include <asm/processor.h>
14 #include <asm/math_emu.h>
15 #include <asm/uaccess.h>
16 #include <asm/ptrace.h>
21 # include <asm/sigcontext32.h>
22 # include <asm/user32.h>
24 # define save_i387_xstate_ia32 save_i387_xstate
25 # define restore_i387_xstate_ia32 restore_i387_xstate
26 # define _fpstate_ia32 _fpstate
27 # define _xstate_ia32 _xstate
28 # define sig_xstate_ia32_size sig_xstate_size
29 # define fx_sw_reserved_ia32 fx_sw_reserved
30 # define user_i387_ia32_struct user_i387_struct
31 # define user32_fxsr_struct user_fxsr_struct
34 #ifdef CONFIG_MATH_EMULATION
35 # define HAVE_HWFP (boot_cpu_data.hard_math)
40 static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
41 unsigned int xstate_size;
42 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
43 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
45 void __cpuinit mxcsr_feature_mask_init(void)
47 unsigned long mask = 0;
51 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
52 asm volatile("fxsave %0" : : "m" (fx_scratch));
53 mask = fx_scratch.mxcsr_mask;
57 mxcsr_feature_mask &= mask;
61 void __init init_thread_xstate(void)
64 xstate_size = sizeof(struct i387_soft_struct);
74 xstate_size = sizeof(struct i387_fxsave_struct);
77 xstate_size = sizeof(struct i387_fsave_struct);
83 * Called at bootup to set up the initial FPU state that is later cloned
86 void __cpuinit fpu_init(void)
88 unsigned long oldcr0 = read_cr0();
90 set_in_cr4(X86_CR4_OSFXSR);
91 set_in_cr4(X86_CR4_OSXMMEXCPT);
93 write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
96 * Boot processor to setup the FP and extended state context info.
98 if (!smp_processor_id())
102 mxcsr_feature_mask_init();
103 /* clean state in init */
105 current_thread_info()->status = TS_XSAVE;
107 current_thread_info()->status = 0;
110 #endif /* CONFIG_X86_64 */
113 * The _current_ task is using the FPU for the first time
114 * so initialize it and set the mxcsr to its default
115 * value at reset if we support XMM instructions and then
116 * remeber the current task has used the FPU.
118 int init_fpu(struct task_struct *tsk)
120 if (tsk_used_math(tsk)) {
121 if (HAVE_HWFP && tsk == current)
127 * Memory allocation at the first usage of the FPU and other state.
129 if (!tsk->thread.xstate) {
130 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
132 if (!tsk->thread.xstate)
138 memset(tsk->thread.xstate, 0, xstate_size);
140 set_stopped_child_used_math(tsk);
146 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
148 memset(fx, 0, xstate_size);
151 fx->mxcsr = MXCSR_DEFAULT;
153 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
154 memset(fp, 0, xstate_size);
155 fp->cwd = 0xffff037fu;
156 fp->swd = 0xffff0000u;
157 fp->twd = 0xffffffffu;
158 fp->fos = 0xffff0000u;
161 * Only the device not available exception or ptrace can call init_fpu.
163 set_stopped_child_used_math(tsk);
167 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
169 return tsk_used_math(target) ? regset->n : 0;
172 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
174 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
177 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
178 unsigned int pos, unsigned int count,
179 void *kbuf, void __user *ubuf)
186 ret = init_fpu(target);
190 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
191 &target->thread.xstate->fxsave, 0, -1);
194 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
195 unsigned int pos, unsigned int count,
196 const void *kbuf, const void __user *ubuf)
203 ret = init_fpu(target);
207 set_stopped_child_used_math(target);
209 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
210 &target->thread.xstate->fxsave, 0, -1);
213 * mxcsr reserved bits must be masked to zero for security reasons.
215 target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
220 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
223 * FPU tag word conversions.
226 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
228 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
230 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
232 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
233 /* and move the valid bits to the lower byte. */
234 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
235 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
236 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
241 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
242 #define FP_EXP_TAG_VALID 0
243 #define FP_EXP_TAG_ZERO 1
244 #define FP_EXP_TAG_SPECIAL 2
245 #define FP_EXP_TAG_EMPTY 3
247 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
250 u32 tos = (fxsave->swd >> 11) & 7;
251 u32 twd = (unsigned long) fxsave->twd;
253 u32 ret = 0xffff0000u;
256 for (i = 0; i < 8; i++, twd >>= 1) {
258 st = FPREG_ADDR(fxsave, (i - tos) & 7);
260 switch (st->exponent & 0x7fff) {
262 tag = FP_EXP_TAG_SPECIAL;
265 if (!st->significand[0] &&
266 !st->significand[1] &&
267 !st->significand[2] &&
269 tag = FP_EXP_TAG_ZERO;
271 tag = FP_EXP_TAG_SPECIAL;
274 if (st->significand[3] & 0x8000)
275 tag = FP_EXP_TAG_VALID;
277 tag = FP_EXP_TAG_SPECIAL;
281 tag = FP_EXP_TAG_EMPTY;
283 ret |= tag << (2 * i);
289 * FXSR floating point environment conversions.
293 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
295 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
296 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
297 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
300 env->cwd = fxsave->cwd | 0xffff0000u;
301 env->swd = fxsave->swd | 0xffff0000u;
302 env->twd = twd_fxsr_to_i387(fxsave);
305 env->fip = fxsave->rip;
306 env->foo = fxsave->rdp;
307 if (tsk == current) {
309 * should be actually ds/cs at fpu exception time, but
310 * that information is not available in 64bit mode.
312 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
313 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
315 struct pt_regs *regs = task_pt_regs(tsk);
317 env->fos = 0xffff0000 | tsk->thread.ds;
321 env->fip = fxsave->fip;
322 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
323 env->foo = fxsave->foo;
324 env->fos = fxsave->fos;
327 for (i = 0; i < 8; ++i)
328 memcpy(&to[i], &from[i], sizeof(to[0]));
331 static void convert_to_fxsr(struct task_struct *tsk,
332 const struct user_i387_ia32_struct *env)
335 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
336 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
337 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
340 fxsave->cwd = env->cwd;
341 fxsave->swd = env->swd;
342 fxsave->twd = twd_i387_to_fxsr(env->twd);
343 fxsave->fop = (u16) ((u32) env->fcs >> 16);
345 fxsave->rip = env->fip;
346 fxsave->rdp = env->foo;
347 /* cs and ds ignored */
349 fxsave->fip = env->fip;
350 fxsave->fcs = (env->fcs & 0xffff);
351 fxsave->foo = env->foo;
352 fxsave->fos = env->fos;
355 for (i = 0; i < 8; ++i)
356 memcpy(&to[i], &from[i], sizeof(from[0]));
359 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
360 unsigned int pos, unsigned int count,
361 void *kbuf, void __user *ubuf)
363 struct user_i387_ia32_struct env;
366 ret = init_fpu(target);
371 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
374 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
375 &target->thread.xstate->fsave, 0,
379 if (kbuf && pos == 0 && count == sizeof(env)) {
380 convert_from_fxsr(kbuf, target);
384 convert_from_fxsr(&env, target);
386 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
389 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
390 unsigned int pos, unsigned int count,
391 const void *kbuf, const void __user *ubuf)
393 struct user_i387_ia32_struct env;
396 ret = init_fpu(target);
400 set_stopped_child_used_math(target);
403 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
406 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
407 &target->thread.xstate->fsave, 0, -1);
410 if (pos > 0 || count < sizeof(env))
411 convert_from_fxsr(&env, target);
413 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
415 convert_to_fxsr(target, &env);
421 * Signal frame handlers.
424 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
426 struct task_struct *tsk = current;
427 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
429 fp->status = fp->swd;
430 if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
435 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
437 struct task_struct *tsk = current;
438 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
439 struct user_i387_ia32_struct env;
442 convert_from_fxsr(&env, tsk);
443 if (__copy_to_user(buf, &env, sizeof(env)))
446 err |= __put_user(fx->swd, &buf->status);
447 err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
451 if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
456 static int save_i387_xsave(void __user *buf)
458 struct _fpstate_ia32 __user *fx = buf;
461 if (save_i387_fxsave(fx) < 0)
464 err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
465 sizeof(struct _fpx_sw_bytes));
466 err |= __put_user(FP_XSTATE_MAGIC2,
467 (__u32 __user *) (buf + sig_xstate_ia32_size
468 - FP_XSTATE_MAGIC2_SIZE));
475 int save_i387_xstate_ia32(void __user *buf)
477 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
478 struct task_struct *tsk = current;
483 if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
486 * This will cause a "finit" to be triggered by the next
487 * attempted FPU operation by the 'current' process.
492 return fpregs_soft_get(current, NULL,
493 0, sizeof(struct user_i387_ia32_struct),
500 return save_i387_xsave(fp);
502 return save_i387_fxsave(fp);
504 return save_i387_fsave(fp);
507 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
509 struct task_struct *tsk = current;
511 return __copy_from_user(&tsk->thread.xstate->fsave, buf,
512 sizeof(struct i387_fsave_struct));
515 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
518 struct task_struct *tsk = current;
519 struct user_i387_ia32_struct env;
522 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
524 /* mxcsr reserved bits must be masked to zero for security reasons */
525 tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
526 if (err || __copy_from_user(&env, buf, sizeof(env)))
528 convert_to_fxsr(tsk, &env);
533 static int restore_i387_xsave(void __user *buf)
535 struct _fpx_sw_bytes fx_sw_user;
536 struct _fpstate_ia32 __user *fx_user =
537 ((struct _fpstate_ia32 __user *) buf);
538 struct i387_fxsave_struct __user *fx =
539 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
540 struct xsave_hdr_struct *xsave_hdr =
541 ¤t->thread.xstate->xsave.xsave_hdr;
542 unsigned int lmask, hmask;
545 if (check_for_xstate(fx, buf, &fx_sw_user))
548 lmask = fx_sw_user.xstate_bv;
549 hmask = fx_sw_user.xstate_bv >> 32;
551 err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
553 xsave_hdr->xstate_bv &= (pcntxt_lmask | (((u64) pcntxt_hmask) << 32));
555 * These bits must be zero.
557 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
560 * Init the state that is not present in the memory layout
561 * and enabled by the OS.
563 lmask = ~(pcntxt_lmask & ~lmask);
564 hmask = ~(pcntxt_hmask & ~hmask);
565 xsave_hdr->xstate_bv &= (lmask | (((u64) hmask) << 32));
570 * Couldn't find the extended state information in the memory
571 * layout. Restore the FP/SSE and init the other extended state
574 xsave_hdr->xstate_bv = XSTATE_FPSSE;
575 return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
578 int restore_i387_xstate_ia32(void __user *buf)
581 struct task_struct *tsk = current;
582 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
595 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
606 err = restore_i387_xsave(buf);
607 else if (cpu_has_fxsr)
608 err = restore_i387_fxsave(fp, sizeof(struct
609 i387_fxsave_struct));
611 err = restore_i387_fsave(fp);
613 err = fpregs_soft_set(current, NULL,
614 0, sizeof(struct user_i387_ia32_struct),
623 * FPU state for core dumps.
624 * This is only used for a.out dumps now.
625 * It is declared generically using elf_fpregset_t (which is
626 * struct user_i387_struct) but is in fact only used for 32-bit
627 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
629 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
631 struct task_struct *tsk = current;
634 fpvalid = !!used_math();
636 fpvalid = !fpregs_get(tsk, NULL,
637 0, sizeof(struct user_i387_ia32_struct),
642 EXPORT_SYMBOL(dump_fpu);
644 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */