2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
12 #include <asm/sigcontext.h>
13 #include <asm/processor.h>
14 #include <asm/math_emu.h>
15 #include <asm/uaccess.h>
16 #include <asm/ptrace.h>
21 # include <asm/sigcontext32.h>
22 # include <asm/user32.h>
24 # define save_i387_xstate_ia32 save_i387_xstate
25 # define restore_i387_xstate_ia32 restore_i387_xstate
26 # define _fpstate_ia32 _fpstate
27 # define _xstate_ia32 _xstate
28 # define sig_xstate_ia32_size sig_xstate_size
29 # define user_i387_ia32_struct user_i387_struct
30 # define user32_fxsr_struct user_fxsr_struct
33 #ifdef CONFIG_MATH_EMULATION
34 # define HAVE_HWFP (boot_cpu_data.hard_math)
39 static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
40 unsigned int xstate_size;
41 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
42 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
44 void __cpuinit mxcsr_feature_mask_init(void)
46 unsigned long mask = 0;
50 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
51 asm volatile("fxsave %0" : : "m" (fx_scratch));
52 mask = fx_scratch.mxcsr_mask;
56 mxcsr_feature_mask &= mask;
60 void __init init_thread_xstate(void)
63 xstate_size = sizeof(struct i387_soft_struct);
73 xstate_size = sizeof(struct i387_fxsave_struct);
76 xstate_size = sizeof(struct i387_fsave_struct);
82 * Called at bootup to set up the initial FPU state that is later cloned
85 void __cpuinit fpu_init(void)
87 unsigned long oldcr0 = read_cr0();
89 set_in_cr4(X86_CR4_OSFXSR);
90 set_in_cr4(X86_CR4_OSXMMEXCPT);
92 write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
95 * Boot processor to setup the FP and extended state context info.
97 if (!smp_processor_id())
101 mxcsr_feature_mask_init();
102 /* clean state in init */
104 current_thread_info()->status = TS_XSAVE;
106 current_thread_info()->status = 0;
109 #endif /* CONFIG_X86_64 */
112 * The _current_ task is using the FPU for the first time
113 * so initialize it and set the mxcsr to its default
114 * value at reset if we support XMM instructions and then
115 * remeber the current task has used the FPU.
117 int init_fpu(struct task_struct *tsk)
119 if (tsk_used_math(tsk)) {
120 if (HAVE_HWFP && tsk == current)
126 * Memory allocation at the first usage of the FPU and other state.
128 if (!tsk->thread.xstate) {
129 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
131 if (!tsk->thread.xstate)
137 memset(tsk->thread.xstate, 0, xstate_size);
139 set_stopped_child_used_math(tsk);
145 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
147 memset(fx, 0, xstate_size);
150 fx->mxcsr = MXCSR_DEFAULT;
152 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
153 memset(fp, 0, xstate_size);
154 fp->cwd = 0xffff037fu;
155 fp->swd = 0xffff0000u;
156 fp->twd = 0xffffffffu;
157 fp->fos = 0xffff0000u;
160 * Only the device not available exception or ptrace can call init_fpu.
162 set_stopped_child_used_math(tsk);
166 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
168 return tsk_used_math(target) ? regset->n : 0;
171 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
173 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
176 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
177 unsigned int pos, unsigned int count,
178 void *kbuf, void __user *ubuf)
185 ret = init_fpu(target);
189 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
190 &target->thread.xstate->fxsave, 0, -1);
193 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
194 unsigned int pos, unsigned int count,
195 const void *kbuf, const void __user *ubuf)
202 ret = init_fpu(target);
206 set_stopped_child_used_math(target);
208 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
209 &target->thread.xstate->fxsave, 0, -1);
212 * mxcsr reserved bits must be masked to zero for security reasons.
214 target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
219 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
222 * FPU tag word conversions.
225 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
227 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
229 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
231 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
232 /* and move the valid bits to the lower byte. */
233 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
234 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
235 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
240 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
241 #define FP_EXP_TAG_VALID 0
242 #define FP_EXP_TAG_ZERO 1
243 #define FP_EXP_TAG_SPECIAL 2
244 #define FP_EXP_TAG_EMPTY 3
246 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
249 u32 tos = (fxsave->swd >> 11) & 7;
250 u32 twd = (unsigned long) fxsave->twd;
252 u32 ret = 0xffff0000u;
255 for (i = 0; i < 8; i++, twd >>= 1) {
257 st = FPREG_ADDR(fxsave, (i - tos) & 7);
259 switch (st->exponent & 0x7fff) {
261 tag = FP_EXP_TAG_SPECIAL;
264 if (!st->significand[0] &&
265 !st->significand[1] &&
266 !st->significand[2] &&
268 tag = FP_EXP_TAG_ZERO;
270 tag = FP_EXP_TAG_SPECIAL;
273 if (st->significand[3] & 0x8000)
274 tag = FP_EXP_TAG_VALID;
276 tag = FP_EXP_TAG_SPECIAL;
280 tag = FP_EXP_TAG_EMPTY;
282 ret |= tag << (2 * i);
288 * FXSR floating point environment conversions.
292 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
294 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
295 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
296 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
299 env->cwd = fxsave->cwd | 0xffff0000u;
300 env->swd = fxsave->swd | 0xffff0000u;
301 env->twd = twd_fxsr_to_i387(fxsave);
304 env->fip = fxsave->rip;
305 env->foo = fxsave->rdp;
306 if (tsk == current) {
308 * should be actually ds/cs at fpu exception time, but
309 * that information is not available in 64bit mode.
311 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
312 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
314 struct pt_regs *regs = task_pt_regs(tsk);
316 env->fos = 0xffff0000 | tsk->thread.ds;
320 env->fip = fxsave->fip;
321 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
322 env->foo = fxsave->foo;
323 env->fos = fxsave->fos;
326 for (i = 0; i < 8; ++i)
327 memcpy(&to[i], &from[i], sizeof(to[0]));
330 static void convert_to_fxsr(struct task_struct *tsk,
331 const struct user_i387_ia32_struct *env)
334 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
335 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
336 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
339 fxsave->cwd = env->cwd;
340 fxsave->swd = env->swd;
341 fxsave->twd = twd_i387_to_fxsr(env->twd);
342 fxsave->fop = (u16) ((u32) env->fcs >> 16);
344 fxsave->rip = env->fip;
345 fxsave->rdp = env->foo;
346 /* cs and ds ignored */
348 fxsave->fip = env->fip;
349 fxsave->fcs = (env->fcs & 0xffff);
350 fxsave->foo = env->foo;
351 fxsave->fos = env->fos;
354 for (i = 0; i < 8; ++i)
355 memcpy(&to[i], &from[i], sizeof(from[0]));
358 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
359 unsigned int pos, unsigned int count,
360 void *kbuf, void __user *ubuf)
362 struct user_i387_ia32_struct env;
365 ret = init_fpu(target);
370 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
373 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
374 &target->thread.xstate->fsave, 0,
378 if (kbuf && pos == 0 && count == sizeof(env)) {
379 convert_from_fxsr(kbuf, target);
383 convert_from_fxsr(&env, target);
385 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
388 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
389 unsigned int pos, unsigned int count,
390 const void *kbuf, const void __user *ubuf)
392 struct user_i387_ia32_struct env;
395 ret = init_fpu(target);
399 set_stopped_child_used_math(target);
402 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
405 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
406 &target->thread.xstate->fsave, 0, -1);
409 if (pos > 0 || count < sizeof(env))
410 convert_from_fxsr(&env, target);
412 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
414 convert_to_fxsr(target, &env);
420 * Signal frame handlers.
423 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
425 struct task_struct *tsk = current;
426 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
428 fp->status = fp->swd;
429 if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
434 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
436 struct task_struct *tsk = current;
437 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
438 struct user_i387_ia32_struct env;
441 convert_from_fxsr(&env, tsk);
442 if (__copy_to_user(buf, &env, sizeof(env)))
445 err |= __put_user(fx->swd, &buf->status);
446 err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
450 if (__copy_to_user(&buf->_fxsr_env[0], fx,
451 sizeof(struct i387_fxsave_struct)))
456 int save_i387_xstate_ia32(void __user *buf)
458 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
459 struct task_struct *tsk = current;
464 if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
467 * This will cause a "finit" to be triggered by the next
468 * attempted FPU operation by the 'current' process.
473 return fpregs_soft_get(current, NULL,
474 0, sizeof(struct user_i387_ia32_struct),
481 return save_i387_fxsave(fp);
483 return save_i387_fsave(fp);
486 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
488 struct task_struct *tsk = current;
490 return __copy_from_user(&tsk->thread.xstate->fsave, buf,
491 sizeof(struct i387_fsave_struct));
494 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
496 struct task_struct *tsk = current;
497 struct user_i387_ia32_struct env;
500 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
501 sizeof(struct i387_fxsave_struct));
502 /* mxcsr reserved bits must be masked to zero for security reasons */
503 tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
504 if (err || __copy_from_user(&env, buf, sizeof(env)))
506 convert_to_fxsr(tsk, &env);
511 int restore_i387_xstate_ia32(void __user *buf)
514 struct task_struct *tsk = current;
515 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
528 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
539 err = restore_i387_fxsave(fp);
541 err = restore_i387_fsave(fp);
543 err = fpregs_soft_set(current, NULL,
544 0, sizeof(struct user_i387_ia32_struct),
553 * FPU state for core dumps.
554 * This is only used for a.out dumps now.
555 * It is declared generically using elf_fpregset_t (which is
556 * struct user_i387_struct) but is in fact only used for 32-bit
557 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
559 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
561 struct task_struct *tsk = current;
564 fpvalid = !!used_math();
566 fpvalid = !fpregs_get(tsk, NULL,
567 0, sizeof(struct user_i387_ia32_struct),
572 EXPORT_SYMBOL(dump_fpu);
574 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */