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x86 smp: modify send_IPI_mask interface to accept cpumask_t pointers
[linux-2.6-omap-h63xx.git] / arch / x86 / kernel / genx2apic_phys.c
1 #include <linux/threads.h>
2 #include <linux/cpumask.h>
3 #include <linux/string.h>
4 #include <linux/kernel.h>
5 #include <linux/ctype.h>
6 #include <linux/init.h>
7 #include <linux/dmar.h>
8
9 #include <asm/smp.h>
10 #include <asm/ipi.h>
11 #include <asm/genapic.h>
12
13 static int x2apic_phys;
14
15 static int set_x2apic_phys_mode(char *arg)
16 {
17         x2apic_phys = 1;
18         return 0;
19 }
20 early_param("x2apic_phys", set_x2apic_phys_mode);
21
22 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
23 {
24         if (cpu_has_x2apic && x2apic_phys)
25                 return 1;
26
27         return 0;
28 }
29
30 /* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */
31
32 static const cpumask_t *x2apic_target_cpus(void)
33 {
34         return &cpumask_of_cpu(0);
35 }
36
37 static void x2apic_vector_allocation_domain(int cpu, cpumask_t *retmask)
38 {
39         cpus_clear(*retmask);
40         cpu_set(cpu, *retmask);
41 }
42
43 static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
44                                    unsigned int dest)
45 {
46         unsigned long cfg;
47
48         cfg = __prepare_ICR(0, vector, dest);
49
50         /*
51          * send the IPI.
52          */
53         x2apic_icr_write(cfg, apicid);
54 }
55
56 static void x2apic_send_IPI_mask(const cpumask_t *mask, int vector)
57 {
58         unsigned long flags;
59         unsigned long query_cpu;
60
61         local_irq_save(flags);
62         for_each_cpu_mask_nr(query_cpu, *mask) {
63                 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
64                                        vector, APIC_DEST_PHYSICAL);
65         }
66         local_irq_restore(flags);
67 }
68
69 static void x2apic_send_IPI_mask_allbutself(const cpumask_t *mask, int vector)
70 {
71         unsigned long flags;
72         unsigned long query_cpu;
73         unsigned long this_cpu = smp_processor_id();
74
75         local_irq_save(flags);
76         for_each_cpu_mask_nr(query_cpu, *mask) {
77                 if (query_cpu != this_cpu)
78                         __x2apic_send_IPI_dest(
79                                 per_cpu(x86_cpu_to_apicid, query_cpu),
80                                 vector, APIC_DEST_PHYSICAL);
81         }
82         local_irq_restore(flags);
83 }
84
85 static void x2apic_send_IPI_allbutself(int vector)
86 {
87         unsigned long flags;
88         unsigned long query_cpu;
89         unsigned long this_cpu = smp_processor_id();
90
91         local_irq_save(flags);
92         for_each_online_cpu(query_cpu)
93                 if (query_cpu != this_cpu)
94                         __x2apic_send_IPI_dest(
95                                 per_cpu(x86_cpu_to_apicid, query_cpu),
96                                 vector, APIC_DEST_PHYSICAL);
97         local_irq_restore(flags);
98 }
99
100 static void x2apic_send_IPI_all(int vector)
101 {
102         x2apic_send_IPI_mask(&cpu_online_map, vector);
103 }
104
105 static int x2apic_apic_id_registered(void)
106 {
107         return 1;
108 }
109
110 static unsigned int x2apic_cpu_mask_to_apicid(const cpumask_t *cpumask)
111 {
112         int cpu;
113
114         /*
115          * We're using fixed IRQ delivery, can only return one phys APIC ID.
116          * May as well be the first.
117          */
118         cpu = first_cpu(*cpumask);
119         if ((unsigned)cpu < nr_cpu_ids)
120                 return per_cpu(x86_cpu_to_apicid, cpu);
121         else
122                 return BAD_APICID;
123 }
124
125 static unsigned int get_apic_id(unsigned long x)
126 {
127         unsigned int id;
128
129         id = x;
130         return id;
131 }
132
133 static unsigned long set_apic_id(unsigned int id)
134 {
135         unsigned long x;
136
137         x = id;
138         return x;
139 }
140
141 static unsigned int phys_pkg_id(int index_msb)
142 {
143         return current_cpu_data.initial_apicid >> index_msb;
144 }
145
146 void x2apic_send_IPI_self(int vector)
147 {
148         apic_write(APIC_SELF_IPI, vector);
149 }
150
151 void init_x2apic_ldr(void)
152 {
153         return;
154 }
155
156 struct genapic apic_x2apic_phys = {
157         .name = "physical x2apic",
158         .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
159         .int_delivery_mode = dest_Fixed,
160         .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
161         .target_cpus = x2apic_target_cpus,
162         .vector_allocation_domain = x2apic_vector_allocation_domain,
163         .apic_id_registered = x2apic_apic_id_registered,
164         .init_apic_ldr = init_x2apic_ldr,
165         .send_IPI_all = x2apic_send_IPI_all,
166         .send_IPI_allbutself = x2apic_send_IPI_allbutself,
167         .send_IPI_mask = x2apic_send_IPI_mask,
168         .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
169         .send_IPI_self = x2apic_send_IPI_self,
170         .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
171         .phys_pkg_id = phys_pkg_id,
172         .get_apic_id = get_apic_id,
173         .set_apic_id = set_apic_id,
174         .apic_id_mask = (0xFFFFFFFFu),
175 };