2 * Copyright 2004 James Cleverdon, IBM.
3 * Subject to the GNU Public License, v.2
5 * Flat APIC subarch code.
7 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
8 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
11 #include <linux/errno.h>
12 #include <linux/threads.h>
13 #include <linux/cpumask.h>
14 #include <linux/string.h>
15 #include <linux/kernel.h>
16 #include <linux/ctype.h>
17 #include <linux/init.h>
18 #include <linux/hardirq.h>
21 #include <asm/genapic.h>
22 #include <mach_apicdef.h>
24 static cpumask_t flat_target_cpus(void)
26 return cpu_online_map;
29 static cpumask_t flat_vector_allocation_domain(int cpu)
31 /* Careful. Some cpus do not strictly honor the set of cpus
32 * specified in the interrupt destination when using lowest
33 * priority interrupt delivery mode.
35 * In particular there was a hyperthreading cpu observed to
36 * deliver interrupts to the wrong hyperthread when only one
37 * hyperthread was specified in the interrupt desitination.
39 cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
44 * Set up the logical destination ID.
46 * Intel recommends to set DFR, LDR and TPR before enabling
47 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
48 * document number 292116). So here it goes...
50 static void flat_init_apic_ldr(void)
53 unsigned long num, id;
55 num = smp_processor_id();
57 apic_write(APIC_DFR, APIC_DFR_FLAT);
58 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
59 val |= SET_APIC_LOGICAL_ID(id);
60 apic_write(APIC_LDR, val);
63 static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
65 unsigned long mask = cpus_addr(cpumask)[0];
68 local_irq_save(flags);
69 __send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL);
70 local_irq_restore(flags);
73 static void flat_send_IPI_allbutself(int vector)
75 #ifdef CONFIG_HOTPLUG_CPU
80 if (hotplug || vector == NMI_VECTOR) {
81 cpumask_t allbutme = cpu_online_map;
83 cpu_clear(smp_processor_id(), allbutme);
85 if (!cpus_empty(allbutme))
86 flat_send_IPI_mask(allbutme, vector);
87 } else if (num_online_cpus() > 1) {
88 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
92 static void flat_send_IPI_all(int vector)
94 if (vector == NMI_VECTOR)
95 flat_send_IPI_mask(cpu_online_map, vector);
97 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
100 static unsigned int read_xapic_id(void)
104 id = GET_XAPIC_ID(apic_read(APIC_ID));
108 static int flat_apic_id_registered(void)
110 return physid_isset(read_xapic_id(), phys_cpu_present_map);
113 static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask)
115 return cpus_addr(cpumask)[0] & APIC_ALL_CPUS;
118 static unsigned int phys_pkg_id(int index_msb)
120 return hard_smp_processor_id() >> index_msb;
123 struct genapic apic_flat = {
125 .int_delivery_mode = dest_LowestPrio,
126 .int_dest_mode = (APIC_DEST_LOGICAL != 0),
127 .target_cpus = flat_target_cpus,
128 .vector_allocation_domain = flat_vector_allocation_domain,
129 .apic_id_registered = flat_apic_id_registered,
130 .init_apic_ldr = flat_init_apic_ldr,
131 .send_IPI_all = flat_send_IPI_all,
132 .send_IPI_allbutself = flat_send_IPI_allbutself,
133 .send_IPI_mask = flat_send_IPI_mask,
134 .send_IPI_self = apic_send_IPI_self,
135 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
136 .phys_pkg_id = phys_pkg_id,
137 .read_apic_id = read_xapic_id,
141 * Physflat mode is used when there are more than 8 CPUs on a AMD system.
142 * We cannot use logical delivery in this case because the mask
143 * overflows, so use physical mode.
146 static cpumask_t physflat_target_cpus(void)
148 return cpu_online_map;
151 static cpumask_t physflat_vector_allocation_domain(int cpu)
153 return cpumask_of_cpu(cpu);
156 static void physflat_send_IPI_mask(cpumask_t cpumask, int vector)
158 send_IPI_mask_sequence(cpumask, vector);
161 static void physflat_send_IPI_allbutself(int vector)
163 cpumask_t allbutme = cpu_online_map;
165 cpu_clear(smp_processor_id(), allbutme);
166 physflat_send_IPI_mask(allbutme, vector);
169 static void physflat_send_IPI_all(int vector)
171 physflat_send_IPI_mask(cpu_online_map, vector);
174 static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask)
179 * We're using fixed IRQ delivery, can only return one phys APIC ID.
180 * May as well be the first.
182 cpu = first_cpu(cpumask);
183 if ((unsigned)cpu < NR_CPUS)
184 return per_cpu(x86_cpu_to_apicid, cpu);
189 struct genapic apic_physflat = {
190 .name = "physical flat",
191 .int_delivery_mode = dest_Fixed,
192 .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
193 .target_cpus = physflat_target_cpus,
194 .vector_allocation_domain = physflat_vector_allocation_domain,
195 .apic_id_registered = flat_apic_id_registered,
196 .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/
197 .send_IPI_all = physflat_send_IPI_all,
198 .send_IPI_allbutself = physflat_send_IPI_allbutself,
199 .send_IPI_mask = physflat_send_IPI_mask,
200 .send_IPI_self = apic_send_IPI_self,
201 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
202 .phys_pkg_id = phys_pkg_id,
203 .read_apic_id = read_xapic_id,