2 * (c) 2005, 2006 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
7 * Written by Jacob Shin - AMD, Inc.
9 * Support : jacob.shin@amd.com
12 * - added support for AMD Family 0x10 processors
14 * All MC4_MISCi registers are shared between multi-cores
17 #include <linux/cpu.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/kobject.h>
22 #include <linux/notifier.h>
23 #include <linux/sched.h>
24 #include <linux/smp.h>
25 #include <linux/sysdev.h>
26 #include <linux/sysfs.h>
30 #include <asm/percpu.h>
33 #define PFX "mce_threshold: "
34 #define VERSION "version 1.1.1"
37 #define THRESHOLD_MAX 0xFFF
38 #define INT_TYPE_APIC 0x00020000
39 #define MASK_VALID_HI 0x80000000
40 #define MASK_CNTP_HI 0x40000000
41 #define MASK_LOCKED_HI 0x20000000
42 #define MASK_LVTOFF_HI 0x00F00000
43 #define MASK_COUNT_EN_HI 0x00080000
44 #define MASK_INT_TYPE_HI 0x00060000
45 #define MASK_OVERFLOW_HI 0x00010000
46 #define MASK_ERR_COUNT_HI 0x00000FFF
47 #define MASK_BLKPTR_LO 0xFF000000
48 #define MCG_XBLK_ADDR 0xC0000400
50 struct threshold_block {
58 struct list_head miscj;
61 /* defaults used early on boot */
62 static struct threshold_block threshold_defaults = {
63 .interrupt_enable = 0,
64 .threshold_limit = THRESHOLD_MAX,
67 struct threshold_bank {
69 struct threshold_block *blocks;
72 static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
75 static unsigned char shared_bank[NR_BANKS] = {
80 static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
82 static void amd_threshold_interrupt(void);
88 struct thresh_restart {
89 struct threshold_block *b;
94 /* must be called with correct cpu affinity */
95 static long threshold_restart_bank(void *_tr)
97 struct thresh_restart *tr = _tr;
98 u32 mci_misc_hi, mci_misc_lo;
100 rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
102 if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
103 tr->reset = 1; /* limit cannot be lower than err count */
105 if (tr->reset) { /* reset err count and overflow bit */
107 (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
108 (THRESHOLD_MAX - tr->b->threshold_limit);
109 } else if (tr->old_limit) { /* change limit w/o reset */
110 int new_count = (mci_misc_hi & THRESHOLD_MAX) +
111 (tr->old_limit - tr->b->threshold_limit);
112 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
113 (new_count & THRESHOLD_MAX);
116 tr->b->interrupt_enable ?
117 (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
118 (mci_misc_hi &= ~MASK_INT_TYPE_HI);
120 mci_misc_hi |= MASK_COUNT_EN_HI;
121 wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
125 /* cpu init entry point, called from mce.c with preempt off */
126 void mce_amd_feature_init(struct cpuinfo_x86 *c)
128 unsigned int bank, block;
129 unsigned int cpu = smp_processor_id();
131 u32 low = 0, high = 0, address = 0;
132 struct thresh_restart tr;
134 for (bank = 0; bank < NR_BANKS; ++bank) {
135 for (block = 0; block < NR_BLOCKS; ++block) {
137 address = MSR_IA32_MC0_MISC + bank * 4;
138 else if (block == 1) {
139 address = (low & MASK_BLKPTR_LO) >> 21;
142 address += MCG_XBLK_ADDR;
147 if (rdmsr_safe(address, &low, &high))
150 if (!(high & MASK_VALID_HI)) {
157 if (!(high & MASK_CNTP_HI) ||
158 (high & MASK_LOCKED_HI))
162 per_cpu(bank_map, cpu) |= (1 << bank);
164 if (shared_bank[bank] && c->cpu_core_id)
167 lvt_off = setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR,
168 APIC_EILVT_MSG_FIX, 0);
170 high &= ~MASK_LVTOFF_HI;
171 high |= lvt_off << 20;
172 wrmsr(address, low, high);
174 threshold_defaults.address = address;
175 tr.b = &threshold_defaults;
178 threshold_restart_bank(&tr);
180 mce_threshold_vector = amd_threshold_interrupt;
186 * APIC Interrupt Handler
190 * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
191 * the interrupt goes off when error_count reaches threshold_limit.
192 * the handler will simply log mcelog w/ software defined bank number.
194 static void amd_threshold_interrupt(void)
196 unsigned int bank, block;
198 u32 low = 0, high = 0, address = 0;
202 /* assume first bank caused it */
203 for (bank = 0; bank < NR_BANKS; ++bank) {
204 if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
206 for (block = 0; block < NR_BLOCKS; ++block) {
208 address = MSR_IA32_MC0_MISC + bank * 4;
209 else if (block == 1) {
210 address = (low & MASK_BLKPTR_LO) >> 21;
213 address += MCG_XBLK_ADDR;
218 if (rdmsr_safe(address, &low, &high))
221 if (!(high & MASK_VALID_HI)) {
228 if (!(high & MASK_CNTP_HI) ||
229 (high & MASK_LOCKED_HI))
232 /* Log the machine check that caused the threshold
234 machine_check_poll(MCP_TIMESTAMP,
235 &__get_cpu_var(mce_poll_banks));
237 if (high & MASK_OVERFLOW_HI) {
238 rdmsrl(address, m.misc);
239 rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
241 m.bank = K8_MCE_THRESHOLD_BASE
255 struct threshold_attr {
256 struct attribute attr;
257 ssize_t(*show) (struct threshold_block *, char *);
258 ssize_t(*store) (struct threshold_block *, const char *, size_t count);
261 #define SHOW_FIELDS(name) \
262 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
264 return sprintf(buf, "%lx\n", (unsigned long) b->name); \
266 SHOW_FIELDS(interrupt_enable)
267 SHOW_FIELDS(threshold_limit)
269 static ssize_t store_interrupt_enable(struct threshold_block *b,
270 const char *buf, size_t count)
273 struct thresh_restart tr;
274 unsigned long new = simple_strtoul(buf, &end, 0);
277 b->interrupt_enable = !!new;
282 work_on_cpu(b->cpu, threshold_restart_bank, &tr);
287 static ssize_t store_threshold_limit(struct threshold_block *b,
288 const char *buf, size_t count)
291 struct thresh_restart tr;
292 unsigned long new = simple_strtoul(buf, &end, 0);
295 if (new > THRESHOLD_MAX)
299 tr.old_limit = b->threshold_limit;
300 b->threshold_limit = new;
304 work_on_cpu(b->cpu, threshold_restart_bank, &tr);
309 static long local_error_count(void *_b)
311 struct threshold_block *b = _b;
314 rdmsr(b->address, low, high);
315 return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
318 static ssize_t show_error_count(struct threshold_block *b, char *buf)
320 return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
323 static ssize_t store_error_count(struct threshold_block *b,
324 const char *buf, size_t count)
326 struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
328 work_on_cpu(b->cpu, threshold_restart_bank, &tr);
332 #define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
333 .attr = {.name = __stringify(_name), .mode = _mode }, \
338 #define RW_ATTR(name) \
339 static struct threshold_attr name = \
340 THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
342 RW_ATTR(interrupt_enable);
343 RW_ATTR(threshold_limit);
344 RW_ATTR(error_count);
346 static struct attribute *default_attrs[] = {
347 &interrupt_enable.attr,
348 &threshold_limit.attr,
353 #define to_block(k) container_of(k, struct threshold_block, kobj)
354 #define to_attr(a) container_of(a, struct threshold_attr, attr)
356 static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
358 struct threshold_block *b = to_block(kobj);
359 struct threshold_attr *a = to_attr(attr);
361 ret = a->show ? a->show(b, buf) : -EIO;
365 static ssize_t store(struct kobject *kobj, struct attribute *attr,
366 const char *buf, size_t count)
368 struct threshold_block *b = to_block(kobj);
369 struct threshold_attr *a = to_attr(attr);
371 ret = a->store ? a->store(b, buf, count) : -EIO;
375 static struct sysfs_ops threshold_ops = {
380 static struct kobj_type threshold_ktype = {
381 .sysfs_ops = &threshold_ops,
382 .default_attrs = default_attrs,
385 static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
392 struct threshold_block *b = NULL;
394 if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
397 if (rdmsr_safe(address, &low, &high))
400 if (!(high & MASK_VALID_HI)) {
407 if (!(high & MASK_CNTP_HI) ||
408 (high & MASK_LOCKED_HI))
411 b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
418 b->address = address;
419 b->interrupt_enable = 0;
420 b->threshold_limit = THRESHOLD_MAX;
422 INIT_LIST_HEAD(&b->miscj);
424 if (per_cpu(threshold_banks, cpu)[bank]->blocks)
426 &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
428 per_cpu(threshold_banks, cpu)[bank]->blocks = b;
430 err = kobject_init_and_add(&b->kobj, &threshold_ktype,
431 per_cpu(threshold_banks, cpu)[bank]->kobj,
437 address = (low & MASK_BLKPTR_LO) >> 21;
440 address += MCG_XBLK_ADDR;
444 err = allocate_threshold_blocks(cpu, bank, ++block, address);
449 kobject_uevent(&b->kobj, KOBJ_ADD);
455 kobject_put(&b->kobj);
461 static __cpuinit long local_allocate_threshold_blocks(void *_bank)
463 unsigned int *bank = _bank;
465 return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
466 MSR_IA32_MC0_MISC + *bank * 4);
469 /* symlinks sibling shared banks to first core. first core owns dir/files. */
470 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
473 struct threshold_bank *b = NULL;
476 sprintf(name, "threshold_bank%i", bank);
479 if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
480 i = cpumask_first(cpu_core_mask(cpu));
482 /* first core not up yet */
483 if (cpu_data(i).cpu_core_id)
487 if (per_cpu(threshold_banks, cpu)[bank])
490 b = per_cpu(threshold_banks, i)[bank];
495 err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
500 cpumask_copy(b->cpus, cpu_core_mask(cpu));
501 per_cpu(threshold_banks, cpu)[bank] = b;
506 b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
511 if (!alloc_cpumask_var(&b->cpus, GFP_KERNEL)) {
517 b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
522 cpumask_setall(b->cpus);
524 cpumask_copy(b->cpus, cpu_core_mask(cpu));
527 per_cpu(threshold_banks, cpu)[bank] = b;
529 err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
533 for_each_cpu(i, b->cpus) {
537 err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
542 per_cpu(threshold_banks, i)[bank] = b;
548 per_cpu(threshold_banks, cpu)[bank] = NULL;
549 free_cpumask_var(b->cpus);
555 /* create dir/files for all valid threshold banks */
556 static __cpuinit int threshold_create_device(unsigned int cpu)
561 for (bank = 0; bank < NR_BANKS; ++bank) {
562 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
564 err = threshold_create_bank(cpu, bank);
573 * let's be hotplug friendly.
574 * in case of multiple core processors, the first core always takes ownership
575 * of shared sysfs dir/files, and rest of the cores will be symlinked to it.
578 static void deallocate_threshold_block(unsigned int cpu,
581 struct threshold_block *pos = NULL;
582 struct threshold_block *tmp = NULL;
583 struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
588 list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
589 kobject_put(&pos->kobj);
590 list_del(&pos->miscj);
594 kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
595 per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
598 static void threshold_remove_bank(unsigned int cpu, int bank)
601 struct threshold_bank *b;
604 b = per_cpu(threshold_banks, cpu)[bank];
612 sprintf(name, "threshold_bank%i", bank);
615 /* sibling symlink */
616 if (shared_bank[bank] && b->blocks->cpu != cpu) {
617 sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
618 per_cpu(threshold_banks, cpu)[bank] = NULL;
623 /* remove all sibling symlinks before unregistering */
624 for_each_cpu(i, b->cpus) {
628 sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
629 per_cpu(threshold_banks, i)[bank] = NULL;
632 deallocate_threshold_block(cpu, bank);
635 kobject_del(b->kobj);
636 kobject_put(b->kobj);
637 free_cpumask_var(b->cpus);
639 per_cpu(threshold_banks, cpu)[bank] = NULL;
642 static void threshold_remove_device(unsigned int cpu)
646 for (bank = 0; bank < NR_BANKS; ++bank) {
647 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
649 threshold_remove_bank(cpu, bank);
653 /* get notified when a cpu comes on/off */
654 static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
662 case CPU_ONLINE_FROZEN:
663 threshold_create_device(cpu);
666 case CPU_DEAD_FROZEN:
667 threshold_remove_device(cpu);
674 static __init int threshold_init_device(void)
678 /* to hit CPUs online before the notifier is up */
679 for_each_online_cpu(lcpu) {
680 int err = threshold_create_device(lcpu);
684 threshold_cpu_callback = amd_64_threshold_cpu_callback;
688 device_initcall(threshold_init_device);