1 #ifndef _ASM_X86_MPSPEC_DEF_H
2 #define _ASM_X86_MPSPEC_DEF_H
5 * Structure definitions for SMP machines following the
6 * Intel Multiprocessing Specification 1.1 and 1.4.
10 * This tag identifies where the SMP configuration
14 #define SMP_MAGIC_IDENT (('_'<<24) | ('P'<<16) | ('M'<<8) | '_')
17 # define MAX_MPC_ENTRY 1024
18 # define MAX_APICS 256
21 # define MAX_APICS 255
23 # define MAX_APICS 32768
27 struct intel_mp_floating {
28 char mpf_signature[4]; /* "_MP_" */
29 unsigned int mpf_physptr; /* Configuration table address */
30 unsigned char mpf_length; /* Our length (paragraphs) */
31 unsigned char mpf_specification;/* Specification version */
32 unsigned char mpf_checksum; /* Checksum (makes sum 0) */
33 unsigned char mpf_feature1; /* Standard or configuration ? */
34 unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */
35 unsigned char mpf_feature3; /* Unused (0) */
36 unsigned char mpf_feature4; /* Unused (0) */
37 unsigned char mpf_feature5; /* Unused (0) */
40 #define MPC_SIGNATURE "PCMP"
43 char mpc_signature[4];
44 unsigned short mpc_length; /* Size of table */
45 char mpc_spec; /* 0x01 */
48 char mpc_productid[12];
49 unsigned int mpc_oemptr; /* 0 if not present */
50 unsigned short mpc_oemsize; /* 0 if not present */
51 unsigned short mpc_oemcount;
52 unsigned int mpc_lapic; /* APIC address */
53 unsigned int reserved;
56 /* Followed by entries */
58 #define MP_PROCESSOR 0
63 /* Used by IBM NUMA-Q to describe node locality */
64 #define MP_TRANSLATION 192
66 #define CPU_ENABLED 1 /* Processor is available */
67 #define CPU_BOOTPROCESSOR 2 /* Processor is the BP */
69 #define CPU_STEPPING_MASK 0x000F
70 #define CPU_MODEL_MASK 0x00F0
71 #define CPU_FAMILY_MASK 0x0F00
73 struct mpc_config_processor {
74 unsigned char mpc_type;
75 unsigned char mpc_apicid; /* Local APIC number */
76 unsigned char mpc_apicver; /* Its versions */
77 unsigned char mpc_cpuflag;
78 unsigned int mpc_cpufeature;
79 unsigned int mpc_featureflag; /* CPUID feature value */
80 unsigned int mpc_reserved[2];
84 unsigned char mpc_type;
85 unsigned char mpc_busid;
86 unsigned char mpc_bustype[6];
89 /* List of Bus Type string values, Intel MP Spec. */
90 #define BUSTYPE_EISA "EISA"
91 #define BUSTYPE_ISA "ISA"
92 #define BUSTYPE_INTERN "INTERN" /* Internal BUS */
93 #define BUSTYPE_MCA "MCA"
94 #define BUSTYPE_VL "VL" /* Local bus */
95 #define BUSTYPE_PCI "PCI"
96 #define BUSTYPE_PCMCIA "PCMCIA"
97 #define BUSTYPE_CBUS "CBUS"
98 #define BUSTYPE_CBUSII "CBUSII"
99 #define BUSTYPE_FUTURE "FUTURE"
100 #define BUSTYPE_MBI "MBI"
101 #define BUSTYPE_MBII "MBII"
102 #define BUSTYPE_MPI "MPI"
103 #define BUSTYPE_MPSA "MPSA"
104 #define BUSTYPE_NUBUS "NUBUS"
105 #define BUSTYPE_TC "TC"
106 #define BUSTYPE_VME "VME"
107 #define BUSTYPE_XPRESS "XPRESS"
109 #define MPC_APIC_USABLE 0x01
111 struct mpc_config_ioapic {
112 unsigned char mpc_type;
113 unsigned char mpc_apicid;
114 unsigned char mpc_apicver;
115 unsigned char mpc_flags;
116 unsigned int mpc_apicaddr;
119 struct mpc_config_intsrc {
120 unsigned char mpc_type;
121 unsigned char mpc_irqtype;
122 unsigned short mpc_irqflag;
123 unsigned char mpc_srcbus;
124 unsigned char mpc_srcbusirq;
125 unsigned char mpc_dstapic;
126 unsigned char mpc_dstirq;
129 enum mp_irq_source_types {
136 #define MP_IRQDIR_DEFAULT 0
137 #define MP_IRQDIR_HIGH 1
138 #define MP_IRQDIR_LOW 3
140 #define MP_APIC_ALL 0xFF
142 struct mpc_config_lintsrc {
143 unsigned char mpc_type;
144 unsigned char mpc_irqtype;
145 unsigned short mpc_irqflag;
146 unsigned char mpc_srcbusid;
147 unsigned char mpc_srcbusirq;
148 unsigned char mpc_destapic;
149 unsigned char mpc_destapiclint;
152 #define MPC_OEM_SIGNATURE "_OEM"
154 struct mp_config_oemtable {
155 char oem_signature[4];
156 unsigned short oem_length; /* Size of table */
157 char oem_rev; /* 0x01 */
163 * Default configurations
165 * 1 2 CPU ISA 82489DX
166 * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining
167 * 3 2 CPU EISA 82489DX
168 * 4 2 CPU MCA 82489DX
180 #endif /* _ASM_X86_MPSPEC_DEF_H */