1 /* time.c: UltraSparc timer and TOD clock support.
3 * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
6 * Based largely on code which is:
8 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
11 #include <linux/errno.h>
12 #include <linux/module.h>
13 #include <linux/sched.h>
14 #include <linux/smp_lock.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/miscdevice.h>
32 #include <linux/rtc.h>
33 #include <linux/rtc/m48t59.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/clockchips.h>
36 #include <linux/clocksource.h>
37 #include <linux/of_device.h>
38 #include <linux/platform_device.h>
40 #include <asm/oplib.h>
41 #include <asm/timer.h>
45 #include <asm/starfire.h>
47 #include <asm/sections.h>
48 #include <asm/cpudata.h>
49 #include <asm/uaccess.h>
50 #include <asm/irq_regs.h>
54 DEFINE_SPINLOCK(rtc_lock);
56 #define TICK_PRIV_BIT (1UL << 63)
57 #define TICKCMP_IRQ_BIT (1UL << 63)
60 unsigned long profile_pc(struct pt_regs *regs)
62 unsigned long pc = instruction_pointer(regs);
64 if (in_lock_functions(pc))
65 return regs->u_regs[UREG_RETPC];
68 EXPORT_SYMBOL(profile_pc);
71 static void tick_disable_protection(void)
73 /* Set things up so user can access tick register for profiling
74 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
75 * read back of %tick after writing it.
81 "1: rd %%tick, %%g2\n"
82 " add %%g2, 6, %%g2\n"
83 " andn %%g2, %0, %%g2\n"
84 " wrpr %%g2, 0, %%tick\n"
91 static void tick_disable_irq(void)
97 "1: wr %0, 0x0, %%tick_cmpr\n"
98 " rd %%tick_cmpr, %%g0"
100 : "r" (TICKCMP_IRQ_BIT));
103 static void tick_init_tick(void)
105 tick_disable_protection();
109 static unsigned long tick_get_tick(void)
113 __asm__ __volatile__("rd %%tick, %0\n\t"
117 return ret & ~TICK_PRIV_BIT;
120 static int tick_add_compare(unsigned long adj)
122 unsigned long orig_tick, new_tick, new_compare;
124 __asm__ __volatile__("rd %%tick, %0"
127 orig_tick &= ~TICKCMP_IRQ_BIT;
129 /* Workaround for Spitfire Errata (#54 I think??), I discovered
130 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
133 * On Blackbird writes to %tick_cmpr can fail, the
134 * workaround seems to be to execute the wr instruction
135 * at the start of an I-cache line, and perform a dummy
136 * read back from %tick_cmpr right after writing to it. -DaveM
138 __asm__ __volatile__("ba,pt %%xcc, 1f\n\t"
139 " add %1, %2, %0\n\t"
142 "wr %0, 0, %%tick_cmpr\n\t"
143 "rd %%tick_cmpr, %%g0\n\t"
145 : "r" (orig_tick), "r" (adj));
147 __asm__ __volatile__("rd %%tick, %0"
149 new_tick &= ~TICKCMP_IRQ_BIT;
151 return ((long)(new_tick - (orig_tick+adj))) > 0L;
154 static unsigned long tick_add_tick(unsigned long adj)
156 unsigned long new_tick;
158 /* Also need to handle Blackbird bug here too. */
159 __asm__ __volatile__("rd %%tick, %0\n\t"
161 "wrpr %0, 0, %%tick\n\t"
168 static struct sparc64_tick_ops tick_operations __read_mostly = {
170 .init_tick = tick_init_tick,
171 .disable_irq = tick_disable_irq,
172 .get_tick = tick_get_tick,
173 .add_tick = tick_add_tick,
174 .add_compare = tick_add_compare,
175 .softint_mask = 1UL << 0,
178 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
180 static void stick_disable_irq(void)
182 __asm__ __volatile__(
183 "wr %0, 0x0, %%asr25"
185 : "r" (TICKCMP_IRQ_BIT));
188 static void stick_init_tick(void)
190 /* Writes to the %tick and %stick register are not
191 * allowed on sun4v. The Hypervisor controls that
194 if (tlb_type != hypervisor) {
195 tick_disable_protection();
198 /* Let the user get at STICK too. */
199 __asm__ __volatile__(
200 " rd %%asr24, %%g2\n"
201 " andn %%g2, %0, %%g2\n"
202 " wr %%g2, 0, %%asr24"
204 : "r" (TICK_PRIV_BIT)
211 static unsigned long stick_get_tick(void)
215 __asm__ __volatile__("rd %%asr24, %0"
218 return ret & ~TICK_PRIV_BIT;
221 static unsigned long stick_add_tick(unsigned long adj)
223 unsigned long new_tick;
225 __asm__ __volatile__("rd %%asr24, %0\n\t"
227 "wr %0, 0, %%asr24\n\t"
234 static int stick_add_compare(unsigned long adj)
236 unsigned long orig_tick, new_tick;
238 __asm__ __volatile__("rd %%asr24, %0"
240 orig_tick &= ~TICKCMP_IRQ_BIT;
242 __asm__ __volatile__("wr %0, 0, %%asr25"
244 : "r" (orig_tick + adj));
246 __asm__ __volatile__("rd %%asr24, %0"
248 new_tick &= ~TICKCMP_IRQ_BIT;
250 return ((long)(new_tick - (orig_tick+adj))) > 0L;
253 static struct sparc64_tick_ops stick_operations __read_mostly = {
255 .init_tick = stick_init_tick,
256 .disable_irq = stick_disable_irq,
257 .get_tick = stick_get_tick,
258 .add_tick = stick_add_tick,
259 .add_compare = stick_add_compare,
260 .softint_mask = 1UL << 16,
263 /* On Hummingbird the STICK/STICK_CMPR register is implemented
264 * in I/O space. There are two 64-bit registers each, the
265 * first holds the low 32-bits of the value and the second holds
268 * Since STICK is constantly updating, we have to access it carefully.
270 * The sequence we use to read is:
273 * 3) read high again, if it rolled re-read both low and high again.
275 * Writing STICK safely is also tricky:
276 * 1) write low to zero
280 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
281 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
283 static unsigned long __hbird_read_stick(void)
285 unsigned long ret, tmp1, tmp2, tmp3;
286 unsigned long addr = HBIRD_STICK_ADDR+8;
288 __asm__ __volatile__("ldxa [%1] %5, %2\n"
290 "sub %1, 0x8, %1\n\t"
291 "ldxa [%1] %5, %3\n\t"
292 "add %1, 0x8, %1\n\t"
293 "ldxa [%1] %5, %4\n\t"
295 "bne,a,pn %%xcc, 1b\n\t"
297 "sllx %4, 32, %4\n\t"
299 : "=&r" (ret), "=&r" (addr),
300 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
301 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
306 static void __hbird_write_stick(unsigned long val)
308 unsigned long low = (val & 0xffffffffUL);
309 unsigned long high = (val >> 32UL);
310 unsigned long addr = HBIRD_STICK_ADDR;
312 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
313 "add %0, 0x8, %0\n\t"
314 "stxa %3, [%0] %4\n\t"
315 "sub %0, 0x8, %0\n\t"
318 : "0" (addr), "r" (low), "r" (high),
319 "i" (ASI_PHYS_BYPASS_EC_E));
322 static void __hbird_write_compare(unsigned long val)
324 unsigned long low = (val & 0xffffffffUL);
325 unsigned long high = (val >> 32UL);
326 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
328 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
329 "sub %0, 0x8, %0\n\t"
332 : "0" (addr), "r" (low), "r" (high),
333 "i" (ASI_PHYS_BYPASS_EC_E));
336 static void hbtick_disable_irq(void)
338 __hbird_write_compare(TICKCMP_IRQ_BIT);
341 static void hbtick_init_tick(void)
343 tick_disable_protection();
345 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
346 * XXX into actually sending STICK interrupts. I think because
347 * XXX of how we store %tick_cmpr in head.S this somehow resets the
348 * XXX {TICK + STICK} interrupt mux. -DaveM
350 __hbird_write_stick(__hbird_read_stick());
352 hbtick_disable_irq();
355 static unsigned long hbtick_get_tick(void)
357 return __hbird_read_stick() & ~TICK_PRIV_BIT;
360 static unsigned long hbtick_add_tick(unsigned long adj)
364 val = __hbird_read_stick() + adj;
365 __hbird_write_stick(val);
370 static int hbtick_add_compare(unsigned long adj)
372 unsigned long val = __hbird_read_stick();
375 val &= ~TICKCMP_IRQ_BIT;
377 __hbird_write_compare(val);
379 val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
381 return ((long)(val2 - val)) > 0L;
384 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
386 .init_tick = hbtick_init_tick,
387 .disable_irq = hbtick_disable_irq,
388 .get_tick = hbtick_get_tick,
389 .add_tick = hbtick_add_tick,
390 .add_compare = hbtick_add_compare,
391 .softint_mask = 1UL << 0,
394 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
396 int update_persistent_clock(struct timespec now)
398 struct rtc_device *rtc = rtc_class_open("rtc0");
401 return rtc_set_mmss(rtc, now.tv_sec);
406 /* davem suggests we keep this within the 4M locked kernel image */
407 static u32 starfire_get_time(void)
409 static char obp_gettod[32];
412 sprintf(obp_gettod, "h# %08x unix-gettod",
413 (unsigned int) (long) &unix_tod);
414 prom_feval(obp_gettod);
419 static int starfire_set_time(u32 val)
421 /* Do nothing, time is set using the service processor
422 * console on this platform.
427 unsigned long cmos_regs;
428 EXPORT_SYMBOL(cmos_regs);
430 struct resource rtc_cmos_resource;
432 static struct platform_device rtc_cmos_device = {
435 .resource = &rtc_cmos_resource,
439 static int __devinit rtc_probe(struct of_device *op, const struct of_device_id *match)
443 printk(KERN_INFO "%s: RTC regs at 0x%lx\n",
444 op->node->full_name, op->resource[0].start);
446 /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
447 * up a fake resource so that the probe works for all cases.
448 * When the RTC is behind an ISA bus it will have IORESOURCE_IO
449 * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
452 r = &rtc_cmos_resource;
453 r->flags = IORESOURCE_IO;
454 r->name = op->resource[0].name;
455 r->start = op->resource[0].start;
456 r->end = op->resource[0].end;
458 cmos_regs = op->resource[0].start;
459 return platform_device_register(&rtc_cmos_device);
462 static struct of_device_id rtc_match[] = {
465 .compatible = "m5819",
469 .compatible = "isa-m5819p",
473 .compatible = "isa-m5823p",
477 .compatible = "ds1287",
482 static struct of_platform_driver rtc_driver = {
483 .match_table = rtc_match,
490 static struct platform_device rtc_bq4802_device = {
491 .name = "rtc-bq4802",
496 static int __devinit bq4802_probe(struct of_device *op, const struct of_device_id *match)
499 printk(KERN_INFO "%s: BQ4802 regs at 0x%lx\n",
500 op->node->full_name, op->resource[0].start);
502 rtc_bq4802_device.resource = &op->resource[0];
503 return platform_device_register(&rtc_bq4802_device);
506 static struct of_device_id bq4802_match[] = {
509 .compatible = "bq4802",
513 static struct of_platform_driver bq4802_driver = {
514 .match_table = bq4802_match,
515 .probe = bq4802_probe,
521 static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
523 struct platform_device *pdev = to_platform_device(dev);
527 regs = (void __iomem *) pdev->resource[0].start;
528 val = readb(regs + ofs);
530 /* the year 0 is 1968 */
531 if (ofs == M48T59_YEAR) {
539 static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
541 struct platform_device *pdev = to_platform_device(dev);
544 regs = (void __iomem *) pdev->resource[0].start;
545 if (ofs == M48T59_YEAR) {
552 if ((val & 0xf0) > 0x9A)
555 writeb(val, regs + ofs);
558 static struct m48t59_plat_data m48t59_data = {
559 .read_byte = mostek_read_byte,
560 .write_byte = mostek_write_byte,
563 static struct platform_device m48t59_rtc = {
564 .name = "rtc-m48t59",
568 .platform_data = &m48t59_data,
572 static int __devinit mostek_probe(struct of_device *op, const struct of_device_id *match)
574 struct device_node *dp = op->node;
576 /* On an Enterprise system there can be multiple mostek clocks.
577 * We should only match the one that is on the central FHC bus.
579 if (!strcmp(dp->parent->name, "fhc") &&
580 strcmp(dp->parent->parent->name, "central") != 0)
583 printk(KERN_INFO "%s: Mostek regs at 0x%lx\n",
584 dp->full_name, op->resource[0].start);
586 m48t59_rtc.resource = &op->resource[0];
587 return platform_device_register(&m48t59_rtc);
590 static struct of_device_id mostek_match[] = {
597 static struct of_platform_driver mostek_driver = {
598 .match_table = mostek_match,
599 .probe = mostek_probe,
605 static struct platform_device rtc_sun4v_device = {
610 static int __init clock_init(void)
612 if (this_is_starfire) {
613 xtime.tv_sec = starfire_get_time();
614 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
615 set_normalized_timespec(&wall_to_monotonic,
616 -xtime.tv_sec, -xtime.tv_nsec);
619 if (tlb_type == hypervisor)
620 return platform_device_register(&rtc_sun4v_device);
622 (void) of_register_driver(&rtc_driver, &of_platform_bus_type);
623 (void) of_register_driver(&mostek_driver, &of_platform_bus_type);
624 (void) of_register_driver(&bq4802_driver, &of_platform_bus_type);
629 /* Must be after subsys_initcall() so that busses are probed. Must
630 * be before device_initcall() because things like the RTC driver
631 * need to see the clock registers.
633 fs_initcall(clock_init);
635 /* This is gets the master TICK_INT timer going. */
636 static unsigned long sparc64_init_timers(void)
638 struct device_node *dp;
641 dp = of_find_node_by_path("/");
642 if (tlb_type == spitfire) {
643 unsigned long ver, manuf, impl;
645 __asm__ __volatile__ ("rdpr %%ver, %0"
647 manuf = ((ver >> 48) & 0xffff);
648 impl = ((ver >> 32) & 0xffff);
649 if (manuf == 0x17 && impl == 0x13) {
650 /* Hummingbird, aka Ultra-IIe */
651 tick_ops = &hbtick_operations;
652 clock = of_getintprop_default(dp, "stick-frequency", 0);
654 tick_ops = &tick_operations;
655 clock = local_cpu_data().clock_tick;
658 tick_ops = &stick_operations;
659 clock = of_getintprop_default(dp, "stick-frequency", 0);
666 unsigned long clock_tick_ref;
667 unsigned int ref_freq;
669 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
671 unsigned long sparc64_get_clock_tick(unsigned int cpu)
673 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
675 if (ft->clock_tick_ref)
676 return ft->clock_tick_ref;
677 return cpu_data(cpu).clock_tick;
680 #ifdef CONFIG_CPU_FREQ
682 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
685 struct cpufreq_freqs *freq = data;
686 unsigned int cpu = freq->cpu;
687 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
690 ft->ref_freq = freq->old;
691 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
693 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
694 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
695 (val == CPUFREQ_RESUMECHANGE)) {
696 cpu_data(cpu).clock_tick =
697 cpufreq_scale(ft->clock_tick_ref,
705 static struct notifier_block sparc64_cpufreq_notifier_block = {
706 .notifier_call = sparc64_cpufreq_notifier
709 static int __init register_sparc64_cpufreq_notifier(void)
712 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
713 CPUFREQ_TRANSITION_NOTIFIER);
717 core_initcall(register_sparc64_cpufreq_notifier);
719 #endif /* CONFIG_CPU_FREQ */
721 static int sparc64_next_event(unsigned long delta,
722 struct clock_event_device *evt)
724 return tick_ops->add_compare(delta) ? -ETIME : 0;
727 static void sparc64_timer_setup(enum clock_event_mode mode,
728 struct clock_event_device *evt)
731 case CLOCK_EVT_MODE_ONESHOT:
732 case CLOCK_EVT_MODE_RESUME:
735 case CLOCK_EVT_MODE_SHUTDOWN:
736 tick_ops->disable_irq();
739 case CLOCK_EVT_MODE_PERIODIC:
740 case CLOCK_EVT_MODE_UNUSED:
746 static struct clock_event_device sparc64_clockevent = {
747 .features = CLOCK_EVT_FEAT_ONESHOT,
748 .set_mode = sparc64_timer_setup,
749 .set_next_event = sparc64_next_event,
754 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
756 void timer_interrupt(int irq, struct pt_regs *regs)
758 struct pt_regs *old_regs = set_irq_regs(regs);
759 unsigned long tick_mask = tick_ops->softint_mask;
760 int cpu = smp_processor_id();
761 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
763 clear_softint(tick_mask);
767 kstat_this_cpu.irqs[0]++;
769 if (unlikely(!evt->event_handler)) {
771 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
773 evt->event_handler(evt);
777 set_irq_regs(old_regs);
780 void __devinit setup_sparc64_timer(void)
782 struct clock_event_device *sevt;
783 unsigned long pstate;
785 /* Guarantee that the following sequences execute
788 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
789 "wrpr %0, %1, %%pstate"
793 tick_ops->init_tick();
795 /* Restore PSTATE_IE. */
796 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
800 sevt = &__get_cpu_var(sparc64_events);
802 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
803 sevt->cpumask = cpumask_of_cpu(smp_processor_id());
805 clockevents_register_device(sevt);
808 #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
810 static struct clocksource clocksource_tick = {
812 .mask = CLOCKSOURCE_MASK(64),
814 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
817 static void __init setup_clockevent_multiplier(unsigned long hz)
819 unsigned long mult, shift = 32;
822 mult = div_sc(hz, NSEC_PER_SEC, shift);
823 if (mult && (mult >> 32UL) == 0UL)
829 sparc64_clockevent.shift = shift;
830 sparc64_clockevent.mult = mult;
833 static unsigned long tb_ticks_per_usec __read_mostly;
835 void __delay(unsigned long loops)
837 unsigned long bclock, now;
839 bclock = tick_ops->get_tick();
841 now = tick_ops->get_tick();
842 } while ((now-bclock) < loops);
844 EXPORT_SYMBOL(__delay);
846 void udelay(unsigned long usecs)
848 __delay(tb_ticks_per_usec * usecs);
850 EXPORT_SYMBOL(udelay);
852 void __init time_init(void)
854 unsigned long clock = sparc64_init_timers();
856 tb_ticks_per_usec = clock / USEC_PER_SEC;
858 timer_ticks_per_nsec_quotient =
859 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
861 clocksource_tick.name = tick_ops->name;
862 clocksource_tick.mult =
863 clocksource_hz2mult(clock,
864 clocksource_tick.shift);
865 clocksource_tick.read = tick_ops->get_tick;
867 printk("clocksource: mult[%x] shift[%d]\n",
868 clocksource_tick.mult, clocksource_tick.shift);
870 clocksource_register(&clocksource_tick);
872 sparc64_clockevent.name = tick_ops->name;
874 setup_clockevent_multiplier(clock);
876 sparc64_clockevent.max_delta_ns =
877 clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
878 sparc64_clockevent.min_delta_ns =
879 clockevent_delta2ns(0xF, &sparc64_clockevent);
881 printk("clockevent: mult[%lx] shift[%d]\n",
882 sparc64_clockevent.mult, sparc64_clockevent.shift);
884 setup_sparc64_timer();
887 unsigned long long sched_clock(void)
889 unsigned long ticks = tick_ops->get_tick();
891 return (ticks * timer_ticks_per_nsec_quotient)
892 >> SPARC64_NSEC_PER_CYC_SHIFT;
895 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
896 static unsigned char mini_rtc_status; /* bitmapped status byte. */
899 #define STARTOFTIME 1970
900 #define SECDAY 86400L
901 #define SECYR (SECDAY * 365)
902 #define leapyear(year) ((year) % 4 == 0 && \
903 ((year) % 100 != 0 || (year) % 400 == 0))
904 #define days_in_year(a) (leapyear(a) ? 366 : 365)
905 #define days_in_month(a) (month_days[(a) - 1])
907 static int month_days[12] = {
908 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
912 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
914 static void GregorianDay(struct rtc_time * tm)
919 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
921 lastYear = tm->tm_year - 1;
924 * Number of leap corrections to apply up to end of last year
926 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
929 * This year is a leap year if it is divisible by 4 except when it is
930 * divisible by 100 unless it is divisible by 400
932 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
934 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
936 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
939 tm->tm_wday = day % 7;
942 static void to_tm(int tim, struct rtc_time *tm)
945 register long hms, day;
950 /* Hours, minutes, seconds are easy */
951 tm->tm_hour = hms / 3600;
952 tm->tm_min = (hms % 3600) / 60;
953 tm->tm_sec = (hms % 3600) % 60;
955 /* Number of years in days */
956 for (i = STARTOFTIME; day >= days_in_year(i); i++)
957 day -= days_in_year(i);
960 /* Number of months in days left */
961 if (leapyear(tm->tm_year))
962 days_in_month(FEBRUARY) = 29;
963 for (i = 1; day >= days_in_month(i); i++)
964 day -= days_in_month(i);
965 days_in_month(FEBRUARY) = 28;
968 /* Days are what is left over (+1) from all that. */
969 tm->tm_mday = day + 1;
972 * Determine the day of week
977 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
978 * aka Unix time. So we have to convert to/from rtc_time.
980 static void starfire_get_rtc_time(struct rtc_time *time)
982 u32 seconds = starfire_get_time();
984 to_tm(seconds, time);
985 time->tm_year -= 1900;
989 static int starfire_set_rtc_time(struct rtc_time *time)
991 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
992 time->tm_mday, time->tm_hour,
993 time->tm_min, time->tm_sec);
995 return starfire_set_time(seconds);
998 struct mini_rtc_ops {
999 void (*get_rtc_time)(struct rtc_time *);
1000 int (*set_rtc_time)(struct rtc_time *);
1003 static struct mini_rtc_ops starfire_rtc_ops = {
1004 .get_rtc_time = starfire_get_rtc_time,
1005 .set_rtc_time = starfire_set_rtc_time,
1008 static struct mini_rtc_ops *mini_rtc_ops;
1010 static inline void mini_get_rtc_time(struct rtc_time *time)
1012 unsigned long flags;
1014 spin_lock_irqsave(&rtc_lock, flags);
1015 mini_rtc_ops->get_rtc_time(time);
1016 spin_unlock_irqrestore(&rtc_lock, flags);
1019 static inline int mini_set_rtc_time(struct rtc_time *time)
1021 unsigned long flags;
1024 spin_lock_irqsave(&rtc_lock, flags);
1025 err = mini_rtc_ops->set_rtc_time(time);
1026 spin_unlock_irqrestore(&rtc_lock, flags);
1031 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1032 unsigned int cmd, unsigned long arg)
1034 struct rtc_time wtime;
1035 void __user *argp = (void __user *)arg;
1045 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1048 case RTC_UIE_ON: /* enable ints for RTC updates. */
1051 case RTC_RD_TIME: /* Read the time/date from RTC */
1052 /* this doesn't get week-day, who cares */
1053 memset(&wtime, 0, sizeof(wtime));
1054 mini_get_rtc_time(&wtime);
1056 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1058 case RTC_SET_TIME: /* Set the RTC */
1062 if (!capable(CAP_SYS_TIME))
1065 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1068 year = wtime.tm_year + 1900;
1069 days = month_days[wtime.tm_mon] +
1070 ((wtime.tm_mon == 1) && leapyear(year));
1072 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1073 (wtime.tm_mday < 1))
1076 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1079 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1080 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1081 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1084 return mini_set_rtc_time(&wtime);
1091 static int mini_rtc_open(struct inode *inode, struct file *file)
1094 if (mini_rtc_status & RTC_IS_OPEN) {
1099 mini_rtc_status |= RTC_IS_OPEN;
1105 static int mini_rtc_release(struct inode *inode, struct file *file)
1107 mini_rtc_status &= ~RTC_IS_OPEN;
1112 static const struct file_operations mini_rtc_fops = {
1113 .owner = THIS_MODULE,
1114 .ioctl = mini_rtc_ioctl,
1115 .open = mini_rtc_open,
1116 .release = mini_rtc_release,
1119 static struct miscdevice rtc_mini_dev =
1123 .fops = &mini_rtc_fops,
1126 static int __init rtc_mini_init(void)
1130 if (this_is_starfire)
1131 mini_rtc_ops = &starfire_rtc_ops;
1135 printk(KERN_INFO "Mini RTC Driver\n");
1137 retval = misc_register(&rtc_mini_dev);
1144 static void __exit rtc_mini_exit(void)
1146 misc_deregister(&rtc_mini_dev);
1149 int __devinit read_current_timer(unsigned long *timer_val)
1151 *timer_val = tick_ops->get_tick();
1155 module_init(rtc_mini_init);
1156 module_exit(rtc_mini_exit);