2 * Renesas System Solutions Asia Pte. Ltd - Migo-R
4 * Copyright (C) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/interrupt.h>
13 #include <linux/input.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/mtd/nand.h>
16 #include <linux/i2c.h>
17 #include <linux/smc91x.h>
18 #include <linux/delay.h>
19 #include <linux/clk.h>
20 #include <linux/gpio.h>
21 #include <media/sh_mobile_ceu.h>
22 #include <media/ov772x.h>
23 #include <video/sh_mobile_lcdc.h>
24 #include <asm/clock.h>
25 #include <asm/machvec.h>
27 #include <asm/sh_keysc.h>
28 #include <mach/migor.h>
29 #include <cpu/sh7722.h>
31 /* Address IRQ Size Bus Description
32 * 0x00000000 64MB 16 NOR Flash (SP29PL256N)
33 * 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
34 * 0x10000000 IRQ0 16 Ethernet (SMC91C111)
35 * 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
36 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
39 static struct smc91x_platdata smc91x_info = {
40 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
43 static struct resource smc91x_eth_resources[] = {
48 .flags = IORESOURCE_MEM,
51 .start = 32, /* IRQ0 */
52 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
56 static struct platform_device smc91x_eth_device = {
58 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
59 .resource = smc91x_eth_resources,
61 .platform_data = &smc91x_info,
65 static struct sh_keysc_info sh_keysc_info = {
66 .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
70 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
71 0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
72 0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
73 0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
74 0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
78 static struct resource sh_keysc_resources[] = {
82 .flags = IORESOURCE_MEM,
86 .flags = IORESOURCE_IRQ,
90 static struct platform_device sh_keysc_device = {
92 .id = 0, /* "keysc0" clock */
93 .num_resources = ARRAY_SIZE(sh_keysc_resources),
94 .resource = sh_keysc_resources,
96 .platform_data = &sh_keysc_info,
100 static struct mtd_partition migor_nor_flash_partitions[] =
105 .size = (1 * 1024 * 1024),
106 .mask_flags = MTD_WRITEABLE, /* Read-only */
110 .offset = MTDPART_OFS_APPEND,
111 .size = (15 * 1024 * 1024),
115 .offset = MTDPART_OFS_APPEND,
116 .size = MTDPART_SIZ_FULL,
120 static struct physmap_flash_data migor_nor_flash_data = {
122 .parts = migor_nor_flash_partitions,
123 .nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
126 static struct resource migor_nor_flash_resources[] = {
131 .flags = IORESOURCE_MEM,
135 static struct platform_device migor_nor_flash_device = {
136 .name = "physmap-flash",
137 .resource = migor_nor_flash_resources,
138 .num_resources = ARRAY_SIZE(migor_nor_flash_resources),
140 .platform_data = &migor_nor_flash_data,
144 static struct mtd_partition migor_nand_flash_partitions[] = {
148 .size = 512 * 1024 * 1024,
152 .offset = MTDPART_OFS_APPEND,
153 .size = 512 * 1024 * 1024,
157 static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
160 struct nand_chip *chip = mtd->priv;
162 if (cmd == NAND_CMD_NONE)
166 writeb(cmd, chip->IO_ADDR_W + 0x00400000);
167 else if (ctrl & NAND_ALE)
168 writeb(cmd, chip->IO_ADDR_W + 0x00800000);
170 writeb(cmd, chip->IO_ADDR_W);
173 static int migor_nand_flash_ready(struct mtd_info *mtd)
175 return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
178 struct platform_nand_data migor_nand_flash_data = {
181 .partitions = migor_nand_flash_partitions,
182 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
184 .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
187 .dev_ready = migor_nand_flash_ready,
188 .cmd_ctrl = migor_nand_flash_cmd_ctl,
192 static struct resource migor_nand_flash_resources[] = {
194 .name = "NAND Flash",
197 .flags = IORESOURCE_MEM,
201 static struct platform_device migor_nand_flash_device = {
203 .resource = migor_nand_flash_resources,
204 .num_resources = ARRAY_SIZE(migor_nand_flash_resources),
206 .platform_data = &migor_nand_flash_data,
210 static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
211 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
212 .clock_source = LCDC_CLK_BUS,
214 .chan = LCDC_CHAN_MAINLCD,
216 .interface_type = RGB16,
230 .lcd_size_cfg = { /* 7.0 inch */
236 #ifdef CONFIG_SH_MIGOR_QVGA
237 .clock_source = LCDC_CLK_PERIPHERAL,
239 .chan = LCDC_CHAN_MAINLCD,
241 .interface_type = SYS16A,
253 .sync = FB_SYNC_HOR_HIGH_ACT,
255 .lcd_size_cfg = { /* 2.4 inch */
260 .setup_sys = migor_lcd_qvga_setup,
263 .ldmt2r = 0x06000a09,
264 .ldmt3r = 0x180e3418,
265 /* set 1s delay to encourage fsync() */
266 .deferred_io_msec = 1000,
272 static struct resource migor_lcdc_resources[] = {
275 .start = 0xfe940000, /* P4-only space */
277 .flags = IORESOURCE_MEM,
281 .flags = IORESOURCE_IRQ,
285 static struct platform_device migor_lcdc_device = {
286 .name = "sh_mobile_lcdc_fb",
287 .num_resources = ARRAY_SIZE(migor_lcdc_resources),
288 .resource = migor_lcdc_resources,
290 .platform_data = &sh_mobile_lcdc_info,
294 static struct clk *camera_clk;
296 static void camera_power_on(void)
298 /* Use 10 MHz VIO_CKO instead of 24 MHz to work
299 * around signal quality issues on Panel Board V2.1.
301 camera_clk = clk_get(NULL, "video_clk");
302 clk_set_rate(camera_clk, 10000000);
303 clk_enable(camera_clk); /* start VIO_CKO */
305 /* use VIO_RST to take camera out of reset */
307 gpio_set_value(GPIO_PTT3, 0);
309 gpio_set_value(GPIO_PTT3, 1);
310 mdelay(10); /* wait to let chip come out of reset */
313 static void camera_power_off(void)
315 clk_disable(camera_clk); /* stop VIO_CKO */
318 gpio_set_value(GPIO_PTT3, 0);
321 static int ov7725_power(struct device *dev, int mode)
331 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
332 .flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \
333 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH,
336 static struct resource migor_ceu_resources[] = {
341 .flags = IORESOURCE_MEM,
345 .flags = IORESOURCE_IRQ,
348 /* place holder for contiguous memory */
352 static struct platform_device migor_ceu_device = {
353 .name = "sh_mobile_ceu",
354 .id = 0, /* "ceu0" clock */
355 .num_resources = ARRAY_SIZE(migor_ceu_resources),
356 .resource = migor_ceu_resources,
358 .platform_data = &sh_mobile_ceu_info,
362 static struct ov772x_camera_info ov7725_info = {
363 .buswidth = SOCAM_DATAWIDTH_8,
365 .power = ov7725_power,
369 static struct platform_device *migor_devices[] __initdata = {
374 &migor_nor_flash_device,
375 &migor_nand_flash_device,
378 static struct i2c_board_info migor_i2c_devices[] = {
380 I2C_BOARD_INFO("rs5c372b", 0x32),
383 I2C_BOARD_INFO("migor_ts", 0x51),
384 .irq = 38, /* IRQ6 */
387 I2C_BOARD_INFO("ov772x", 0x21),
388 .platform_data = &ov7725_info,
392 static int __init migor_devices_setup(void)
395 gpio_request(GPIO_PTJ7, NULL);
396 gpio_direction_output(GPIO_PTJ7, 1);
397 gpio_export(GPIO_PTJ7, 0);
400 gpio_request(GPIO_PTJ5, NULL);
401 gpio_direction_output(GPIO_PTJ5, 1);
402 gpio_export(GPIO_PTJ5, 0);
404 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
405 gpio_request(GPIO_FN_IRQ0, NULL);
406 ctrl_outl(0x00003400, BSC_CS4BCR);
407 ctrl_outl(0x00110080, BSC_CS4WCR);
410 gpio_request(GPIO_FN_KEYOUT0, NULL);
411 gpio_request(GPIO_FN_KEYOUT1, NULL);
412 gpio_request(GPIO_FN_KEYOUT2, NULL);
413 gpio_request(GPIO_FN_KEYOUT3, NULL);
414 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
415 gpio_request(GPIO_FN_KEYIN1, NULL);
416 gpio_request(GPIO_FN_KEYIN2, NULL);
417 gpio_request(GPIO_FN_KEYIN3, NULL);
418 gpio_request(GPIO_FN_KEYIN4, NULL);
419 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
422 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
423 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
424 gpio_request(GPIO_PTA1, NULL);
425 gpio_direction_input(GPIO_PTA1);
428 gpio_request(GPIO_FN_IRQ6, NULL);
431 #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
432 gpio_request(GPIO_FN_LCDD17, NULL);
433 gpio_request(GPIO_FN_LCDD16, NULL);
434 gpio_request(GPIO_FN_LCDD15, NULL);
435 gpio_request(GPIO_FN_LCDD14, NULL);
436 gpio_request(GPIO_FN_LCDD13, NULL);
437 gpio_request(GPIO_FN_LCDD12, NULL);
438 gpio_request(GPIO_FN_LCDD11, NULL);
439 gpio_request(GPIO_FN_LCDD10, NULL);
440 gpio_request(GPIO_FN_LCDD8, NULL);
441 gpio_request(GPIO_FN_LCDD7, NULL);
442 gpio_request(GPIO_FN_LCDD6, NULL);
443 gpio_request(GPIO_FN_LCDD5, NULL);
444 gpio_request(GPIO_FN_LCDD4, NULL);
445 gpio_request(GPIO_FN_LCDD3, NULL);
446 gpio_request(GPIO_FN_LCDD2, NULL);
447 gpio_request(GPIO_FN_LCDD1, NULL);
448 gpio_request(GPIO_FN_LCDRS, NULL);
449 gpio_request(GPIO_FN_LCDCS, NULL);
450 gpio_request(GPIO_FN_LCDRD, NULL);
451 gpio_request(GPIO_FN_LCDWR, NULL);
452 gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
453 gpio_direction_output(GPIO_PTH2, 1);
455 #ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
456 gpio_request(GPIO_FN_LCDD15, NULL);
457 gpio_request(GPIO_FN_LCDD14, NULL);
458 gpio_request(GPIO_FN_LCDD13, NULL);
459 gpio_request(GPIO_FN_LCDD12, NULL);
460 gpio_request(GPIO_FN_LCDD11, NULL);
461 gpio_request(GPIO_FN_LCDD10, NULL);
462 gpio_request(GPIO_FN_LCDD9, NULL);
463 gpio_request(GPIO_FN_LCDD8, NULL);
464 gpio_request(GPIO_FN_LCDD7, NULL);
465 gpio_request(GPIO_FN_LCDD6, NULL);
466 gpio_request(GPIO_FN_LCDD5, NULL);
467 gpio_request(GPIO_FN_LCDD4, NULL);
468 gpio_request(GPIO_FN_LCDD3, NULL);
469 gpio_request(GPIO_FN_LCDD2, NULL);
470 gpio_request(GPIO_FN_LCDD1, NULL);
471 gpio_request(GPIO_FN_LCDD0, NULL);
472 gpio_request(GPIO_FN_LCDLCLK, NULL);
473 gpio_request(GPIO_FN_LCDDCK, NULL);
474 gpio_request(GPIO_FN_LCDVEPWC, NULL);
475 gpio_request(GPIO_FN_LCDVCPWC, NULL);
476 gpio_request(GPIO_FN_LCDVSYN, NULL);
477 gpio_request(GPIO_FN_LCDHSYN, NULL);
478 gpio_request(GPIO_FN_LCDDISP, NULL);
479 gpio_request(GPIO_FN_LCDDON, NULL);
483 gpio_request(GPIO_FN_VIO_CLK2, NULL);
484 gpio_request(GPIO_FN_VIO_VD2, NULL);
485 gpio_request(GPIO_FN_VIO_HD2, NULL);
486 gpio_request(GPIO_FN_VIO_FLD, NULL);
487 gpio_request(GPIO_FN_VIO_CKO, NULL);
488 gpio_request(GPIO_FN_VIO_D15, NULL);
489 gpio_request(GPIO_FN_VIO_D14, NULL);
490 gpio_request(GPIO_FN_VIO_D13, NULL);
491 gpio_request(GPIO_FN_VIO_D12, NULL);
492 gpio_request(GPIO_FN_VIO_D11, NULL);
493 gpio_request(GPIO_FN_VIO_D10, NULL);
494 gpio_request(GPIO_FN_VIO_D9, NULL);
495 gpio_request(GPIO_FN_VIO_D8, NULL);
497 gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
498 gpio_direction_output(GPIO_PTT3, 0);
499 gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
500 gpio_direction_output(GPIO_PTT2, 1);
501 gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
502 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
503 gpio_direction_output(GPIO_PTT0, 0);
505 gpio_direction_output(GPIO_PTT0, 1);
507 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
509 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
511 i2c_register_board_info(0, migor_i2c_devices,
512 ARRAY_SIZE(migor_i2c_devices));
514 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
516 __initcall(migor_devices_setup);