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sh: ap325rxa: Add support RTC RX-8564LC in AP325RXA board
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1 /*
2  * Renesas - AP-325RXA
3  * (Compatible with Algo System ., LTD. - AP-320A)
4  *
5  * Copyright (C) 2008 Renesas Solutions Corp.
6  * Author : Yusuke Goda <goda.yuske@renesas.com>
7  *
8  * This file is subject to the terms and conditions of the GNU General Public
9  * License.  See the file "COPYING" in the main directory of this archive
10  * for more details.
11  */
12
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/delay.h>
19 #include <linux/i2c.h>
20 #include <linux/smc911x.h>
21 #include <media/soc_camera_platform.h>
22 #include <media/sh_mobile_ceu.h>
23 #include <video/sh_mobile_lcdc.h>
24 #include <asm/io.h>
25 #include <asm/clock.h>
26
27 static struct smc911x_platdata smc911x_info = {
28         .flags = SMC911X_USE_32BIT,
29         .irq_flags = IRQF_TRIGGER_LOW,
30 };
31
32 static struct resource smc9118_resources[] = {
33         [0] = {
34                 .start  = 0xb6080000,
35                 .end    = 0xb60fffff,
36                 .flags  = IORESOURCE_MEM,
37         },
38         [1] = {
39                 .start  = 35,
40                 .end    = 35,
41                 .flags  = IORESOURCE_IRQ,
42         }
43 };
44
45 static struct platform_device smc9118_device = {
46         .name           = "smc911x",
47         .id             = -1,
48         .num_resources  = ARRAY_SIZE(smc9118_resources),
49         .resource       = smc9118_resources,
50         .dev            = {
51                 .platform_data = &smc911x_info,
52         },
53 };
54
55 /*
56  * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
57  * If this area erased, this board can not boot.
58  */
59 static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
60         {
61                 .name = "uboot",
62                 .offset = 0,
63                 .size = (1 * 1024 * 1024),
64                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
65         }, {
66                 .name = "kernel",
67                 .offset = MTDPART_OFS_APPEND,
68                 .size = (2 * 1024 * 1024),
69         }, {
70                 .name = "free-area0",
71                 .offset = MTDPART_OFS_APPEND,
72                 .size = ((7 * 1024 * 1024) + (512 * 1024)),
73         }, {
74                 .name = "CPLD-Data",
75                 .offset = MTDPART_OFS_APPEND,
76                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
77                 .size = (1024 * 128 * 2),
78         }, {
79                 .name = "free-area1",
80                 .offset = MTDPART_OFS_APPEND,
81                 .size = MTDPART_SIZ_FULL,
82         },
83 };
84
85 static struct physmap_flash_data ap325rxa_nor_flash_data = {
86         .width          = 2,
87         .parts          = ap325rxa_nor_flash_partitions,
88         .nr_parts       = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
89 };
90
91 static struct resource ap325rxa_nor_flash_resources[] = {
92         [0] = {
93                 .name   = "NOR Flash",
94                 .start  = 0x00000000,
95                 .end    = 0x00ffffff,
96                 .flags  = IORESOURCE_MEM,
97         }
98 };
99
100 static struct platform_device ap325rxa_nor_flash_device = {
101         .name           = "physmap-flash",
102         .resource       = ap325rxa_nor_flash_resources,
103         .num_resources  = ARRAY_SIZE(ap325rxa_nor_flash_resources),
104         .dev            = {
105                 .platform_data = &ap325rxa_nor_flash_data,
106         },
107 };
108
109 #define FPGA_LCDREG     0xB4100180
110 #define FPGA_BKLREG     0xB4100212
111 #define FPGA_LCDREG_VAL 0x0018
112 #define PORT_PHCR       0xA405010E
113 #define PORT_PLCR       0xA4050114
114 #define PORT_PMCR       0xA4050116
115 #define PORT_PRCR       0xA405011C
116 #define PORT_PSCR       0xA405011E
117 #define PORT_PZCR       0xA405014C
118 #define PORT_HIZCRA     0xA4050158
119 #define PORT_MSELCRB    0xA4050182
120 #define PORT_PSDR       0xA405013E
121 #define PORT_PZDR       0xA405016C
122 #define PORT_PSELD      0xA4050154
123
124 static void ap320_wvga_power_on(void *board_data)
125 {
126         msleep(100);
127
128         /* ASD AP-320/325 LCD ON */
129         ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
130
131         /* backlight */
132         ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR);
133         ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
134         ctrl_outw(0x100, FPGA_BKLREG);
135 }
136
137 static struct sh_mobile_lcdc_info lcdc_info = {
138         .clock_source = LCDC_CLK_EXTERNAL,
139         .ch[0] = {
140                 .chan = LCDC_CHAN_MAINLCD,
141                 .bpp = 16,
142                 .interface_type = RGB18,
143                 .clock_divider = 1,
144                 .lcd_cfg = {
145                         .name = "LB070WV1",
146                         .xres = 800,
147                         .yres = 480,
148                         .left_margin = 40,
149                         .right_margin = 160,
150                         .hsync_len = 8,
151                         .upper_margin = 63,
152                         .lower_margin = 80,
153                         .vsync_len = 1,
154                         .sync = 0, /* hsync and vsync are active low */
155                 },
156                 .lcd_size_cfg = { /* 7.0 inch */
157                         .width = 152,
158                         .height = 91,
159                 },
160                 .board_cfg = {
161                         .display_on = ap320_wvga_power_on,
162                 },
163         }
164 };
165
166 static struct resource lcdc_resources[] = {
167         [0] = {
168                 .name   = "LCDC",
169                 .start  = 0xfe940000, /* P4-only space */
170                 .end    = 0xfe941fff,
171                 .flags  = IORESOURCE_MEM,
172         },
173 };
174
175 static struct platform_device lcdc_device = {
176         .name           = "sh_mobile_lcdc_fb",
177         .num_resources  = ARRAY_SIZE(lcdc_resources),
178         .resource       = lcdc_resources,
179         .dev            = {
180                 .platform_data  = &lcdc_info,
181         },
182 };
183
184 #ifdef CONFIG_I2C
185 static unsigned char camera_ncm03j_magic[] =
186 {
187         0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
188         0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
189         0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
190         0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
191         0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
192         0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
193         0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
194         0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
195         0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
196         0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
197         0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
198         0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
199         0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
200         0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
201         0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
202         0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
203 };
204
205 static int camera_set_capture(struct soc_camera_platform_info *info,
206                               int enable)
207 {
208         struct i2c_adapter *a = i2c_get_adapter(0);
209         struct i2c_msg msg;
210         int ret = 0;
211         int i;
212
213         if (!enable)
214                 return 0; /* no disable for now */
215
216         for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
217                 u_int8_t buf[8];
218
219                 msg.addr = 0x6e;
220                 msg.buf = buf;
221                 msg.len = 2;
222                 msg.flags = 0;
223
224                 buf[0] = camera_ncm03j_magic[i];
225                 buf[1] = camera_ncm03j_magic[i + 1];
226
227                 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
228         }
229
230         return ret;
231 }
232
233 static struct soc_camera_platform_info camera_info = {
234         .iface = 0,
235         .format_name = "UYVY",
236         .format_depth = 16,
237         .format = {
238                 .pixelformat = V4L2_PIX_FMT_UYVY,
239                 .colorspace = V4L2_COLORSPACE_SMPTE170M,
240                 .width = 640,
241                 .height = 480,
242         },
243         .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
244         SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
245         .set_capture = camera_set_capture,
246 };
247
248 static struct platform_device camera_device = {
249         .name           = "soc_camera_platform",
250         .dev            = {
251                 .platform_data  = &camera_info,
252         },
253 };
254 #endif /* CONFIG_I2C */
255
256 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
257         .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
258         SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
259 };
260
261 static struct resource ceu_resources[] = {
262         [0] = {
263                 .name   = "CEU",
264                 .start  = 0xfe910000,
265                 .end    = 0xfe91009f,
266                 .flags  = IORESOURCE_MEM,
267         },
268         [1] = {
269                 .start  = 52,
270                 .flags  = IORESOURCE_IRQ,
271         },
272         [2] = {
273                 /* place holder for contiguous memory */
274         },
275 };
276
277 static struct platform_device ceu_device = {
278         .name           = "sh_mobile_ceu",
279         .num_resources  = ARRAY_SIZE(ceu_resources),
280         .resource       = ceu_resources,
281         .dev            = {
282                 .platform_data  = &sh_mobile_ceu_info,
283         },
284 };
285
286 static struct platform_device *ap325rxa_devices[] __initdata = {
287         &smc9118_device,
288         &ap325rxa_nor_flash_device,
289         &lcdc_device,
290         &ceu_device,
291 #ifdef CONFIG_I2C
292         &camera_device,
293 #endif
294 };
295
296 static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
297         {
298                 I2C_BOARD_INFO("pcf8563", 0x51),
299         },
300 };
301
302 static int __init ap325rxa_devices_setup(void)
303 {
304         clk_always_enable("mstp200"); /* LCDC */
305         clk_always_enable("mstp203"); /* CEU */
306
307         platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
308
309         i2c_register_board_info(0, ap325rxa_i2c_devices,
310                                 ARRAY_SIZE(ap325rxa_i2c_devices));
311  
312         return platform_add_devices(ap325rxa_devices,
313                                 ARRAY_SIZE(ap325rxa_devices));
314 }
315 device_initcall(ap325rxa_devices_setup);
316
317 static void __init ap325rxa_setup(char **cmdline_p)
318 {
319         /* LCDC configuration */
320         ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
321         ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
322         ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
323         ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
324         ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
325
326         /* CEU */
327         ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
328         ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
329         ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
330         ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
331 }
332
333 static struct sh_machine_vector mv_ap325rxa __initmv = {
334         .mv_name = "AP-325RXA",
335         .mv_setup = ap325rxa_setup,
336 };