2 * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
4 * Authors: Shlomi Gridish <gridish@freescale.com>
5 * Li Yang <leoli@freescale.com>
6 * Based on cpm2_common.c from Dan Malek (dmalek@jlc.net)
9 * General Purpose functions for the global management of the
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/param.h>
21 #include <linux/string.h>
23 #include <linux/interrupt.h>
24 #include <linux/bootmem.h>
25 #include <linux/module.h>
26 #include <linux/delay.h>
27 #include <linux/ioport.h>
28 #include <linux/crc32.h>
31 #include <asm/pgtable.h>
32 #include <asm/immap_qe.h>
35 #include <asm/rheap.h>
37 static void qe_snums_init(void);
38 static void qe_muram_init(void);
39 static int qe_sdma_init(void);
41 static DEFINE_SPINLOCK(qe_lock);
52 enum qe_snum_state state;
55 /* We allocate this here because it is used almost exclusively for
56 * the communication processor devices.
58 struct qe_immap __iomem *qe_immr;
59 EXPORT_SYMBOL(qe_immr);
61 static struct qe_snum snums[QE_NUM_OF_SNUM]; /* Dynamically allocated SNUMs */
63 static phys_addr_t qebase = -1;
65 phys_addr_t get_qe_base(void)
67 struct device_node *qe;
74 qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
76 qe = of_find_node_by_type(NULL, "qe");
81 prop = of_get_property(qe, "reg", &size);
82 if (prop && size >= sizeof(*prop))
83 qebase = of_translate_address(qe, prop);
89 EXPORT_SYMBOL(get_qe_base);
94 qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE);
98 qe_issue_cmd(QE_RESET, QE_CR_SUBBLOCK_INVALID,
99 QE_CR_PROTOCOL_UNSPECIFIED, 0);
101 /* Reclaim the MURAM memory for our use. */
105 panic("sdma init failed!");
108 int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input)
111 u8 mcn_shift = 0, dev_shift = 0;
113 spin_lock_irqsave(&qe_lock, flags);
114 if (cmd == QE_RESET) {
115 out_be32(&qe_immr->cp.cecr, (u32) (cmd | QE_CR_FLG));
117 if (cmd == QE_ASSIGN_PAGE) {
118 /* Here device is the SNUM, not sub-block */
119 dev_shift = QE_CR_SNUM_SHIFT;
120 } else if (cmd == QE_ASSIGN_RISC) {
121 /* Here device is the SNUM, and mcnProtocol is
122 * e_QeCmdRiscAssignment value */
123 dev_shift = QE_CR_SNUM_SHIFT;
124 mcn_shift = QE_CR_MCN_RISC_ASSIGN_SHIFT;
126 if (device == QE_CR_SUBBLOCK_USB)
127 mcn_shift = QE_CR_MCN_USB_SHIFT;
129 mcn_shift = QE_CR_MCN_NORMAL_SHIFT;
132 out_be32(&qe_immr->cp.cecdr, cmd_input);
133 out_be32(&qe_immr->cp.cecr,
134 (cmd | QE_CR_FLG | ((u32) device << dev_shift) | (u32)
135 mcn_protocol << mcn_shift));
138 /* wait for the QE_CR_FLG to clear */
139 while(in_be32(&qe_immr->cp.cecr) & QE_CR_FLG)
141 spin_unlock_irqrestore(&qe_lock, flags);
145 EXPORT_SYMBOL(qe_issue_cmd);
147 /* Set a baud rate generator. This needs lots of work. There are
148 * 16 BRGs, which can be connected to the QE channels or output
149 * as clocks. The BRGs are in two different block of internal
150 * memory mapped space.
151 * The BRG clock is the QE clock divided by 2.
152 * It was set up long ago during the initial boot phase and is
154 * Baud rate clocks are zero-based in the driver code (as that maps
155 * to port numbers). Documentation uses 1-based numbering.
157 static unsigned int brg_clk = 0;
159 unsigned int get_brg_clk(void)
161 struct device_node *qe;
168 qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
170 qe = of_find_node_by_type(NULL, "qe");
175 prop = of_get_property(qe, "brg-frequency", &size);
176 if (prop && size == sizeof(*prop))
184 /* Program the BRG to the given sampling rate and multiplier
186 * @brg: the BRG, QE_BRG1 - QE_BRG16
187 * @rate: the desired sampling rate
188 * @multiplier: corresponds to the value programmed in GUMR_L[RDCR] or
189 * GUMR_L[TDCR]. E.g., if this BRG is the RX clock, and GUMR_L[RDCR]=01,
190 * then 'multiplier' should be 8.
192 int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
194 u32 divisor, tempval;
197 if ((brg < QE_BRG1) || (brg > QE_BRG16))
200 divisor = get_brg_clk() / (rate * multiplier);
202 if (divisor > QE_BRGC_DIVISOR_MAX + 1) {
203 div16 = QE_BRGC_DIV16;
207 /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
208 that the BRG divisor must be even if you're not using divide-by-16
210 if (!div16 && (divisor & 1))
213 tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |
214 QE_BRGC_ENABLE | div16;
216 out_be32(&qe_immr->brg.brgc[brg - QE_BRG1], tempval);
220 EXPORT_SYMBOL(qe_setbrg);
222 /* Convert a string to a QE clock source enum
224 * This function takes a string, typically from a property in the device
225 * tree, and returns the corresponding "enum qe_clock" value.
227 enum qe_clock qe_clock_source(const char *source)
231 if (strcasecmp(source, "none") == 0)
234 if (strncasecmp(source, "brg", 3) == 0) {
235 i = simple_strtoul(source + 3, NULL, 10);
236 if ((i >= 1) && (i <= 16))
237 return (QE_BRG1 - 1) + i;
242 if (strncasecmp(source, "clk", 3) == 0) {
243 i = simple_strtoul(source + 3, NULL, 10);
244 if ((i >= 1) && (i <= 24))
245 return (QE_CLK1 - 1) + i;
252 EXPORT_SYMBOL(qe_clock_source);
254 /* Initialize SNUMs (thread serial numbers) according to
255 * QE Module Control chapter, SNUM table
257 static void qe_snums_init(void)
260 static const u8 snum_init[] = {
261 0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,
262 0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,
263 0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9,
264 0xD8, 0xD9, 0xE8, 0xE9,
267 for (i = 0; i < QE_NUM_OF_SNUM; i++) {
268 snums[i].num = snum_init[i];
269 snums[i].state = QE_SNUM_STATE_FREE;
273 int qe_get_snum(void)
279 spin_lock_irqsave(&qe_lock, flags);
280 for (i = 0; i < QE_NUM_OF_SNUM; i++) {
281 if (snums[i].state == QE_SNUM_STATE_FREE) {
282 snums[i].state = QE_SNUM_STATE_USED;
287 spin_unlock_irqrestore(&qe_lock, flags);
291 EXPORT_SYMBOL(qe_get_snum);
293 void qe_put_snum(u8 snum)
297 for (i = 0; i < QE_NUM_OF_SNUM; i++) {
298 if (snums[i].num == snum) {
299 snums[i].state = QE_SNUM_STATE_FREE;
304 EXPORT_SYMBOL(qe_put_snum);
306 static int qe_sdma_init(void)
308 struct sdma *sdma = &qe_immr->sdma;
309 unsigned long sdma_buf_offset;
314 /* allocate 2 internal temporary buffers (512 bytes size each) for
316 sdma_buf_offset = qe_muram_alloc(512 * 2, 4096);
317 if (IS_ERR_VALUE(sdma_buf_offset))
320 out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK);
321 out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK |
322 (0x1 << QE_SDMR_CEN_SHIFT)));
328 * muram_alloc / muram_free bits.
330 static DEFINE_SPINLOCK(qe_muram_lock);
332 /* 16 blocks should be enough to satisfy all requests
333 * until the memory subsystem goes up... */
334 static rh_block_t qe_boot_muram_rh_block[16];
335 static rh_info_t qe_muram_info;
337 static void qe_muram_init(void)
339 struct device_node *np;
344 /* initialize the info header */
345 rh_init(&qe_muram_info, 1,
346 sizeof(qe_boot_muram_rh_block) /
347 sizeof(qe_boot_muram_rh_block[0]), qe_boot_muram_rh_block);
349 /* Attach the usable muram area */
350 /* XXX: This is a subset of the available muram. It
351 * varies with the processor and the microcode patches activated.
353 np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
355 np = of_find_node_by_name(NULL, "data-only");
362 address = of_get_address(np, 0, &size, &flags);
367 rh_attach_region(&qe_muram_info, *address, (int)size);
370 /* This function returns an index into the MURAM area.
372 unsigned long qe_muram_alloc(int size, int align)
377 spin_lock_irqsave(&qe_muram_lock, flags);
378 start = rh_alloc_align(&qe_muram_info, size, align, "QE");
379 spin_unlock_irqrestore(&qe_muram_lock, flags);
383 EXPORT_SYMBOL(qe_muram_alloc);
385 int qe_muram_free(unsigned long offset)
390 spin_lock_irqsave(&qe_muram_lock, flags);
391 ret = rh_free(&qe_muram_info, offset);
392 spin_unlock_irqrestore(&qe_muram_lock, flags);
396 EXPORT_SYMBOL(qe_muram_free);
398 /* not sure if this is ever needed */
399 unsigned long qe_muram_alloc_fixed(unsigned long offset, int size)
404 spin_lock_irqsave(&qe_muram_lock, flags);
405 start = rh_alloc_fixed(&qe_muram_info, offset, size, "commproc");
406 spin_unlock_irqrestore(&qe_muram_lock, flags);
410 EXPORT_SYMBOL(qe_muram_alloc_fixed);
412 void qe_muram_dump(void)
414 rh_dump(&qe_muram_info);
416 EXPORT_SYMBOL(qe_muram_dump);
418 /* The maximum number of RISCs we support */
419 #define MAX_QE_RISC 2
421 /* Firmware information stored here for qe_get_firmware_info() */
422 static struct qe_firmware_info qe_firmware_info;
425 * Set to 1 if QE firmware has been uploaded, and therefore
426 * qe_firmware_info contains valid data.
428 static int qe_firmware_uploaded;
431 * Upload a QE microcode
433 * This function is a worker function for qe_upload_firmware(). It does
434 * the actual uploading of the microcode.
436 static void qe_upload_microcode(const void *base,
437 const struct qe_microcode *ucode)
439 const __be32 *code = base + be32_to_cpu(ucode->code_offset);
442 if (ucode->major || ucode->minor || ucode->revision)
443 printk(KERN_INFO "qe-firmware: "
444 "uploading microcode '%s' version %u.%u.%u\n",
445 ucode->id, ucode->major, ucode->minor, ucode->revision);
447 printk(KERN_INFO "qe-firmware: "
448 "uploading microcode '%s'\n", ucode->id);
450 /* Use auto-increment */
451 out_be32(&qe_immr->iram.iadd, be32_to_cpu(ucode->iram_offset) |
452 QE_IRAM_IADD_AIE | QE_IRAM_IADD_BADDR);
454 for (i = 0; i < be32_to_cpu(ucode->count); i++)
455 out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));
459 * Upload a microcode to the I-RAM at a specific address.
461 * See Documentation/powerpc/qe-firmware.txt for information on QE microcode
464 * Currently, only version 1 is supported, so the 'version' field must be
467 * The SOC model and revision are not validated, they are only displayed for
468 * informational purposes.
470 * 'calc_size' is the calculated size, in bytes, of the firmware structure and
471 * all of the microcode structures, minus the CRC.
473 * 'length' is the size that the structure says it is, including the CRC.
475 int qe_upload_firmware(const struct qe_firmware *firmware)
480 size_t calc_size = sizeof(struct qe_firmware);
482 const struct qe_header *hdr;
485 printk(KERN_ERR "qe-firmware: invalid pointer\n");
489 hdr = &firmware->header;
490 length = be32_to_cpu(hdr->length);
492 /* Check the magic */
493 if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
494 (hdr->magic[2] != 'F')) {
495 printk(KERN_ERR "qe-firmware: not a microcode\n");
499 /* Check the version */
500 if (hdr->version != 1) {
501 printk(KERN_ERR "qe-firmware: unsupported version\n");
505 /* Validate some of the fields */
506 if ((firmware->count < 1) || (firmware->count > MAX_QE_RISC)) {
507 printk(KERN_ERR "qe-firmware: invalid data\n");
511 /* Validate the length and check if there's a CRC */
512 calc_size += (firmware->count - 1) * sizeof(struct qe_microcode);
514 for (i = 0; i < firmware->count; i++)
516 * For situations where the second RISC uses the same microcode
517 * as the first, the 'code_offset' and 'count' fields will be
518 * zero, so it's okay to add those.
520 calc_size += sizeof(__be32) *
521 be32_to_cpu(firmware->microcode[i].count);
523 /* Validate the length */
524 if (length != calc_size + sizeof(__be32)) {
525 printk(KERN_ERR "qe-firmware: invalid length\n");
529 /* Validate the CRC */
530 crc = be32_to_cpu(*(__be32 *)((void *)firmware + calc_size));
531 if (crc != crc32(0, firmware, calc_size)) {
532 printk(KERN_ERR "qe-firmware: firmware CRC is invalid\n");
537 * If the microcode calls for it, split the I-RAM.
539 if (!firmware->split)
540 setbits16(&qe_immr->cp.cercr, QE_CP_CERCR_CIR);
542 if (firmware->soc.model)
544 "qe-firmware: firmware '%s' for %u V%u.%u\n",
545 firmware->id, be16_to_cpu(firmware->soc.model),
546 firmware->soc.major, firmware->soc.minor);
548 printk(KERN_INFO "qe-firmware: firmware '%s'\n",
552 * The QE only supports one microcode per RISC, so clear out all the
553 * saved microcode information and put in the new.
555 memset(&qe_firmware_info, 0, sizeof(qe_firmware_info));
556 strcpy(qe_firmware_info.id, firmware->id);
557 qe_firmware_info.extended_modes = firmware->extended_modes;
558 memcpy(qe_firmware_info.vtraps, firmware->vtraps,
559 sizeof(firmware->vtraps));
561 /* Loop through each microcode. */
562 for (i = 0; i < firmware->count; i++) {
563 const struct qe_microcode *ucode = &firmware->microcode[i];
565 /* Upload a microcode if it's present */
566 if (ucode->code_offset)
567 qe_upload_microcode(firmware, ucode);
569 /* Program the traps for this processor */
570 for (j = 0; j < 16; j++) {
571 u32 trap = be32_to_cpu(ucode->traps[j]);
574 out_be32(&qe_immr->rsp[i].tibcr[j], trap);
578 out_be32(&qe_immr->rsp[i].eccr, be32_to_cpu(ucode->eccr));
581 qe_firmware_uploaded = 1;
585 EXPORT_SYMBOL(qe_upload_firmware);
588 * Get info on the currently-loaded firmware
590 * This function also checks the device tree to see if the boot loader has
591 * uploaded a firmware already.
593 struct qe_firmware_info *qe_get_firmware_info(void)
595 static int initialized;
596 struct property *prop;
597 struct device_node *qe;
598 struct device_node *fw = NULL;
603 * If we haven't checked yet, and a driver hasn't uploaded a firmware
604 * yet, then check the device tree for information.
606 if (qe_firmware_uploaded)
607 return &qe_firmware_info;
615 * Newer device trees have an "fsl,qe" compatible property for the QE
616 * node, but we still need to support older device trees.
618 qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
620 qe = of_find_node_by_type(NULL, "qe");
625 /* Find the 'firmware' child node */
626 for_each_child_of_node(qe, fw) {
627 if (strcmp(fw->name, "firmware") == 0)
633 /* Did we find the 'firmware' node? */
637 qe_firmware_uploaded = 1;
639 /* Copy the data into qe_firmware_info*/
640 sprop = of_get_property(fw, "id", NULL);
642 strncpy(qe_firmware_info.id, sprop,
643 sizeof(qe_firmware_info.id) - 1);
645 prop = of_find_property(fw, "extended-modes", NULL);
646 if (prop && (prop->length == sizeof(u64))) {
647 const u64 *iprop = prop->value;
649 qe_firmware_info.extended_modes = *iprop;
652 prop = of_find_property(fw, "virtual-traps", NULL);
653 if (prop && (prop->length == 32)) {
654 const u32 *iprop = prop->value;
656 for (i = 0; i < ARRAY_SIZE(qe_firmware_info.vtraps); i++)
657 qe_firmware_info.vtraps[i] = iprop[i];
662 return &qe_firmware_info;
664 EXPORT_SYMBOL(qe_get_firmware_info);