4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6 * 2006 (c) MontaVista Software, Inc.
7 * Vitaly Bordug <vbordug@ru.mvista.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/errno.h>
19 #include <linux/major.h>
20 #include <linux/delay.h>
21 #include <linux/irq.h>
22 #include <linux/module.h>
23 #include <linux/device.h>
24 #include <linux/platform_device.h>
25 #include <linux/of_platform.h>
26 #include <linux/phy.h>
27 #include <linux/phy_fixed.h>
28 #include <linux/spi/spi.h>
29 #include <linux/fsl_devices.h>
30 #include <linux/fs_enet_pd.h>
31 #include <linux/fs_uart_pd.h>
33 #include <asm/system.h>
34 #include <asm/atomic.h>
39 #include <sysdev/fsl_soc.h>
40 #include <mm/mmu_decl.h>
43 extern void init_fcc_ioports(struct fs_platform_info*);
44 extern void init_fec_ioports(struct fs_platform_info*);
45 extern void init_smc_ioports(struct fs_uart_platform_info*);
46 static phys_addr_t immrbase = -1;
48 phys_addr_t get_immrbase(void)
50 struct device_node *soc;
55 soc = of_find_node_by_type(NULL, "soc");
59 const u32 *prop = of_get_property(soc, "#address-cells", &size);
61 if (prop && size == 4)
66 prop = of_get_property(soc, "ranges", &size);
68 immrbase = of_translate_address(soc, prop + naddr);
76 EXPORT_SYMBOL(get_immrbase);
78 static u32 sysfreq = -1;
80 u32 fsl_get_sys_freq(void)
82 struct device_node *soc;
89 soc = of_find_node_by_type(NULL, "soc");
93 prop = of_get_property(soc, "clock-frequency", &size);
94 if (!prop || size != sizeof(*prop) || *prop == 0)
95 prop = of_get_property(soc, "bus-frequency", &size);
97 if (prop && size == sizeof(*prop))
103 EXPORT_SYMBOL(fsl_get_sys_freq);
105 #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
107 static u32 brgfreq = -1;
109 u32 get_brgfreq(void)
111 struct device_node *node;
112 const unsigned int *prop;
118 node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
120 prop = of_get_property(node, "clock-frequency", &size);
121 if (prop && size == 4)
128 /* Legacy device binding -- will go away when no users are left. */
129 node = of_find_node_by_type(NULL, "cpm");
131 node = of_find_compatible_node(NULL, NULL, "fsl,qe");
133 node = of_find_node_by_type(NULL, "qe");
136 prop = of_get_property(node, "brg-frequency", &size);
137 if (prop && size == 4)
140 if (brgfreq == -1 || brgfreq == 0) {
141 prop = of_get_property(node, "bus-frequency", &size);
142 if (prop && size == 4)
151 EXPORT_SYMBOL(get_brgfreq);
153 static u32 fs_baudrate = -1;
155 u32 get_baudrate(void)
157 struct device_node *node;
159 if (fs_baudrate != -1)
162 node = of_find_node_by_type(NULL, "serial");
165 const unsigned int *prop = of_get_property(node,
166 "current-speed", &size);
176 EXPORT_SYMBOL(get_baudrate);
177 #endif /* CONFIG_CPM2 */
179 #ifdef CONFIG_FIXED_PHY
180 static int __init of_add_fixed_phys(void)
183 struct device_node *np;
185 struct fixed_phy_status status = {};
187 for_each_node_by_name(np, "ethernet") {
188 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
193 status.duplex = fixed_link[1];
194 status.speed = fixed_link[2];
195 status.pause = fixed_link[3];
196 status.asym_pause = fixed_link[4];
198 ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
207 arch_initcall(of_add_fixed_phys);
208 #endif /* CONFIG_FIXED_PHY */
210 static int __init gfar_mdio_of_init(void)
212 struct device_node *np = NULL;
213 struct platform_device *mdio_dev;
217 np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio");
219 /* try the deprecated version */
221 np = of_find_compatible_node(np, "mdio", "gianfar");
225 struct device_node *child = NULL;
226 struct gianfar_mdio_data mdio_data;
228 memset(&res, 0, sizeof(res));
229 memset(&mdio_data, 0, sizeof(mdio_data));
231 ret = of_address_to_resource(np, 0, &res);
236 platform_device_register_simple("fsl-gianfar_mdio",
238 if (IS_ERR(mdio_dev)) {
239 ret = PTR_ERR(mdio_dev);
243 for (k = 0; k < 32; k++)
244 mdio_data.irq[k] = PHY_POLL;
246 while ((child = of_get_next_child(np, child)) != NULL) {
247 int irq = irq_of_parse_and_map(child, 0);
249 const u32 *id = of_get_property(child,
251 mdio_data.irq[*id] = irq;
256 platform_device_add_data(mdio_dev, &mdio_data,
257 sizeof(struct gianfar_mdio_data));
266 platform_device_unregister(mdio_dev);
272 arch_initcall(gfar_mdio_of_init);
274 static const char *gfar_tx_intr = "tx";
275 static const char *gfar_rx_intr = "rx";
276 static const char *gfar_err_intr = "error";
278 static int __init gfar_of_init(void)
280 struct device_node *np;
282 struct platform_device *gfar_dev;
286 for (np = NULL, i = 0;
287 (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
289 struct resource r[4];
290 struct device_node *phy, *mdio;
291 struct gianfar_platform_data gfar_data;
292 const unsigned int *id;
295 const void *mac_addr;
299 if (!of_device_is_available(np))
302 memset(r, 0, sizeof(r));
303 memset(&gfar_data, 0, sizeof(gfar_data));
305 ret = of_address_to_resource(np, 0, &r[0]);
309 of_irq_to_resource(np, 0, &r[1]);
311 model = of_get_property(np, "model", NULL);
313 /* If we aren't the FEC we have multiple interrupts */
314 if (model && strcasecmp(model, "FEC")) {
315 r[1].name = gfar_tx_intr;
317 r[2].name = gfar_rx_intr;
318 of_irq_to_resource(np, 1, &r[2]);
320 r[3].name = gfar_err_intr;
321 of_irq_to_resource(np, 2, &r[3]);
327 platform_device_register_simple("fsl-gianfar", i, &r[0],
330 if (IS_ERR(gfar_dev)) {
331 ret = PTR_ERR(gfar_dev);
335 mac_addr = of_get_mac_address(np);
337 memcpy(gfar_data.mac_addr, mac_addr, 6);
339 if (model && !strcasecmp(model, "TSEC"))
340 gfar_data.device_flags =
341 FSL_GIANFAR_DEV_HAS_GIGABIT |
342 FSL_GIANFAR_DEV_HAS_COALESCE |
343 FSL_GIANFAR_DEV_HAS_RMON |
344 FSL_GIANFAR_DEV_HAS_MULTI_INTR;
345 if (model && !strcasecmp(model, "eTSEC"))
346 gfar_data.device_flags =
347 FSL_GIANFAR_DEV_HAS_GIGABIT |
348 FSL_GIANFAR_DEV_HAS_COALESCE |
349 FSL_GIANFAR_DEV_HAS_RMON |
350 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
351 FSL_GIANFAR_DEV_HAS_CSUM |
352 FSL_GIANFAR_DEV_HAS_VLAN |
353 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
355 ctype = of_get_property(np, "phy-connection-type", NULL);
357 /* We only care about rgmii-id. The rest are autodetected */
358 if (ctype && !strcmp(ctype, "rgmii-id"))
359 gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
361 gfar_data.interface = PHY_INTERFACE_MODE_MII;
363 ph = of_get_property(np, "phy-handle", NULL);
367 fixed_link = (u32 *)of_get_property(np, "fixed-link",
374 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
375 gfar_data.phy_id = fixed_link[0];
377 phy = of_find_node_by_phandle(*ph);
384 mdio = of_get_parent(phy);
386 id = of_get_property(phy, "reg", NULL);
387 ret = of_address_to_resource(mdio, 0, &res);
394 gfar_data.phy_id = *id;
395 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx",
396 (unsigned long long)res.start);
403 platform_device_add_data(gfar_dev, &gfar_data,
405 gianfar_platform_data));
413 platform_device_unregister(gfar_dev);
418 arch_initcall(gfar_of_init);
421 #ifdef CONFIG_PPC_83xx
422 static int __init mpc83xx_wdt_init(void)
425 struct device_node *np;
426 struct platform_device *dev;
427 u32 freq = fsl_get_sys_freq();
430 np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
437 memset(&r, 0, sizeof(r));
439 ret = of_address_to_resource(np, 0, &r);
443 dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
449 ret = platform_device_add_data(dev, &freq, sizeof(freq));
457 platform_device_unregister(dev);
464 arch_initcall(mpc83xx_wdt_init);
467 static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
470 return FSL_USB2_PHY_NONE;
471 if (!strcasecmp(phy_type, "ulpi"))
472 return FSL_USB2_PHY_ULPI;
473 if (!strcasecmp(phy_type, "utmi"))
474 return FSL_USB2_PHY_UTMI;
475 if (!strcasecmp(phy_type, "utmi_wide"))
476 return FSL_USB2_PHY_UTMI_WIDE;
477 if (!strcasecmp(phy_type, "serial"))
478 return FSL_USB2_PHY_SERIAL;
480 return FSL_USB2_PHY_NONE;
483 static int __init fsl_usb_of_init(void)
485 struct device_node *np;
487 struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
488 *usb_dev_dr_client = NULL;
491 for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
492 struct resource r[2];
493 struct fsl_usb2_platform_data usb_data;
494 const unsigned char *prop = NULL;
496 memset(&r, 0, sizeof(r));
497 memset(&usb_data, 0, sizeof(usb_data));
499 ret = of_address_to_resource(np, 0, &r[0]);
503 of_irq_to_resource(np, 0, &r[1]);
506 platform_device_register_simple("fsl-ehci", i, r, 2);
507 if (IS_ERR(usb_dev_mph)) {
508 ret = PTR_ERR(usb_dev_mph);
512 usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
513 usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
515 usb_data.operating_mode = FSL_USB2_MPH_HOST;
517 prop = of_get_property(np, "port0", NULL);
519 usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
521 prop = of_get_property(np, "port1", NULL);
523 usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
525 prop = of_get_property(np, "phy_type", NULL);
526 usb_data.phy_mode = determine_usb_phy(prop);
529 platform_device_add_data(usb_dev_mph, &usb_data,
531 fsl_usb2_platform_data));
537 for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
538 struct resource r[2];
539 struct fsl_usb2_platform_data usb_data;
540 const unsigned char *prop = NULL;
542 memset(&r, 0, sizeof(r));
543 memset(&usb_data, 0, sizeof(usb_data));
545 ret = of_address_to_resource(np, 0, &r[0]);
549 of_irq_to_resource(np, 0, &r[1]);
551 prop = of_get_property(np, "dr_mode", NULL);
553 if (!prop || !strcmp(prop, "host")) {
554 usb_data.operating_mode = FSL_USB2_DR_HOST;
555 usb_dev_dr_host = platform_device_register_simple(
556 "fsl-ehci", i, r, 2);
557 if (IS_ERR(usb_dev_dr_host)) {
558 ret = PTR_ERR(usb_dev_dr_host);
561 } else if (prop && !strcmp(prop, "peripheral")) {
562 usb_data.operating_mode = FSL_USB2_DR_DEVICE;
563 usb_dev_dr_client = platform_device_register_simple(
564 "fsl-usb2-udc", i, r, 2);
565 if (IS_ERR(usb_dev_dr_client)) {
566 ret = PTR_ERR(usb_dev_dr_client);
569 } else if (prop && !strcmp(prop, "otg")) {
570 usb_data.operating_mode = FSL_USB2_DR_OTG;
571 usb_dev_dr_host = platform_device_register_simple(
572 "fsl-ehci", i, r, 2);
573 if (IS_ERR(usb_dev_dr_host)) {
574 ret = PTR_ERR(usb_dev_dr_host);
577 usb_dev_dr_client = platform_device_register_simple(
578 "fsl-usb2-udc", i, r, 2);
579 if (IS_ERR(usb_dev_dr_client)) {
580 ret = PTR_ERR(usb_dev_dr_client);
588 prop = of_get_property(np, "phy_type", NULL);
589 usb_data.phy_mode = determine_usb_phy(prop);
591 if (usb_dev_dr_host) {
592 usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
593 usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
594 dev.coherent_dma_mask;
595 if ((ret = platform_device_add_data(usb_dev_dr_host,
596 &usb_data, sizeof(struct
597 fsl_usb2_platform_data))))
600 if (usb_dev_dr_client) {
601 usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
602 usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
603 dev.coherent_dma_mask;
604 if ((ret = platform_device_add_data(usb_dev_dr_client,
605 &usb_data, sizeof(struct
606 fsl_usb2_platform_data))))
615 platform_device_unregister(usb_dev_dr_host);
616 if (usb_dev_dr_client)
617 platform_device_unregister(usb_dev_dr_client);
620 platform_device_unregister(usb_dev_mph);
625 arch_initcall(fsl_usb_of_init);
627 static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
628 struct spi_board_info *board_infos,
629 unsigned int num_board_infos,
630 void (*activate_cs)(u8 cs, u8 polarity),
631 void (*deactivate_cs)(u8 cs, u8 polarity))
633 struct device_node *np;
636 for_each_compatible_node(np, type, compatible) {
640 struct resource res[2];
641 struct platform_device *pdev;
642 struct fsl_spi_platform_data pdata = {
643 .activate_cs = activate_cs,
644 .deactivate_cs = deactivate_cs,
647 memset(res, 0, sizeof(res));
649 pdata.sysclk = sysclk;
651 prop = of_get_property(np, "reg", NULL);
654 pdata.bus_num = *(u32 *)prop;
656 prop = of_get_property(np, "cell-index", NULL);
660 prop = of_get_property(np, "mode", NULL);
661 if (prop && !strcmp(prop, "cpu-qe"))
664 for (j = 0; j < num_board_infos; j++) {
665 if (board_infos[j].bus_num == pdata.bus_num)
666 pdata.max_chipselect++;
669 if (!pdata.max_chipselect)
672 ret = of_address_to_resource(np, 0, &res[0]);
676 ret = of_irq_to_resource(np, 0, &res[1]);
680 pdev = platform_device_alloc("mpc83xx_spi", i);
684 ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
688 ret = platform_device_add_resources(pdev, res,
693 ret = platform_device_add(pdev);
699 platform_device_del(pdev);
701 pr_err("%s: registration failed\n", np->full_name);
709 int __init fsl_spi_init(struct spi_board_info *board_infos,
710 unsigned int num_board_infos,
711 void (*activate_cs)(u8 cs, u8 polarity),
712 void (*deactivate_cs)(u8 cs, u8 polarity))
717 #ifdef CONFIG_QUICC_ENGINE
718 /* SPI controller is either clocked from QE or SoC clock */
719 sysclk = get_brgfreq();
722 sysclk = fsl_get_sys_freq();
727 ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
728 num_board_infos, activate_cs, deactivate_cs);
730 of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
731 num_board_infos, activate_cs, deactivate_cs);
733 return spi_register_board_info(board_infos, num_board_infos);
736 #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
737 static __be32 __iomem *rstcr;
739 static int __init setup_rstcr(void)
741 struct device_node *np;
742 np = of_find_node_by_name(NULL, "global-utilities");
743 if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
744 const u32 *prop = of_get_property(np, "reg", NULL);
746 /* map reset control register
747 * 0xE00B0 is offset of reset control register
749 rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
751 printk (KERN_EMERG "Error: reset control "
752 "register not mapped!\n");
755 printk (KERN_INFO "rstcr compatible register does not exist!\n");
761 arch_initcall(setup_rstcr);
763 void fsl_rstcr_restart(char *cmd)
767 /* set reset control register */
768 out_be32(rstcr, 0x2); /* HRESET_REQ */
774 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
775 struct platform_diu_data_ops diu_ops = {
776 .diu_size = 1280 * 1024 * 4, /* default one 1280x1024 buffer */
778 EXPORT_SYMBOL(diu_ops);
780 int __init preallocate_diu_videomemory(void)
782 pr_debug("diu_size=%lu\n", diu_ops.diu_size);
784 diu_ops.diu_mem = __alloc_bootmem(diu_ops.diu_size, 8, 0);
785 if (!diu_ops.diu_mem) {
786 printk(KERN_ERR "fsl-diu: cannot allocate %lu bytes\n",
791 pr_debug("diu_mem=%p\n", diu_ops.diu_mem);
793 rh_init(&diu_ops.diu_rh_info, 4096, ARRAY_SIZE(diu_ops.diu_rh_block),
794 diu_ops.diu_rh_block);
795 return rh_attach_region(&diu_ops.diu_rh_info,
796 (unsigned long) diu_ops.diu_mem,
800 static int __init early_parse_diufb(char *p)
805 diu_ops.diu_size = _ALIGN_UP(memparse(p, &p), 8);
807 pr_debug("diu_size=%lu\n", diu_ops.diu_size);
811 early_param("diufb", early_parse_diufb);