arch/powerpc/platforms/powermac/feature.c

   1 /*
   2  *  arch/ppc/platforms/pmac_feature.c
   3  *
   4  *  Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
   5  *                          Ben. Herrenschmidt (benh@kernel.crashing.org)
   6  *
   7  *  This program is free software; you can redistribute it and/or
   8  *  modify it under the terms of the GNU General Public License
   9  *  as published by the Free Software Foundation; either version
  10  *  2 of the License, or (at your option) any later version.
  11  *
  12  *  TODO:
  13  *
  14  *   - Replace mdelay with some schedule loop if possible
  15  *   - Shorten some obfuscated delays on some routines (like modem
  16  *     power)
  17  *   - Refcount some clocks (see darwin)
  18  *   - Split split split...
  19  *
  20  */
  21 #include <linux/config.h>
  22 #include <linux/types.h>
  23 #include <linux/init.h>
  24 #include <linux/delay.h>
  25 #include <linux/kernel.h>
  26 #include <linux/sched.h>
  27 #include <linux/spinlock.h>
  28 #include <linux/adb.h>
  29 #include <linux/pmu.h>
  30 #include <linux/ioport.h>
  31 #include <linux/pci.h>
  32 #include <asm/sections.h>
  33 #include <asm/errno.h>
  34 #include <asm/ohare.h>
  35 #include <asm/heathrow.h>
  36 #include <asm/keylargo.h>
  37 #include <asm/uninorth.h>
  38 #include <asm/io.h>
  39 #include <asm/prom.h>
  40 #include <asm/machdep.h>
  41 #include <asm/pmac_feature.h>
  42 #include <asm/dbdma.h>
  43 #include <asm/pci-bridge.h>
  44 #include <asm/pmac_low_i2c.h>
  45
  46 #undef DEBUG_FEATURE
  47
  48 #ifdef DEBUG_FEATURE
  49 #define DBG(fmt...) printk(KERN_DEBUG fmt)
  50 #else
  51 #define DBG(fmt...)
  52 #endif
  53
  54 #ifdef CONFIG_6xx
  55 extern int powersave_lowspeed;
  56 #endif
  57
  58 extern int powersave_nap;
  59 extern struct device_node *k2_skiplist[2];
  60
  61 /*
  62  * We use a single global lock to protect accesses. Each driver has
  63  * to take care of its own locking
  64  */
  65 DEFINE_SPINLOCK(feature_lock);
  66
  67 #define LOCK(flags)     spin_lock_irqsave(&feature_lock, flags);
  68 #define UNLOCK(flags)   spin_unlock_irqrestore(&feature_lock, flags);
  69
  70
  71 /*
  72  * Instance of some macio stuffs
  73  */
  74 struct macio_chip macio_chips[MAX_MACIO_CHIPS];
  75
  76 struct macio_chip *macio_find(struct device_node *child, int type)
  77 {
  78         while(child) {
  79                 int     i;
  80
  81                 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
  82                         if (child == macio_chips[i].of_node &&
  83                             (!type || macio_chips[i].type == type))
  84                                 return &macio_chips[i];
  85                 child = child->parent;
  86         }
  87         return NULL;
  88 }
  89 EXPORT_SYMBOL_GPL(macio_find);
  90
  91 static const char *macio_names[] =
  92 {
  93         "Unknown",
  94         "Grand Central",
  95         "OHare",
  96         "OHareII",
  97         "Heathrow",
  98         "Gatwick",
  99         "Paddington",
 100         "Keylargo",
 101         "Pangea",
 102         "Intrepid",
 103         "K2",
 104         "Shasta",
 105 };
 106
 107
 108 struct device_node *uninorth_node;
 109 u32 __iomem *uninorth_base;
 110
 111 static u32 uninorth_rev;
 112 static int uninorth_maj;
 113 static void __iomem *u3_ht_base;
 114
 115 /*
 116  * For each motherboard family, we have a table of functions pointers
 117  * that handle the various features.
 118  */
 119
 120 typedef long (*feature_call)(struct device_node *node, long param, long value);
 121
 122 struct feature_table_entry {
 123         unsigned int    selector;
 124         feature_call    function;
 125 };
 126
 127 struct pmac_mb_def
 128 {
 129         const char*                     model_string;
 130         const char*                     model_name;
 131         int                             model_id;
 132         struct feature_table_entry*     features;
 133         unsigned long                   board_flags;
 134 };
 135 static struct pmac_mb_def pmac_mb;
 136
 137 /*
 138  * Here are the chip specific feature functions
 139  */
 140
 141 static inline int simple_feature_tweak(struct device_node *node, int type,
 142                                        int reg, u32 mask, int value)
 143 {
 144         struct macio_chip*      macio;
 145         unsigned long           flags;
 146
 147         macio = macio_find(node, type);
 148         if (!macio)
 149                 return -ENODEV;
 150         LOCK(flags);
 151         if (value)
 152                 MACIO_BIS(reg, mask);
 153         else
 154                 MACIO_BIC(reg, mask);
 155         (void)MACIO_IN32(reg);
 156         UNLOCK(flags);
 157
 158         return 0;
 159 }
 160
 161 #ifndef CONFIG_POWER4
 162
 163 static long ohare_htw_scc_enable(struct device_node *node, long param,
 164                                  long value)
 165 {
 166         struct macio_chip*      macio;
 167         unsigned long           chan_mask;
 168         unsigned long           fcr;
 169         unsigned long           flags;
 170         int                     htw, trans;
 171         unsigned long           rmask;
 172
 173         macio = macio_find(node, 0);
 174         if (!macio)
 175                 return -ENODEV;
 176         if (!strcmp(node->name, "ch-a"))
 177                 chan_mask = MACIO_FLAG_SCCA_ON;
 178         else if (!strcmp(node->name, "ch-b"))
 179                 chan_mask = MACIO_FLAG_SCCB_ON;
 180         else
 181                 return -ENODEV;
 182
 183         htw = (macio->type == macio_heathrow || macio->type == macio_paddington
 184                 || macio->type == macio_gatwick);
 185         /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
 186         trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
 187                  pmac_mb.model_id != PMAC_TYPE_YIKES);
 188         if (value) {
 189 #ifdef CONFIG_ADB_PMU
 190                 if ((param & 0xfff) == PMAC_SCC_IRDA)
 191                         pmu_enable_irled(1);
 192 #endif /* CONFIG_ADB_PMU */
 193                 LOCK(flags);
 194                 fcr = MACIO_IN32(OHARE_FCR);
 195                 /* Check if scc cell need enabling */
 196                 if (!(fcr & OH_SCC_ENABLE)) {
 197                         fcr |= OH_SCC_ENABLE;
 198                         if (htw) {
 199                                 /* Side effect: this will also power up the
 200                                  * modem, but it's too messy to figure out on which
 201                                  * ports this controls the tranceiver and on which
 202                                  * it controls the modem
 203                                  */
 204                                 if (trans)
 205                                         fcr &= ~HRW_SCC_TRANS_EN_N;
 206                                 MACIO_OUT32(OHARE_FCR, fcr);
 207                                 fcr |= (rmask = HRW_RESET_SCC);
 208                                 MACIO_OUT32(OHARE_FCR, fcr);
 209                         } else {
 210                                 fcr |= (rmask = OH_SCC_RESET);
 211                                 MACIO_OUT32(OHARE_FCR, fcr);
 212                         }
 213                         UNLOCK(flags);
 214                         (void)MACIO_IN32(OHARE_FCR);
 215                         mdelay(15);
 216                         LOCK(flags);
 217                         fcr &= ~rmask;
 218                         MACIO_OUT32(OHARE_FCR, fcr);
 219                 }
 220                 if (chan_mask & MACIO_FLAG_SCCA_ON)
 221                         fcr |= OH_SCCA_IO;
 222                 if (chan_mask & MACIO_FLAG_SCCB_ON)
 223                         fcr |= OH_SCCB_IO;
 224                 MACIO_OUT32(OHARE_FCR, fcr);
 225                 macio->flags |= chan_mask;
 226                 UNLOCK(flags);
 227                 if (param & PMAC_SCC_FLAG_XMON)
 228                         macio->flags |= MACIO_FLAG_SCC_LOCKED;
 229         } else {
 230                 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
 231                         return -EPERM;
 232                 LOCK(flags);
 233                 fcr = MACIO_IN32(OHARE_FCR);
 234                 if (chan_mask & MACIO_FLAG_SCCA_ON)
 235                         fcr &= ~OH_SCCA_IO;
 236                 if (chan_mask & MACIO_FLAG_SCCB_ON)
 237                         fcr &= ~OH_SCCB_IO;
 238                 MACIO_OUT32(OHARE_FCR, fcr);
 239                 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
 240                         fcr &= ~OH_SCC_ENABLE;
 241                         if (htw && trans)
 242                                 fcr |= HRW_SCC_TRANS_EN_N;
 243                         MACIO_OUT32(OHARE_FCR, fcr);
 244                 }
 245                 macio->flags &= ~(chan_mask);
 246                 UNLOCK(flags);
 247                 mdelay(10);
 248 #ifdef CONFIG_ADB_PMU
 249                 if ((param & 0xfff) == PMAC_SCC_IRDA)
 250                         pmu_enable_irled(0);
 251 #endif /* CONFIG_ADB_PMU */
 252         }
 253         return 0;
 254 }
 255
 256 static long ohare_floppy_enable(struct device_node *node, long param,
 257                                 long value)
 258 {
 259         return simple_feature_tweak(node, macio_ohare,
 260                 OHARE_FCR, OH_FLOPPY_ENABLE, value);
 261 }
 262
 263 static long ohare_mesh_enable(struct device_node *node, long param, long value)
 264 {
 265         return simple_feature_tweak(node, macio_ohare,
 266                 OHARE_FCR, OH_MESH_ENABLE, value);
 267 }
 268
 269 static long ohare_ide_enable(struct device_node *node, long param, long value)
 270 {
 271         switch(param) {
 272         case 0:
 273                 /* For some reason, setting the bit in set_initial_features()
 274                  * doesn't stick. I'm still investigating... --BenH.
 275                  */
 276                 if (value)
 277                         simple_feature_tweak(node, macio_ohare,
 278                                 OHARE_FCR, OH_IOBUS_ENABLE, 1);
 279                 return simple_feature_tweak(node, macio_ohare,
 280                         OHARE_FCR, OH_IDE0_ENABLE, value);
 281         case 1:
 282                 return simple_feature_tweak(node, macio_ohare,
 283                         OHARE_FCR, OH_BAY_IDE_ENABLE, value);
 284         default:
 285                 return -ENODEV;
 286         }
 287 }
 288
 289 static long ohare_ide_reset(struct device_node *node, long param, long value)
 290 {
 291         switch(param) {
 292         case 0:
 293                 return simple_feature_tweak(node, macio_ohare,
 294                         OHARE_FCR, OH_IDE0_RESET_N, !value);
 295         case 1:
 296                 return simple_feature_tweak(node, macio_ohare,
 297                         OHARE_FCR, OH_IDE1_RESET_N, !value);
 298         default:
 299                 return -ENODEV;
 300         }
 301 }
 302
 303 static long ohare_sleep_state(struct device_node *node, long param, long value)
 304 {
 305         struct macio_chip*      macio = &macio_chips[0];
 306
 307         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
 308                 return -EPERM;
 309         if (value == 1) {
 310                 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
 311         } else if (value == 0) {
 312                 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
 313         }
 314
 315         return 0;
 316 }
 317
 318 static long heathrow_modem_enable(struct device_node *node, long param,
 319                                   long value)
 320 {
 321         struct macio_chip*      macio;
 322         u8                      gpio;
 323         unsigned long           flags;
 324
 325         macio = macio_find(node, macio_unknown);
 326         if (!macio)
 327                 return -ENODEV;
 328         gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
 329         if (!value) {
 330                 LOCK(flags);
 331                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
 332                 UNLOCK(flags);
 333                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
 334                 mdelay(250);
 335         }
 336         if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
 337             pmac_mb.model_id != PMAC_TYPE_YIKES) {
 338                 LOCK(flags);
 339                 if (value)
 340                         MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
 341                 else
 342                         MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
 343                 UNLOCK(flags);
 344                 (void)MACIO_IN32(HEATHROW_FCR);
 345                 mdelay(250);
 346         }
 347         if (value) {
 348                 LOCK(flags);
 349                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
 350                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
 351                 UNLOCK(flags); mdelay(250); LOCK(flags);
 352                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
 353                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
 354                 UNLOCK(flags); mdelay(250); LOCK(flags);
 355                 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
 356                 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
 357                 UNLOCK(flags); mdelay(250);
 358         }
 359         return 0;
 360 }
 361
 362 static long heathrow_floppy_enable(struct device_node *node, long param,
 363                                    long value)
 364 {
 365         return simple_feature_tweak(node, macio_unknown,
 366                 HEATHROW_FCR,
 367                 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
 368                 value);
 369 }
 370
 371 static long heathrow_mesh_enable(struct device_node *node, long param,
 372                                  long value)
 373 {
 374         struct macio_chip*      macio;
 375         unsigned long           flags;
 376
 377         macio = macio_find(node, macio_unknown);
 378         if (!macio)
 379                 return -ENODEV;
 380         LOCK(flags);
 381         /* Set clear mesh cell enable */
 382         if (value)
 383                 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
 384         else
 385                 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
 386         (void)MACIO_IN32(HEATHROW_FCR);
 387         udelay(10);
 388         /* Set/Clear termination power */
 389         if (value)
 390                 MACIO_BIC(HEATHROW_MBCR, 0x04000000);
 391         else
 392                 MACIO_BIS(HEATHROW_MBCR, 0x04000000);
 393         (void)MACIO_IN32(HEATHROW_MBCR);
 394         udelay(10);
 395         UNLOCK(flags);
 396
 397         return 0;
 398 }
 399
 400 static long heathrow_ide_enable(struct device_node *node, long param,
 401                                 long value)
 402 {
 403         switch(param) {
 404         case 0:
 405                 return simple_feature_tweak(node, macio_unknown,
 406                         HEATHROW_FCR, HRW_IDE0_ENABLE, value);
 407         case 1:
 408                 return simple_feature_tweak(node, macio_unknown,
 409                         HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
 410         default:
 411                 return -ENODEV;
 412         }
 413 }
 414
 415 static long heathrow_ide_reset(struct device_node *node, long param,
 416                                long value)
 417 {
 418         switch(param) {
 419         case 0:
 420                 return simple_feature_tweak(node, macio_unknown,
 421                         HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
 422         case 1:
 423                 return simple_feature_tweak(node, macio_unknown,
 424                         HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
 425         default:
 426                 return -ENODEV;
 427         }
 428 }
 429
 430 static long heathrow_bmac_enable(struct device_node *node, long param,
 431                                  long value)
 432 {
 433         struct macio_chip*      macio;
 434         unsigned long           flags;
 435
 436         macio = macio_find(node, 0);
 437         if (!macio)
 438                 return -ENODEV;
 439         if (value) {
 440                 LOCK(flags);
 441                 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
 442                 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
 443                 UNLOCK(flags);
 444                 (void)MACIO_IN32(HEATHROW_FCR);
 445                 mdelay(10);
 446                 LOCK(flags);
 447                 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
 448                 UNLOCK(flags);
 449                 (void)MACIO_IN32(HEATHROW_FCR);
 450                 mdelay(10);
 451         } else {
 452                 LOCK(flags);
 453                 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
 454                 UNLOCK(flags);
 455         }
 456         return 0;
 457 }
 458
 459 static long heathrow_sound_enable(struct device_node *node, long param,
 460                                   long value)
 461 {
 462         struct macio_chip*      macio;
 463         unsigned long           flags;
 464
 465         /* B&W G3 and Yikes don't support that properly (the
 466          * sound appear to never come back after beeing shut down).
 467          */
 468         if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
 469             pmac_mb.model_id == PMAC_TYPE_YIKES)
 470                 return 0;
 471
 472         macio = macio_find(node, 0);
 473         if (!macio)
 474                 return -ENODEV;
 475         if (value) {
 476                 LOCK(flags);
 477                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
 478                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
 479                 UNLOCK(flags);
 480                 (void)MACIO_IN32(HEATHROW_FCR);
 481         } else {
 482                 LOCK(flags);
 483                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
 484                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
 485                 UNLOCK(flags);
 486         }
 487         return 0;
 488 }
 489
 490 static u32 save_fcr[6];
 491 static u32 save_mbcr;
 492 static u32 save_gpio_levels[2];
 493 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
 494 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
 495 static u32 save_unin_clock_ctl;
 496 static struct dbdma_regs save_dbdma[13];
 497 static struct dbdma_regs save_alt_dbdma[13];
 498
 499 static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save)
 500 {
 501         int i;
 502
 503         /* Save state & config of DBDMA channels */
 504         for (i = 0; i < 13; i++) {
 505                 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
 506                         (macio->base + ((0x8000+i*0x100)>>2));
 507                 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
 508                 save[i].cmdptr = in_le32(&chan->cmdptr);
 509                 save[i].intr_sel = in_le32(&chan->intr_sel);
 510                 save[i].br_sel = in_le32(&chan->br_sel);
 511                 save[i].wait_sel = in_le32(&chan->wait_sel);
 512         }
 513 }
 514
 515 static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save)
 516 {
 517         int i;
 518
 519         /* Save state & config of DBDMA channels */
 520         for (i = 0; i < 13; i++) {
 521                 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
 522                         (macio->base + ((0x8000+i*0x100)>>2));
 523                 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
 524                 while (in_le32(&chan->status) & ACTIVE)
 525                         mb();
 526                 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
 527                 out_le32(&chan->cmdptr, save[i].cmdptr);
 528                 out_le32(&chan->intr_sel, save[i].intr_sel);
 529                 out_le32(&chan->br_sel, save[i].br_sel);
 530                 out_le32(&chan->wait_sel, save[i].wait_sel);
 531         }
 532 }
 533
 534 static void heathrow_sleep(struct macio_chip *macio, int secondary)
 535 {
 536         if (secondary) {
 537                 dbdma_save(macio, save_alt_dbdma);
 538                 save_fcr[2] = MACIO_IN32(0x38);
 539                 save_fcr[3] = MACIO_IN32(0x3c);
 540         } else {
 541                 dbdma_save(macio, save_dbdma);
 542                 save_fcr[0] = MACIO_IN32(0x38);
 543                 save_fcr[1] = MACIO_IN32(0x3c);
 544                 save_mbcr = MACIO_IN32(0x34);
 545                 /* Make sure sound is shut down */
 546                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
 547                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
 548                 /* This seems to be necessary as well or the fan
 549                  * keeps coming up and battery drains fast */
 550                 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
 551                 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
 552                 /* Make sure eth is down even if module or sleep
 553                  * won't work properly */
 554                 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
 555         }
 556         /* Make sure modem is shut down */
 557         MACIO_OUT8(HRW_GPIO_MODEM_RESET,
 558                 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
 559         MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
 560         MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
 561
 562         /* Let things settle */
 563         (void)MACIO_IN32(HEATHROW_FCR);
 564 }
 565
 566 static void heathrow_wakeup(struct macio_chip *macio, int secondary)
 567 {
 568         if (secondary) {
 569                 MACIO_OUT32(0x38, save_fcr[2]);
 570                 (void)MACIO_IN32(0x38);
 571                 mdelay(1);
 572                 MACIO_OUT32(0x3c, save_fcr[3]);
 573                 (void)MACIO_IN32(0x38);
 574                 mdelay(10);
 575                 dbdma_restore(macio, save_alt_dbdma);
 576         } else {
 577                 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
 578                 (void)MACIO_IN32(0x38);
 579                 mdelay(1);
 580                 MACIO_OUT32(0x3c, save_fcr[1]);
 581                 (void)MACIO_IN32(0x38);
 582                 mdelay(1);
 583                 MACIO_OUT32(0x34, save_mbcr);
 584                 (void)MACIO_IN32(0x38);
 585                 mdelay(10);
 586                 dbdma_restore(macio, save_dbdma);
 587         }
 588 }
 589
 590 static long heathrow_sleep_state(struct device_node *node, long param,
 591                                  long value)
 592 {
 593         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
 594                 return -EPERM;
 595         if (value == 1) {
 596                 if (macio_chips[1].type == macio_gatwick)
 597                         heathrow_sleep(&macio_chips[0], 1);
 598                 heathrow_sleep(&macio_chips[0], 0);
 599         } else if (value == 0) {
 600                 heathrow_wakeup(&macio_chips[0], 0);
 601                 if (macio_chips[1].type == macio_gatwick)
 602                         heathrow_wakeup(&macio_chips[0], 1);
 603         }
 604         return 0;
 605 }
 606
 607 static long core99_scc_enable(struct device_node *node, long param, long value)
 608 {
 609         struct macio_chip*      macio;
 610         unsigned long           flags;
 611         unsigned long           chan_mask;
 612         u32                     fcr;
 613
 614         macio = macio_find(node, 0);
 615         if (!macio)
 616                 return -ENODEV;
 617         if (!strcmp(node->name, "ch-a"))
 618                 chan_mask = MACIO_FLAG_SCCA_ON;
 619         else if (!strcmp(node->name, "ch-b"))
 620                 chan_mask = MACIO_FLAG_SCCB_ON;
 621         else
 622                 return -ENODEV;
 623
 624         if (value) {
 625                 int need_reset_scc = 0;
 626                 int need_reset_irda = 0;
 627
 628                 LOCK(flags);
 629                 fcr = MACIO_IN32(KEYLARGO_FCR0);
 630                 /* Check if scc cell need enabling */
 631                 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
 632                         fcr |= KL0_SCC_CELL_ENABLE;
 633                         need_reset_scc = 1;
 634                 }
 635                 if (chan_mask & MACIO_FLAG_SCCA_ON) {
 636                         fcr |= KL0_SCCA_ENABLE;
 637                         /* Don't enable line drivers for I2S modem */
 638                         if ((param & 0xfff) == PMAC_SCC_I2S1)
 639                                 fcr &= ~KL0_SCC_A_INTF_ENABLE;
 640                         else
 641                                 fcr |= KL0_SCC_A_INTF_ENABLE;
 642                 }
 643                 if (chan_mask & MACIO_FLAG_SCCB_ON) {
 644                         fcr |= KL0_SCCB_ENABLE;
 645                         /* Perform irda specific inits */
 646                         if ((param & 0xfff) == PMAC_SCC_IRDA) {
 647                                 fcr &= ~KL0_SCC_B_INTF_ENABLE;
 648                                 fcr |= KL0_IRDA_ENABLE;
 649                                 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
 650                                 fcr |= KL0_IRDA_SOURCE1_SEL;
 651                                 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
 652                                 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
 653                                 need_reset_irda = 1;
 654                         } else
 655                                 fcr |= KL0_SCC_B_INTF_ENABLE;
 656                 }
 657                 MACIO_OUT32(KEYLARGO_FCR0, fcr);
 658                 macio->flags |= chan_mask;
 659                 if (need_reset_scc)  {
 660                         MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
 661                         (void)MACIO_IN32(KEYLARGO_FCR0);
 662                         UNLOCK(flags);
 663                         mdelay(15);
 664                         LOCK(flags);
 665                         MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
 666                 }
 667                 if (need_reset_irda)  {
 668                         MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
 669                         (void)MACIO_IN32(KEYLARGO_FCR0);
 670                         UNLOCK(flags);
 671                         mdelay(15);
 672                         LOCK(flags);
 673                         MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
 674                 }
 675                 UNLOCK(flags);
 676                 if (param & PMAC_SCC_FLAG_XMON)
 677                         macio->flags |= MACIO_FLAG_SCC_LOCKED;
 678         } else {
 679                 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
 680                         return -EPERM;
 681                 LOCK(flags);
 682                 fcr = MACIO_IN32(KEYLARGO_FCR0);
 683                 if (chan_mask & MACIO_FLAG_SCCA_ON)
 684                         fcr &= ~KL0_SCCA_ENABLE;
 685                 if (chan_mask & MACIO_FLAG_SCCB_ON) {
 686                         fcr &= ~KL0_SCCB_ENABLE;
 687                         /* Perform irda specific clears */
 688                         if ((param & 0xfff) == PMAC_SCC_IRDA) {
 689                                 fcr &= ~KL0_IRDA_ENABLE;
 690                                 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
 691                                 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
 692                                 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
 693                         }
 694                 }
 695                 MACIO_OUT32(KEYLARGO_FCR0, fcr);
 696                 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
 697                         fcr &= ~KL0_SCC_CELL_ENABLE;
 698                         MACIO_OUT32(KEYLARGO_FCR0, fcr);
 699                 }
 700                 macio->flags &= ~(chan_mask);
 701                 UNLOCK(flags);
 702                 mdelay(10);
 703         }
 704         return 0;
 705 }
 706
 707 static long
 708 core99_modem_enable(struct device_node *node, long param, long value)
 709 {
 710         struct macio_chip*      macio;
 711         u8                      gpio;
 712         unsigned long           flags;
 713
 714         /* Hack for internal USB modem */
 715         if (node == NULL) {
 716                 if (macio_chips[0].type != macio_keylargo)
 717                         return -ENODEV;
 718                 node = macio_chips[0].of_node;
 719         }
 720         macio = macio_find(node, 0);
 721         if (!macio)
 722                 return -ENODEV;
 723         gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
 724         gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
 725         gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
 726
 727         if (!value) {
 728                 LOCK(flags);
 729                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
 730                 UNLOCK(flags);
 731                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
 732                 mdelay(250);
 733         }
 734         LOCK(flags);
 735         if (value) {
 736                 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
 737                 UNLOCK(flags);
 738                 (void)MACIO_IN32(KEYLARGO_FCR2);
 739                 mdelay(250);
 740         } else {
 741                 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
 742                 UNLOCK(flags);
 743         }
 744         if (value) {
 745                 LOCK(flags);
 746                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
 747                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
 748                 UNLOCK(flags); mdelay(250); LOCK(flags);
 749                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
 750                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
 751                 UNLOCK(flags); mdelay(250); LOCK(flags);
 752                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
 753                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
 754                 UNLOCK(flags); mdelay(250);
 755         }
 756         return 0;
 757 }
 758
 759 static long
 760 pangea_modem_enable(struct device_node *node, long param, long value)
 761 {
 762         struct macio_chip*      macio;
 763         u8                      gpio;
 764         unsigned long           flags;
 765
 766         /* Hack for internal USB modem */
 767         if (node == NULL) {
 768                 if (macio_chips[0].type != macio_pangea &&
 769                     macio_chips[0].type != macio_intrepid)
 770                         return -ENODEV;
 771                 node = macio_chips[0].of_node;
 772         }
 773         macio = macio_find(node, 0);
 774         if (!macio)
 775                 return -ENODEV;
 776         gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
 777         gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
 778         gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
 779
 780         if (!value) {
 781                 LOCK(flags);
 782                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
 783                 UNLOCK(flags);
 784                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
 785                 mdelay(250);
 786         }
 787         LOCK(flags);
 788         if (value) {
 789                 MACIO_OUT8(KL_GPIO_MODEM_POWER,
 790                         KEYLARGO_GPIO_OUTPUT_ENABLE);
 791                 UNLOCK(flags);
 792                 (void)MACIO_IN32(KEYLARGO_FCR2);
 793                 mdelay(250);
 794         } else {
 795                 MACIO_OUT8(KL_GPIO_MODEM_POWER,
 796                         KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
 797                 UNLOCK(flags);
 798         }
 799         if (value) {
 800                 LOCK(flags);
 801                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
 802                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
 803                 UNLOCK(flags); mdelay(250); LOCK(flags);
 804                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
 805                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
 806                 UNLOCK(flags); mdelay(250); LOCK(flags);
 807                 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
 808                 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
 809                 UNLOCK(flags); mdelay(250);
 810         }
 811         return 0;
 812 }
 813
 814 static long
 815 core99_ata100_enable(struct device_node *node, long value)
 816 {
 817         unsigned long flags;
 818         struct pci_dev *pdev = NULL;
 819         u8 pbus, pid;
 820
 821         if (uninorth_rev < 0x24)
 822                 return -ENODEV;
 823
 824         LOCK(flags);
 825         if (value)
 826                 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
 827         else
 828                 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
 829         (void)UN_IN(UNI_N_CLOCK_CNTL);
 830         UNLOCK(flags);
 831         udelay(20);
 832
 833         if (value) {
 834                 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
 835                         pdev = pci_find_slot(pbus, pid);
 836                 if (pdev == NULL)
 837                         return 0;
 838                 pci_enable_device(pdev);
 839                 pci_set_master(pdev);
 840         }
 841         return 0;
 842 }
 843
 844 static long
 845 core99_ide_enable(struct device_node *node, long param, long value)
 846 {
 847         /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
 848          * based ata-100
 849          */
 850         switch(param) {
 851             case 0:
 852                 return simple_feature_tweak(node, macio_unknown,
 853                         KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
 854             case 1:
 855                 return simple_feature_tweak(node, macio_unknown,
 856                         KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
 857             case 2:
 858                 return simple_feature_tweak(node, macio_unknown,
 859                         KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
 860             case 3:
 861                 return core99_ata100_enable(node, value);
 862             default:
 863                 return -ENODEV;
 864         }
 865 }
 866
 867 static long
 868 core99_ide_reset(struct device_node *node, long param, long value)
 869 {
 870         switch(param) {
 871             case 0:
 872                 return simple_feature_tweak(node, macio_unknown,
 873                         KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
 874             case 1:
 875                 return simple_feature_tweak(node, macio_unknown,
 876                         KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
 877             case 2:
 878                 return simple_feature_tweak(node, macio_unknown,
 879                         KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
 880             default:
 881                 return -ENODEV;
 882         }
 883 }
 884
 885 static long
 886 core99_gmac_enable(struct device_node *node, long param, long value)
 887 {
 888         unsigned long flags;
 889
 890         LOCK(flags);
 891         if (value)
 892                 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
 893         else
 894                 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
 895         (void)UN_IN(UNI_N_CLOCK_CNTL);
 896         UNLOCK(flags);
 897         udelay(20);
 898
 899         return 0;
 900 }
 901
 902 static long
 903 core99_gmac_phy_reset(struct device_node *node, long param, long value)
 904 {
 905         unsigned long flags;
 906         struct macio_chip *macio;
 907
 908         macio = &macio_chips[0];
 909         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
 910             macio->type != macio_intrepid)
 911                 return -ENODEV;
 912
 913         printk(KERN_DEBUG "Hard reset of PHY chip ...\n");
 914
 915         LOCK(flags);
 916         MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
 917         (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
 918         UNLOCK(flags);
 919         msleep(10);
 920         LOCK(flags);
 921         MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
 922                 KEYLARGO_GPIO_OUTOUT_DATA);
 923         UNLOCK(flags);
 924         msleep(10);
 925
 926         return 0;
 927 }
 928
 929 static long
 930 core99_sound_chip_enable(struct device_node *node, long param, long value)
 931 {
 932         struct macio_chip*      macio;
 933         unsigned long           flags;
 934
 935         macio = macio_find(node, 0);
 936         if (!macio)
 937                 return -ENODEV;
 938
 939         /* Do a better probe code, screamer G4 desktops &
 940          * iMacs can do that too, add a recalibrate  in
 941          * the driver as well
 942          */
 943         if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
 944             pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
 945                 LOCK(flags);
 946                 if (value)
 947                         MACIO_OUT8(KL_GPIO_SOUND_POWER,
 948                                 KEYLARGO_GPIO_OUTPUT_ENABLE |
 949                                 KEYLARGO_GPIO_OUTOUT_DATA);
 950                 else
 951                         MACIO_OUT8(KL_GPIO_SOUND_POWER,
 952                                 KEYLARGO_GPIO_OUTPUT_ENABLE);
 953                 (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
 954                 UNLOCK(flags);
 955         }
 956         return 0;
 957 }
 958
 959 static long
 960 core99_airport_enable(struct device_node *node, long param, long value)
 961 {
 962         struct macio_chip*      macio;
 963         unsigned long           flags;
 964         int                     state;
 965
 966         macio = macio_find(node, 0);
 967         if (!macio)
 968                 return -ENODEV;
 969
 970         /* Hint: we allow passing of macio itself for the sake of the
 971          * sleep code
 972          */
 973         if (node != macio->of_node &&
 974             (!node->parent || node->parent != macio->of_node))
 975                 return -ENODEV;
 976         state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
 977         if (value == state)
 978                 return 0;
 979         if (value) {
 980                 /* This code is a reproduction of OF enable-cardslot
 981                  * and init-wireless methods, slightly hacked until
 982                  * I got it working.
 983                  */
 984                 LOCK(flags);
 985                 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
 986                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
 987                 UNLOCK(flags);
 988                 mdelay(10);
 989                 LOCK(flags);
 990                 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
 991                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
 992                 UNLOCK(flags);
 993
 994                 mdelay(10);
 995
 996                 LOCK(flags);
 997                 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
 998                 (void)MACIO_IN32(KEYLARGO_FCR2);
 999                 udelay(10);
1000                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
1001                 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
1002                 udelay(10);
1003                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
1004                 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
1005                 udelay(10);
1006                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
1007                 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
1008                 udelay(10);
1009                 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
1010                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
1011                 udelay(10);
1012                 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
1013                 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
1014                 UNLOCK(flags);
1015                 udelay(10);
1016                 MACIO_OUT32(0x1c000, 0);
1017                 mdelay(1);
1018                 MACIO_OUT8(0x1a3e0, 0x41);
1019                 (void)MACIO_IN8(0x1a3e0);
1020                 udelay(10);
1021                 LOCK(flags);
1022                 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
1023                 (void)MACIO_IN32(KEYLARGO_FCR2);
1024                 UNLOCK(flags);
1025                 mdelay(100);
1026
1027                 macio->flags |= MACIO_FLAG_AIRPORT_ON;
1028         } else {
1029                 LOCK(flags);
1030                 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1031                 (void)MACIO_IN32(KEYLARGO_FCR2);
1032                 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
1033                 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
1034                 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
1035                 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
1036                 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
1037                 (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
1038                 UNLOCK(flags);
1039
1040                 macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
1041         }
1042         return 0;
1043 }
1044
1045 #ifdef CONFIG_SMP
1046 static long
1047 core99_reset_cpu(struct device_node *node, long param, long value)
1048 {
1049         unsigned int reset_io = 0;
1050         unsigned long flags;
1051         struct macio_chip *macio;
1052         struct device_node *np;
1053         const int dflt_reset_lines[] = {        KL_GPIO_RESET_CPU0,
1054                                                 KL_GPIO_RESET_CPU1,
1055                                                 KL_GPIO_RESET_CPU2,
1056                                                 KL_GPIO_RESET_CPU3 };
1057
1058         macio = &macio_chips[0];
1059         if (macio->type != macio_keylargo)
1060                 return -ENODEV;
1061
1062         np = find_path_device("/cpus");
1063         if (np == NULL)
1064                 return -ENODEV;
1065         for (np = np->child; np != NULL; np = np->sibling) {
1066                 u32 *num = (u32 *)get_property(np, "reg", NULL);
1067                 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL);
1068                 if (num == NULL || rst == NULL)
1069                         continue;
1070                 if (param == *num) {
1071                         reset_io = *rst;
1072                         break;
1073                 }
1074         }
1075         if (np == NULL || reset_io == 0)
1076                 reset_io = dflt_reset_lines[param];
1077
1078         LOCK(flags);
1079         MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1080         (void)MACIO_IN8(reset_io);
1081         udelay(1);
1082         MACIO_OUT8(reset_io, 0);
1083         (void)MACIO_IN8(reset_io);
1084         UNLOCK(flags);
1085
1086         return 0;
1087 }
1088 #endif /* CONFIG_SMP */
1089
1090 static long
1091 core99_usb_enable(struct device_node *node, long param, long value)
1092 {
1093         struct macio_chip *macio;
1094         unsigned long flags;
1095         char *prop;
1096         int number;
1097         u32 reg;
1098
1099         macio = &macio_chips[0];
1100         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1101             macio->type != macio_intrepid)
1102                 return -ENODEV;
1103
1104         prop = (char *)get_property(node, "AAPL,clock-id", NULL);
1105         if (!prop)
1106                 return -ENODEV;
1107         if (strncmp(prop, "usb0u048", 8) == 0)
1108                 number = 0;
1109         else if (strncmp(prop, "usb1u148", 8) == 0)
1110                 number = 2;
1111         else if (strncmp(prop, "usb2u248", 8) == 0)
1112                 number = 4;
1113         else
1114                 return -ENODEV;
1115
1116         /* Sorry for the brute-force locking, but this is only used during
1117          * sleep and the timing seem to be critical
1118          */
1119         LOCK(flags);
1120         if (value) {
1121                 /* Turn ON */
1122                 if (number == 0) {
1123                         MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1124                         (void)MACIO_IN32(KEYLARGO_FCR0);
1125                         UNLOCK(flags);
1126                         mdelay(1);
1127                         LOCK(flags);
1128                         MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1129                 } else if (number == 2) {
1130                         MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1131                         UNLOCK(flags);
1132                         (void)MACIO_IN32(KEYLARGO_FCR0);
1133                         mdelay(1);
1134                         LOCK(flags);
1135                         MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1136                 } else if (number == 4) {
1137                         MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1138                         UNLOCK(flags);
1139                         (void)MACIO_IN32(KEYLARGO_FCR1);
1140                         mdelay(1);
1141                         LOCK(flags);
1142                         MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
1143                 }
1144                 if (number < 4) {
1145                         reg = MACIO_IN32(KEYLARGO_FCR4);
1146                         reg &=  ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1147                                 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
1148                         reg &=  ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1149                                 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
1150                         MACIO_OUT32(KEYLARGO_FCR4, reg);
1151                         (void)MACIO_IN32(KEYLARGO_FCR4);
1152                         udelay(10);
1153                 } else {
1154                         reg = MACIO_IN32(KEYLARGO_FCR3);
1155                         reg &=  ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1156                                 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
1157                         reg &=  ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1158                                 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
1159                         MACIO_OUT32(KEYLARGO_FCR3, reg);
1160                         (void)MACIO_IN32(KEYLARGO_FCR3);
1161                         udelay(10);
1162                 }
1163                 if (macio->type == macio_intrepid) {
1164                         /* wait for clock stopped bits to clear */
1165                         u32 test0 = 0, test1 = 0;
1166                         u32 status0, status1;
1167                         int timeout = 1000;
1168
1169                         UNLOCK(flags);
1170                         switch (number) {
1171                         case 0:
1172                                 test0 = UNI_N_CLOCK_STOPPED_USB0;
1173                                 test1 = UNI_N_CLOCK_STOPPED_USB0PCI;
1174                                 break;
1175                         case 2:
1176                                 test0 = UNI_N_CLOCK_STOPPED_USB1;
1177                                 test1 = UNI_N_CLOCK_STOPPED_USB1PCI;
1178                                 break;
1179                         case 4:
1180                                 test0 = UNI_N_CLOCK_STOPPED_USB2;
1181                                 test1 = UNI_N_CLOCK_STOPPED_USB2PCI;
1182                                 break;
1183                         }
1184                         do {
1185                                 if (--timeout <= 0) {
1186                                         printk(KERN_ERR "core99_usb_enable: "
1187                                                "Timeout waiting for clocks\n");
1188                                         break;
1189                                 }
1190                                 mdelay(1);
1191                                 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0);
1192                                 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1);
1193                         } while ((status0 & test0) | (status1 & test1));
1194                         LOCK(flags);
1195                 }
1196         } else {
1197                 /* Turn OFF */
1198                 if (number < 4) {
1199                         reg = MACIO_IN32(KEYLARGO_FCR4);
1200                         reg |=  KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1201                                 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
1202                         reg |=  KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1203                                 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
1204                         MACIO_OUT32(KEYLARGO_FCR4, reg);
1205                         (void)MACIO_IN32(KEYLARGO_FCR4);
1206                         udelay(1);
1207                 } else {
1208                         reg = MACIO_IN32(KEYLARGO_FCR3);
1209                         reg |=  KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1210                                 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
1211                         reg |=  KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1212                                 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
1213                         MACIO_OUT32(KEYLARGO_FCR3, reg);
1214                         (void)MACIO_IN32(KEYLARGO_FCR3);
1215                         udelay(1);
1216                 }
1217                 if (number == 0) {
1218                         if (macio->type != macio_intrepid)
1219                                 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1220                         (void)MACIO_IN32(KEYLARGO_FCR0);
1221                         udelay(1);
1222                         MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1223                         (void)MACIO_IN32(KEYLARGO_FCR0);
1224                 } else if (number == 2) {
1225                         if (macio->type != macio_intrepid)
1226                                 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1227                         (void)MACIO_IN32(KEYLARGO_FCR0);
1228                         udelay(1);
1229                         MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1230                         (void)MACIO_IN32(KEYLARGO_FCR0);
1231                 } else if (number == 4) {
1232                         udelay(1);
1233                         MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1234                         (void)MACIO_IN32(KEYLARGO_FCR1);
1235                 }
1236                 udelay(1);
1237         }
1238         UNLOCK(flags);
1239
1240         return 0;
1241 }
1242
1243 static long
1244 core99_firewire_enable(struct device_node *node, long param, long value)
1245 {
1246         unsigned long flags;
1247         struct macio_chip *macio;
1248
1249         macio = &macio_chips[0];
1250         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1251             macio->type != macio_intrepid)
1252                 return -ENODEV;
1253         if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1254                 return -ENODEV;
1255
1256         LOCK(flags);
1257         if (value) {
1258                 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1259                 (void)UN_IN(UNI_N_CLOCK_CNTL);
1260         } else {
1261                 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1262                 (void)UN_IN(UNI_N_CLOCK_CNTL);
1263         }
1264         UNLOCK(flags);
1265         mdelay(1);
1266
1267         return 0;
1268 }
1269
1270 static long
1271 core99_firewire_cable_power(struct device_node *node, long param, long value)
1272 {
1273         unsigned long flags;
1274         struct macio_chip *macio;
1275
1276         /* Trick: we allow NULL node */
1277         if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
1278                 return -ENODEV;
1279         macio = &macio_chips[0];
1280         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1281             macio->type != macio_intrepid)
1282                 return -ENODEV;
1283         if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1284                 return -ENODEV;
1285
1286         LOCK(flags);
1287         if (value) {
1288                 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
1289                 MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
1290                 udelay(10);
1291         } else {
1292                 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
1293                 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
1294         }
1295         UNLOCK(flags);
1296         mdelay(1);
1297
1298         return 0;
1299 }
1300
1301 static long
1302 intrepid_aack_delay_enable(struct device_node *node, long param, long value)
1303 {
1304         unsigned long flags;
1305
1306         if (uninorth_rev < 0xd2)
1307                 return -ENODEV;
1308
1309         LOCK(flags);
1310         if (param)
1311                 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1312         else
1313                 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1314         UNLOCK(flags);
1315
1316         return 0;
1317 }
1318
1319
1320 #endif /* CONFIG_POWER4 */
1321
1322 static long
1323 core99_read_gpio(struct device_node *node, long param, long value)
1324 {
1325         struct macio_chip *macio = &macio_chips[0];
1326
1327         return MACIO_IN8(param);
1328 }
1329
1330
1331 static long
1332 core99_write_gpio(struct device_node *node, long param, long value)
1333 {
1334         struct macio_chip *macio = &macio_chips[0];
1335
1336         MACIO_OUT8(param, (u8)(value & 0xff));
1337         return 0;
1338 }
1339
1340 #ifdef CONFIG_POWER4
1341 static long g5_gmac_enable(struct device_node *node, long param, long value)
1342 {
1343         struct macio_chip *macio = &macio_chips[0];
1344         unsigned long flags;
1345
1346         if (node == NULL)
1347                 return -ENODEV;
1348
1349         LOCK(flags);
1350         if (value) {
1351                 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1352                 mb();
1353                 k2_skiplist[0] = NULL;
1354         } else {
1355                 k2_skiplist[0] = node;
1356                 mb();
1357                 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1358         }
1359
1360         UNLOCK(flags);
1361         mdelay(1);
1362
1363         return 0;
1364 }
1365
1366 static long g5_fw_enable(struct device_node *node, long param, long value)
1367 {
1368         struct macio_chip *macio = &macio_chips[0];
1369         unsigned long flags;
1370
1371         if (node == NULL)
1372                 return -ENODEV;
1373
1374         LOCK(flags);
1375         if (value) {
1376                 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1377                 mb();
1378                 k2_skiplist[1] = NULL;
1379         } else {
1380                 k2_skiplist[1] = node;
1381                 mb();
1382                 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1383         }
1384
1385         UNLOCK(flags);
1386         mdelay(1);
1387
1388         return 0;
1389 }
1390
1391 static long g5_mpic_enable(struct device_node *node, long param, long value)
1392 {
1393         unsigned long flags;
1394         struct device_node *parent = of_get_parent(node);
1395         int is_u3;
1396
1397         if (parent == NULL)
1398                 return 0;
1399         is_u3 = strcmp(parent->name, "u3") == 0 ||
1400                 strcmp(parent->name, "u4") == 0;
1401         of_node_put(parent);
1402         if (!is_u3)
1403                 return 0;
1404
1405         LOCK(flags);
1406         UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
1407         UNLOCK(flags);
1408
1409         return 0;
1410 }
1411
1412 static long g5_eth_phy_reset(struct device_node *node, long param, long value)
1413 {
1414         struct macio_chip *macio = &macio_chips[0];
1415         struct device_node *phy;
1416         int need_reset;
1417
1418         /*
1419          * We must not reset the combo PHYs, only the BCM5221 found in
1420          * the iMac G5.
1421          */
1422         phy = of_get_next_child(node, NULL);
1423         if (!phy)
1424                 return -ENODEV;
1425         need_reset = device_is_compatible(phy, "B5221");
1426         of_node_put(phy);
1427         if (!need_reset)
1428                 return 0;
1429
1430         /* PHY reset is GPIO 29, not in device-tree unfortunately */
1431         MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
1432                    KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
1433         /* Thankfully, this is now always called at a time when we can
1434          * schedule by sungem.
1435          */
1436         msleep(10);
1437         MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
1438
1439         return 0;
1440 }
1441
1442 static long g5_i2s_enable(struct device_node *node, long param, long value)
1443 {
1444         /* Very crude implementation for now */
1445         struct macio_chip *macio = &macio_chips[0];
1446         unsigned long flags;
1447         int cell;
1448         u32 fcrs[3][3] = {
1449                 { 0,
1450                   K2_FCR1_I2S0_CELL_ENABLE |
1451                   K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE,
1452                   KL3_I2S0_CLK18_ENABLE
1453                 },
1454                 { KL0_SCC_A_INTF_ENABLE,
1455                   K2_FCR1_I2S1_CELL_ENABLE |
1456                   K2_FCR1_I2S1_CLK_ENABLE_BIT | K2_FCR1_I2S1_ENABLE,
1457                   KL3_I2S1_CLK18_ENABLE
1458                 },
1459                 { KL0_SCC_B_INTF_ENABLE,
1460                   SH_FCR1_I2S2_CELL_ENABLE |
1461                   SH_FCR1_I2S2_CLK_ENABLE_BIT | SH_FCR1_I2S2_ENABLE,
1462                   SH_FCR3_I2S2_CLK18_ENABLE
1463                 },
1464         };
1465
1466         if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1467                 return -ENODEV;
1468         if (strncmp(node->name, "i2s-", 4))
1469                 return -ENODEV;
1470         cell = node->name[4] - 'a';
1471         switch(cell) {
1472         case 0:
1473         case 1:
1474                 break;
1475         case 2:
1476                 if (macio->type == macio_shasta)
1477                         break;
1478         default:
1479                 return -ENODEV;
1480         }
1481
1482         LOCK(flags);
1483         if (value) {
1484                 MACIO_BIC(KEYLARGO_FCR0, fcrs[cell][0]);
1485                 MACIO_BIS(KEYLARGO_FCR1, fcrs[cell][1]);
1486                 MACIO_BIS(KEYLARGO_FCR3, fcrs[cell][2]);
1487         } else {
1488                 MACIO_BIC(KEYLARGO_FCR3, fcrs[cell][2]);
1489                 MACIO_BIC(KEYLARGO_FCR1, fcrs[cell][1]);
1490                 MACIO_BIS(KEYLARGO_FCR0, fcrs[cell][0]);
1491         }
1492         udelay(10);
1493         UNLOCK(flags);
1494
1495         return 0;
1496 }
1497
1498
1499 #ifdef CONFIG_SMP
1500 static long g5_reset_cpu(struct device_node *node, long param, long value)
1501 {
1502         unsigned int reset_io = 0;
1503         unsigned long flags;
1504         struct macio_chip *macio;
1505         struct device_node *np;
1506
1507         macio = &macio_chips[0];
1508         if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1509                 return -ENODEV;
1510
1511         np = find_path_device("/cpus");
1512         if (np == NULL)
1513                 return -ENODEV;
1514         for (np = np->child; np != NULL; np = np->sibling) {
1515                 u32 *num = (u32 *)get_property(np, "reg", NULL);
1516                 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL);
1517                 if (num == NULL || rst == NULL)
1518                         continue;
1519                 if (param == *num) {
1520                         reset_io = *rst;
1521                         break;
1522                 }
1523         }
1524         if (np == NULL || reset_io == 0)
1525                 return -ENODEV;
1526
1527         LOCK(flags);
1528         MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1529         (void)MACIO_IN8(reset_io);
1530         udelay(1);
1531         MACIO_OUT8(reset_io, 0);
1532         (void)MACIO_IN8(reset_io);
1533         UNLOCK(flags);
1534
1535         return 0;
1536 }
1537 #endif /* CONFIG_SMP */
1538
1539 /*
1540  * This can be called from pmac_smp so isn't static
1541  *
1542  * This takes the second CPU off the bus on dual CPU machines
1543  * running UP
1544  */
1545 void g5_phy_disable_cpu1(void)
1546 {
1547         if (uninorth_maj == 3)
1548                 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1549 }
1550 #endif /* CONFIG_POWER4 */
1551
1552 #ifndef CONFIG_POWER4
1553
1554
1555 #ifdef CONFIG_PM
1556
1557 static void keylargo_shutdown(struct macio_chip *macio, int sleep_mode)
1558 {
1559         u32 temp;
1560
1561         if (sleep_mode) {
1562                 mdelay(1);
1563                 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
1564                 (void)MACIO_IN32(KEYLARGO_FCR0);
1565                 mdelay(1);
1566         }
1567
1568         MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1569                                 KL0_SCC_CELL_ENABLE |
1570                                 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
1571                                 KL0_IRDA_CLK19_ENABLE);
1572
1573         MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
1574         MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
1575
1576         MACIO_BIC(KEYLARGO_FCR1,
1577                 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1578                 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1579                 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1580                 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1581                 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1582                 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
1583                 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
1584                 KL1_UIDE_ENABLE);
1585
1586         MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1587         MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
1588
1589         temp = MACIO_IN32(KEYLARGO_FCR3);
1590         if (macio->rev >= 2) {
1591                 temp |= KL3_SHUTDOWN_PLL2X;
1592                 if (sleep_mode)
1593                         temp |= KL3_SHUTDOWN_PLL_TOTAL;
1594         }
1595
1596         temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1597                 KL3_SHUTDOWN_PLLKW35;
1598         if (sleep_mode)
1599                 temp |= KL3_SHUTDOWN_PLLKW12;
1600         temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
1601                 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1602         if (sleep_mode)
1603                 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
1604         MACIO_OUT32(KEYLARGO_FCR3, temp);
1605
1606         /* Flush posted writes & wait a bit */
1607         (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1608 }
1609
1610 static void pangea_shutdown(struct macio_chip *macio, int sleep_mode)
1611 {
1612         u32 temp;
1613
1614         MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1615                                 KL0_SCC_CELL_ENABLE |
1616                                 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1617
1618         MACIO_BIC(KEYLARGO_FCR1,
1619                 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1620                 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1621                 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1622                 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1623                 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1624                 KL1_UIDE_ENABLE);
1625         if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1626                 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1627
1628         MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1629
1630         temp = MACIO_IN32(KEYLARGO_FCR3);
1631         temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1632                 KL3_SHUTDOWN_PLLKW35;
1633         temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
1634                 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
1635         if (sleep_mode)
1636                 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
1637         MACIO_OUT32(KEYLARGO_FCR3, temp);
1638
1639         /* Flush posted writes & wait a bit */
1640         (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1641 }
1642
1643 static void intrepid_shutdown(struct macio_chip *macio, int sleep_mode)
1644 {
1645         u32 temp;
1646
1647         MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1648                   KL0_SCC_CELL_ENABLE);
1649
1650         MACIO_BIC(KEYLARGO_FCR1,
1651                   /*KL1_USB2_CELL_ENABLE |*/
1652                 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1653                 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1654                 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE);
1655         if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1656                 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1657
1658         temp = MACIO_IN32(KEYLARGO_FCR3);
1659         temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
1660                   KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1661         if (sleep_mode)
1662                 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
1663         MACIO_OUT32(KEYLARGO_FCR3, temp);
1664
1665         /* Flush posted writes & wait a bit */
1666         (void)MACIO_IN32(KEYLARGO_FCR0);
1667         mdelay(10);
1668 }
1669
1670
1671 static int
1672 core99_sleep(void)
1673 {
1674         struct macio_chip *macio;
1675         int i;
1676
1677         macio = &macio_chips[0];
1678         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1679             macio->type != macio_intrepid)
1680                 return -ENODEV;
1681
1682         /* We power off the wireless slot in case it was not done
1683          * by the driver. We don't power it on automatically however
1684          */
1685         if (macio->flags & MACIO_FLAG_AIRPORT_ON)
1686                 core99_airport_enable(macio->of_node, 0, 0);
1687
1688         /* We power off the FW cable. Should be done by the driver... */
1689         if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
1690                 core99_firewire_enable(NULL, 0, 0);
1691                 core99_firewire_cable_power(NULL, 0, 0);
1692         }
1693
1694         /* We make sure int. modem is off (in case driver lost it) */
1695         if (macio->type == macio_keylargo)
1696                 core99_modem_enable(macio->of_node, 0, 0);
1697         else
1698                 pangea_modem_enable(macio->of_node, 0, 0);
1699
1700         /* We make sure the sound is off as well */
1701         core99_sound_chip_enable(macio->of_node, 0, 0);
1702
1703         /*
1704          * Save various bits of KeyLargo
1705          */
1706
1707         /* Save the state of the various GPIOs */
1708         save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
1709         save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
1710         for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1711                 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
1712         for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1713                 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
1714
1715         /* Save the FCRs */
1716         if (macio->type == macio_keylargo)
1717                 save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
1718         save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
1719         save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
1720         save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
1721         save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
1722         save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
1723         if (macio->type == macio_pangea || macio->type == macio_intrepid)
1724                 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
1725
1726         /* Save state & config of DBDMA channels */
1727         dbdma_save(macio, save_dbdma);
1728
1729         /*
1730          * Turn off as much as we can
1731          */
1732         if (macio->type == macio_pangea)
1733                 pangea_shutdown(macio, 1);
1734         else if (macio->type == macio_intrepid)
1735                 intrepid_shutdown(macio, 1);
1736         else if (macio->type == macio_keylargo)
1737                 keylargo_shutdown(macio, 1);
1738
1739         /*
1740          * Put the host bridge to sleep
1741          */
1742
1743         save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
1744         /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it
1745          * enabled !
1746          */
1747         UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
1748                ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
1749         udelay(100);
1750         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1751         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
1752         mdelay(10);
1753
1754         /*
1755          * FIXME: A bit of black magic with OpenPIC (don't ask me why)
1756          */
1757         if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1758                 MACIO_BIS(0x506e0, 0x00400000);
1759                 MACIO_BIS(0x506e0, 0x80000000);
1760         }
1761         return 0;
1762 }
1763
1764 static int
1765 core99_wake_up(void)
1766 {
1767         struct macio_chip *macio;
1768         int i;
1769
1770         macio = &macio_chips[0];
1771         if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1772             macio->type != macio_intrepid)
1773                 return -ENODEV;
1774
1775         /*
1776          * Wakeup the host bridge
1777          */
1778         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1779         udelay(10);
1780         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1781         udelay(10);
1782
1783         /*
1784          * Restore KeyLargo
1785          */
1786
1787         if (macio->type == macio_keylargo) {
1788                 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
1789                 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
1790         }
1791         MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
1792         (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
1793         MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
1794         (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
1795         MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
1796         (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
1797         MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
1798         (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
1799         MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
1800         (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
1801         if (macio->type == macio_pangea || macio->type == macio_intrepid) {
1802                 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
1803                 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
1804         }
1805
1806         dbdma_restore(macio, save_dbdma);
1807
1808         MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
1809         MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
1810         for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1811                 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
1812         for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1813                 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
1814
1815         /* FIXME more black magic with OpenPIC ... */
1816         if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1817                 MACIO_BIC(0x506e0, 0x00400000);
1818                 MACIO_BIC(0x506e0, 0x80000000);
1819         }
1820
1821         UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
1822         udelay(100);
1823
1824         return 0;
1825 }
1826
1827 #endif /* CONFIG_PM */
1828
1829 static long
1830 core99_sleep_state(struct device_node *node, long param, long value)
1831 {
1832         /* Param == 1 means to enter the "fake sleep" mode that is
1833          * used for CPU speed switch
1834          */
1835         if (param == 1) {
1836                 if (value == 1) {
1837                         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1838                         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
1839                 } else {
1840                         UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1841                         udelay(10);
1842                         UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1843                         udelay(10);
1844                 }
1845                 return 0;
1846         }
1847         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
1848                 return -EPERM;
1849
1850 #ifdef CONFIG_PM
1851         if (value == 1)
1852                 return core99_sleep();
1853         else if (value == 0)
1854                 return core99_wake_up();
1855
1856 #endif /* CONFIG_PM */
1857         return 0;
1858 }
1859
1860 #endif /* CONFIG_POWER4 */
1861
1862 static long
1863 generic_dev_can_wake(struct device_node *node, long param, long value)
1864 {
1865         /* Todo: eventually check we are really dealing with on-board
1866          * video device ...
1867          */
1868
1869         if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP)
1870                 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP;
1871         return 0;
1872 }
1873
1874 static long generic_get_mb_info(struct device_node *node, long param, long value)
1875 {
1876         switch(param) {
1877                 case PMAC_MB_INFO_MODEL:
1878                         return pmac_mb.model_id;
1879                 case PMAC_MB_INFO_FLAGS:
1880                         return pmac_mb.board_flags;
1881                 case PMAC_MB_INFO_NAME:
1882                         /* hack hack hack... but should work */
1883                         *((const char **)value) = pmac_mb.model_name;
1884                         return 0;
1885         }
1886         return -EINVAL;
1887 }
1888
1889
1890 /*
1891  * Table definitions
1892  */
1893
1894 /* Used on any machine
1895  */
1896 static struct feature_table_entry any_features[] = {
1897         { PMAC_FTR_GET_MB_INFO,         generic_get_mb_info },
1898         { PMAC_FTR_DEVICE_CAN_WAKE,     generic_dev_can_wake },
1899         { 0, NULL }
1900 };
1901
1902 #ifndef CONFIG_POWER4
1903
1904 /* OHare based motherboards. Currently, we only use these on the
1905  * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1906  * to have issues with turning on/off those asic cells
1907  */
1908 static struct feature_table_entry ohare_features[] = {
1909         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
1910         { PMAC_FTR_SWIM3_ENABLE,        ohare_floppy_enable },
1911         { PMAC_FTR_MESH_ENABLE,         ohare_mesh_enable },
1912         { PMAC_FTR_IDE_ENABLE,          ohare_ide_enable},
1913         { PMAC_FTR_IDE_RESET,           ohare_ide_reset},
1914         { PMAC_FTR_SLEEP_STATE,         ohare_sleep_state },
1915         { 0, NULL }
1916 };
1917
1918 /* Heathrow desktop machines (Beige G3).
1919  * Separated as some features couldn't be properly tested
1920  * and the serial port control bits appear to confuse it.
1921  */
1922 static struct feature_table_entry heathrow_desktop_features[] = {
1923         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
1924         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
1925         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
1926         { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
1927         { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
1928         { 0, NULL }
1929 };
1930
1931 /* Heathrow based laptop, that is the Wallstreet and mainstreet
1932  * powerbooks.
1933  */
1934 static struct feature_table_entry heathrow_laptop_features[] = {
1935         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
1936         { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
1937         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
1938         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
1939         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
1940         { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
1941         { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
1942         { PMAC_FTR_SOUND_CHIP_ENABLE,   heathrow_sound_enable },
1943         { PMAC_FTR_SLEEP_STATE,         heathrow_sleep_state },
1944         { 0, NULL }
1945 };
1946
1947 /* Paddington based machines
1948  * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1949  */
1950 static struct feature_table_entry paddington_features[] = {
1951         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
1952         { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
1953         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
1954         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
1955         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
1956         { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
1957         { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
1958         { PMAC_FTR_SOUND_CHIP_ENABLE,   heathrow_sound_enable },
1959         { PMAC_FTR_SLEEP_STATE,         heathrow_sleep_state },
1960         { 0, NULL }
1961 };
1962
1963 /* Core99 & MacRISC 2 machines (all machines released since the
1964  * iBook (included), that is all AGP machines, except pangea
1965  * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1966  * used on iBook2 & iMac "flow power".
1967  */
1968 static struct feature_table_entry core99_features[] = {
1969         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
1970         { PMAC_FTR_MODEM_ENABLE,        core99_modem_enable },
1971         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
1972         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
1973         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
1974         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
1975         { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
1976         { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
1977         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
1978         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
1979         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
1980 #ifdef CONFIG_PM
1981         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
1982 #endif
1983 #ifdef CONFIG_SMP
1984         { PMAC_FTR_RESET_CPU,           core99_reset_cpu },
1985 #endif /* CONFIG_SMP */
1986         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
1987         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
1988         { 0, NULL }
1989 };
1990
1991 /* RackMac
1992  */
1993 static struct feature_table_entry rackmac_features[] = {
1994         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
1995         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
1996         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
1997         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
1998         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
1999         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
2000         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
2001         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
2002         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
2003 #ifdef CONFIG_SMP
2004         { PMAC_FTR_RESET_CPU,           core99_reset_cpu },
2005 #endif /* CONFIG_SMP */
2006         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2007         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2008         { 0, NULL }
2009 };
2010
2011 /* Pangea features
2012  */
2013 static struct feature_table_entry pangea_features[] = {
2014         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
2015         { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
2016         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
2017         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
2018         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
2019         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
2020         { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
2021         { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
2022         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
2023         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
2024         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
2025         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
2026         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2027         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2028         { 0, NULL }
2029 };
2030
2031 /* Intrepid features
2032  */
2033 static struct feature_table_entry intrepid_features[] = {
2034         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
2035         { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
2036         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
2037         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
2038         { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
2039         { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
2040         { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
2041         { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
2042         { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
2043         { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
2044         { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
2045         { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
2046         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2047         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2048         { PMAC_FTR_AACK_DELAY_ENABLE,   intrepid_aack_delay_enable },
2049         { 0, NULL }
2050 };
2051
2052 #else /* CONFIG_POWER4 */
2053
2054 /* G5 features
2055  */
2056 static struct feature_table_entry g5_features[] = {
2057         { PMAC_FTR_GMAC_ENABLE,         g5_gmac_enable },
2058         { PMAC_FTR_1394_ENABLE,         g5_fw_enable },
2059         { PMAC_FTR_ENABLE_MPIC,         g5_mpic_enable },
2060         { PMAC_FTR_GMAC_PHY_RESET,      g5_eth_phy_reset },
2061         { PMAC_FTR_SOUND_CHIP_ENABLE,   g5_i2s_enable },
2062 #ifdef CONFIG_SMP
2063         { PMAC_FTR_RESET_CPU,           g5_reset_cpu },
2064 #endif /* CONFIG_SMP */
2065         { PMAC_FTR_READ_GPIO,           core99_read_gpio },
2066         { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
2067         { 0, NULL }
2068 };
2069
2070 #endif /* CONFIG_POWER4 */
2071
2072 static struct pmac_mb_def pmac_mb_defs[] = {
2073 #ifndef CONFIG_POWER4
2074         /*
2075          * Desktops
2076          */
2077
2078         {       "AAPL,8500",                    "PowerMac 8500/8600",
2079                 PMAC_TYPE_PSURGE,               NULL,
2080                 0
2081         },
2082         {       "AAPL,9500",                    "PowerMac 9500/9600",
2083                 PMAC_TYPE_PSURGE,               NULL,
2084                 0
2085         },
2086         {       "AAPL,7200",                    "PowerMac 7200",
2087                 PMAC_TYPE_PSURGE,               NULL,
2088                 0
2089         },
2090         {       "AAPL,7300",                    "PowerMac 7200/7300",
2091                 PMAC_TYPE_PSURGE,               NULL,
2092                 0
2093         },
2094         {       "AAPL,7500",                    "PowerMac 7500",
2095                 PMAC_TYPE_PSURGE,               NULL,
2096                 0
2097         },
2098         {       "AAPL,ShinerESB",               "Apple Network Server",
2099                 PMAC_TYPE_ANS,                  NULL,
2100                 0
2101         },
2102         {       "AAPL,e407",                    "Alchemy",
2103                 PMAC_TYPE_ALCHEMY,              NULL,
2104                 0
2105         },
2106         {       "AAPL,e411",                    "Gazelle",
2107                 PMAC_TYPE_GAZELLE,              NULL,
2108                 0
2109         },
2110         {       "AAPL,Gossamer",                "PowerMac G3 (Gossamer)",
2111                 PMAC_TYPE_GOSSAMER,             heathrow_desktop_features,
2112                 0
2113         },
2114         {       "AAPL,PowerMac G3",             "PowerMac G3 (Silk)",
2115                 PMAC_TYPE_SILK,                 heathrow_desktop_features,
2116                 0
2117         },
2118         {       "PowerMac1,1",                  "Blue&White G3",
2119                 PMAC_TYPE_YOSEMITE,             paddington_features,
2120                 0
2121         },
2122         {       "PowerMac1,2",                  "PowerMac G4 PCI Graphics",
2123                 PMAC_TYPE_YIKES,                paddington_features,
2124                 0
2125         },
2126         {       "PowerMac2,1",                  "iMac FireWire",
2127                 PMAC_TYPE_FW_IMAC,              core99_features,
2128                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2129         },
2130         {       "PowerMac2,2",                  "iMac FireWire",
2131                 PMAC_TYPE_FW_IMAC,              core99_features,
2132                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2133         },
2134         {       "PowerMac3,1",                  "PowerMac G4 AGP Graphics",
2135                 PMAC_TYPE_SAWTOOTH,             core99_features,
2136                 PMAC_MB_OLD_CORE99
2137         },
2138         {       "PowerMac3,2",                  "PowerMac G4 AGP Graphics",
2139                 PMAC_TYPE_SAWTOOTH,             core99_features,
2140                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2141         },
2142         {       "PowerMac3,3",                  "PowerMac G4 AGP Graphics",
2143                 PMAC_TYPE_SAWTOOTH,             core99_features,
2144                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2145         },
2146         {       "PowerMac3,4",                  "PowerMac G4 Silver",
2147                 PMAC_TYPE_QUICKSILVER,          core99_features,
2148                 PMAC_MB_MAY_SLEEP
2149         },
2150         {       "PowerMac3,5",                  "PowerMac G4 Silver",
2151                 PMAC_TYPE_QUICKSILVER,          core99_features,
2152                 PMAC_MB_MAY_SLEEP
2153         },
2154         {       "PowerMac3,6",                  "PowerMac G4 Windtunnel",
2155                 PMAC_TYPE_WINDTUNNEL,           core99_features,
2156                 PMAC_MB_MAY_SLEEP,
2157         },
2158         {       "PowerMac4,1",                  "iMac \"Flower Power\"",
2159                 PMAC_TYPE_PANGEA_IMAC,          pangea_features,
2160                 PMAC_MB_MAY_SLEEP
2161         },
2162         {       "PowerMac4,2",                  "Flat panel iMac",
2163                 PMAC_TYPE_FLAT_PANEL_IMAC,      pangea_features,
2164                 PMAC_MB_CAN_SLEEP
2165         },
2166         {       "PowerMac4,4",                  "eMac",
2167                 PMAC_TYPE_EMAC,                 core99_features,
2168                 PMAC_MB_MAY_SLEEP
2169         },
2170         {       "PowerMac5,1",                  "PowerMac G4 Cube",
2171                 PMAC_TYPE_CUBE,                 core99_features,
2172                 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2173         },
2174         {       "PowerMac6,1",                  "Flat panel iMac",
2175                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2176                 PMAC_MB_MAY_SLEEP,
2177         },
2178         {       "PowerMac6,3",                  "Flat panel iMac",
2179                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2180                 PMAC_MB_MAY_SLEEP,
2181         },
2182         {       "PowerMac6,4",                  "eMac",
2183                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2184                 PMAC_MB_MAY_SLEEP,
2185         },
2186         {       "PowerMac10,1",                 "Mac mini",
2187                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2188                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER,
2189         },
2190         {       "iMac,1",                       "iMac (first generation)",
2191                 PMAC_TYPE_ORIG_IMAC,            paddington_features,
2192                 0
2193         },
2194
2195         /*
2196          * Xserve's
2197          */
2198
2199         {       "RackMac1,1",                   "XServe",
2200                 PMAC_TYPE_RACKMAC,              rackmac_features,
2201                 0,
2202         },
2203         {       "RackMac1,2",                   "XServe rev. 2",
2204                 PMAC_TYPE_RACKMAC,              rackmac_features,
2205                 0,
2206         },
2207
2208         /*
2209          * Laptops
2210          */
2211
2212         {       "AAPL,3400/2400",               "PowerBook 3400",
2213                 PMAC_TYPE_HOOPER,               ohare_features,
2214                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2215         },
2216         {       "AAPL,3500",                    "PowerBook 3500",
2217                 PMAC_TYPE_KANGA,                ohare_features,
2218                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2219         },
2220         {       "AAPL,PowerBook1998",           "PowerBook Wallstreet",
2221                 PMAC_TYPE_WALLSTREET,           heathrow_laptop_features,
2222                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2223         },
2224         {       "PowerBook1,1",                 "PowerBook 101 (Lombard)",
2225                 PMAC_TYPE_101_PBOOK,            paddington_features,
2226                 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2227         },
2228         {       "PowerBook2,1",                 "iBook (first generation)",
2229                 PMAC_TYPE_ORIG_IBOOK,           core99_features,
2230                 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2231         },
2232         {       "PowerBook2,2",                 "iBook FireWire",
2233                 PMAC_TYPE_FW_IBOOK,             core99_features,
2234                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2235                 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2236         },
2237         {       "PowerBook3,1",                 "PowerBook Pismo",
2238                 PMAC_TYPE_PISMO,                core99_features,
2239                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2240                 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2241         },
2242         {       "PowerBook3,2",                 "PowerBook Titanium",
2243                 PMAC_TYPE_TITANIUM,             core99_features,
2244                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2245         },
2246         {       "PowerBook3,3",                 "PowerBook Titanium II",
2247                 PMAC_TYPE_TITANIUM2,            core99_features,
2248                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2249         },
2250         {       "PowerBook3,4",                 "PowerBook Titanium III",
2251                 PMAC_TYPE_TITANIUM3,            core99_features,
2252                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2253         },
2254         {       "PowerBook3,5",                 "PowerBook Titanium IV",
2255                 PMAC_TYPE_TITANIUM4,            core99_features,
2256                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2257         },
2258         {       "PowerBook4,1",                 "iBook 2",
2259                 PMAC_TYPE_IBOOK2,               pangea_features,
2260                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2261         },
2262         {       "PowerBook4,2",                 "iBook 2",
2263                 PMAC_TYPE_IBOOK2,               pangea_features,
2264                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2265         },
2266         {       "PowerBook4,3",                 "iBook 2 rev. 2",
2267                 PMAC_TYPE_IBOOK2,               pangea_features,
2268                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2269         },
2270         {       "PowerBook5,1",                 "PowerBook G4 17\"",
2271                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2272                 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2273         },
2274         {       "PowerBook5,2",                 "PowerBook G4 15\"",
2275                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2276                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2277         },
2278         {       "PowerBook5,3",                 "PowerBook G4 17\"",
2279                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2280                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2281         },
2282         {       "PowerBook5,4",                 "PowerBook G4 15\"",
2283                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2284                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2285         },
2286         {       "PowerBook5,5",                 "PowerBook G4 17\"",
2287                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2288                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2289         },
2290         {       "PowerBook5,6",                 "PowerBook G4 15\"",
2291                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2292                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2293         },
2294         {       "PowerBook5,7",                 "PowerBook G4 17\"",
2295                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2296                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2297         },
2298         {       "PowerBook5,8",                 "PowerBook G4 15\"",
2299                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2300                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2301         },
2302         {       "PowerBook5,9",                 "PowerBook G4 17\"",
2303                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2304                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2305         },
2306         {       "PowerBook6,1",                 "PowerBook G4 12\"",
2307                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2308                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2309         },
2310         {       "PowerBook6,2",                 "PowerBook G4",
2311                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2312                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2313         },
2314         {       "PowerBook6,3",                 "iBook G4",
2315                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2316                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2317         },
2318         {       "PowerBook6,4",                 "PowerBook G4 12\"",
2319                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2320                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2321         },
2322         {       "PowerBook6,5",                 "iBook G4",
2323                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2324                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2325         },
2326         {       "PowerBook6,7",                 "iBook G4",
2327                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2328                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2329         },
2330         {       "PowerBook6,8",                 "PowerBook G4 12\"",
2331                 PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
2332                 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2333         },
2334 #else /* CONFIG_POWER4 */
2335         {       "PowerMac7,2",                  "PowerMac G5",
2336                 PMAC_TYPE_POWERMAC_G5,          g5_features,
2337                 0,
2338         },
2339 #ifdef CONFIG_PPC64
2340         {       "PowerMac7,3",                  "PowerMac G5",
2341                 PMAC_TYPE_POWERMAC_G5,          g5_features,
2342                 0,
2343         },
2344         {       "PowerMac8,1",                  "iMac G5",
2345                 PMAC_TYPE_IMAC_G5,              g5_features,
2346                 0,
2347         },
2348         {       "PowerMac9,1",                  "PowerMac G5",
2349                 PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
2350                 0,
2351         },
2352         {       "PowerMac11,2",                 "PowerMac G5 Dual Core",
2353                 PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
2354                 0,
2355         },
2356         {       "PowerMac12,1",                 "iMac G5 (iSight)",
2357                 PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
2358                 0,
2359         },
2360         {       "RackMac3,1",                   "XServe G5",
2361                 PMAC_TYPE_XSERVE_G5,            g5_features,
2362                 0,
2363         },
2364 #endif /* CONFIG_PPC64 */
2365 #endif /* CONFIG_POWER4 */
2366 };
2367
2368 /*
2369  * The toplevel feature_call callback
2370  */
2371 long pmac_do_feature_call(unsigned int selector, ...)
2372 {
2373         struct device_node *node;
2374         long param, value;
2375         int i;
2376         feature_call func = NULL;
2377         va_list args;
2378
2379         if (pmac_mb.features)
2380                 for (i=0; pmac_mb.features[i].function; i++)
2381                         if (pmac_mb.features[i].selector == selector) {
2382                                 func = pmac_mb.features[i].function;
2383                                 break;
2384                         }
2385         if (!func)
2386                 for (i=0; any_features[i].function; i++)
2387                         if (any_features[i].selector == selector) {
2388                                 func = any_features[i].function;
2389                                 break;
2390                         }
2391         if (!func)
2392                 return -ENODEV;
2393
2394         va_start(args, selector);
2395         node = (struct device_node*)va_arg(args, void*);
2396         param = va_arg(args, long);
2397         value = va_arg(args, long);
2398         va_end(args);
2399
2400         return func(node, param, value);
2401 }
2402
2403 static int __init probe_motherboard(void)
2404 {
2405         int i;
2406         struct macio_chip *macio = &macio_chips[0];
2407         const char *model = NULL;
2408         struct device_node *dt;
2409
2410         /* Lookup known motherboard type in device-tree. First try an
2411          * exact match on the "model" property, then try a "compatible"
2412          * match is none is found.
2413          */
2414         dt = find_devices("device-tree");
2415         if (dt != NULL)
2416                 model = (const char *) get_property(dt, "model", NULL);
2417         for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2418             if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
2419                 pmac_mb = pmac_mb_defs[i];
2420                 goto found;
2421             }
2422         }
2423         for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2424             if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
2425                 pmac_mb = pmac_mb_defs[i];
2426                 goto found;
2427             }
2428         }
2429
2430         /* Fallback to selection depending on mac-io chip type */
2431         switch(macio->type) {
2432 #ifndef CONFIG_POWER4
2433             case macio_grand_central:
2434                 pmac_mb.model_id = PMAC_TYPE_PSURGE;
2435                 pmac_mb.model_name = "Unknown PowerSurge";
2436                 break;
2437             case macio_ohare:
2438                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
2439                 pmac_mb.model_name = "Unknown OHare-based";
2440                 break;
2441             case macio_heathrow:
2442                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
2443                 pmac_mb.model_name = "Unknown Heathrow-based";
2444                 pmac_mb.features = heathrow_desktop_features;
2445                 break;
2446             case macio_paddington:
2447                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
2448                 pmac_mb.model_name = "Unknown Paddington-based";
2449                 pmac_mb.features = paddington_features;
2450                 break;
2451             case macio_keylargo:
2452                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
2453                 pmac_mb.model_name = "Unknown Keylargo-based";
2454                 pmac_mb.features = core99_features;
2455                 break;
2456             case macio_pangea:
2457                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
2458                 pmac_mb.model_name = "Unknown Pangea-based";
2459                 pmac_mb.features = pangea_features;
2460                 break;
2461             case macio_intrepid:
2462                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
2463                 pmac_mb.model_name = "Unknown Intrepid-based";
2464                 pmac_mb.features = intrepid_features;
2465                 break;
2466 #else /* CONFIG_POWER4 */
2467         case macio_keylargo2:
2468                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
2469                 pmac_mb.model_name = "Unknown K2-based";
2470                 pmac_mb.features = g5_features;
2471                 break;
2472         case macio_shasta:
2473                 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_SHASTA;
2474                 pmac_mb.model_name = "Unknown Shasta-based";
2475                 pmac_mb.features = g5_features;
2476                 break;
2477 #endif /* CONFIG_POWER4 */
2478         default:
2479                 return -ENODEV;
2480         }
2481 found:
2482 #ifndef CONFIG_POWER4
2483         /* Fixup Hooper vs. Comet */
2484         if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
2485                 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4);
2486                 if (!mach_id_ptr)
2487                         return -ENODEV;
2488                 /* Here, I used to disable the media-bay on comet. It
2489                  * appears this is wrong, the floppy connector is actually
2490                  * a kind of media-bay and works with the current driver.
2491                  */
2492                 if (__raw_readl(mach_id_ptr) & 0x20000000UL)
2493                         pmac_mb.model_id = PMAC_TYPE_COMET;
2494                 iounmap(mach_id_ptr);
2495         }
2496 #endif /* CONFIG_POWER4 */
2497
2498 #ifdef CONFIG_6xx
2499         /* Set default value of powersave_nap on machines that support it.
2500          * It appears that uninorth rev 3 has a problem with it, we don't
2501          * enable it on those. In theory, the flush-on-lock property is
2502          * supposed to be set when not supported, but I'm not very confident
2503          * that all Apple OF revs did it properly, I do it the paranoid way.
2504          */
2505         while (uninorth_base && uninorth_rev > 3) {
2506                 struct device_node *np = find_path_device("/cpus");
2507                 if (!np || !np->child) {
2508                         printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
2509                         break;
2510                 }
2511                 np = np->child;
2512                 /* Nap mode not supported on SMP */
2513                 if (np->sibling)
2514                         break;
2515                 /* Nap mode not supported if flush-on-lock property is present */
2516                 if (get_property(np, "flush-on-lock", NULL))
2517                         break;
2518                 powersave_nap = 1;
2519                 printk(KERN_INFO "Processor NAP mode on idle enabled.\n");
2520                 break;
2521         }
2522
2523         /* On CPUs that support it (750FX), lowspeed by default during
2524          * NAP mode
2525          */
2526         powersave_lowspeed = 1;
2527 #endif /* CONFIG_6xx */
2528 #ifdef CONFIG_POWER4
2529         powersave_nap = 1;
2530 #endif
2531         /* Check for "mobile" machine */
2532         if (model && (strncmp(model, "PowerBook", 9) == 0
2533                    || strncmp(model, "iBook", 5) == 0))
2534                 pmac_mb.board_flags |= PMAC_MB_MOBILE;
2535
2536
2537         printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
2538         return 0;
2539 }
2540
2541 /* Initialize the Core99 UniNorth host bridge and memory controller
2542  */
2543 static void __init probe_uninorth(void)
2544 {
2545         u32 *addrp;
2546         phys_addr_t address;
2547         unsigned long actrl;
2548
2549         /* Locate core99 Uni-N */
2550         uninorth_node = of_find_node_by_name(NULL, "uni-n");
2551         /* Locate G5 u3 */
2552         if (uninorth_node == NULL) {
2553                 uninorth_node = of_find_node_by_name(NULL, "u3");
2554                 uninorth_maj = 3;
2555         }
2556         /* Locate G5 u4 */
2557         if (uninorth_node == NULL) {
2558                 uninorth_node = of_find_node_by_name(NULL, "u4");
2559                 uninorth_maj = 4;
2560         }
2561         if (uninorth_node == NULL)
2562                 return;
2563
2564         addrp = (u32 *)get_property(uninorth_node, "reg", NULL);
2565         if (addrp == NULL)
2566                 return;
2567         address = of_translate_address(uninorth_node, addrp);
2568         if (address == 0)
2569                 return;
2570         uninorth_base = ioremap(address, 0x40000);
2571         uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
2572         if (uninorth_maj == 3 || uninorth_maj == 4)
2573                 u3_ht_base = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
2574
2575         printk(KERN_INFO "Found %s memory controller & host bridge"
2576                " @ 0x%08x revision: 0x%02x\n", uninorth_maj == 3 ? "U3" :
2577                uninorth_maj == 4 ? "U4" : "UniNorth",
2578                (unsigned int)address, uninorth_rev);
2579         printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
2580
2581         /* Set the arbitrer QAck delay according to what Apple does
2582          */
2583         if (uninorth_rev < 0x11) {
2584                 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
2585                 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
2586                         UNI_N_ARB_CTRL_QACK_DELAY) <<
2587                         UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
2588                 UN_OUT(UNI_N_ARB_CTRL, actrl);
2589         }
2590
2591         /* Some more magic as done by them in recent MacOS X on UniNorth
2592          * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
2593          * memory timeout
2594          */
2595         if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) ||
2596             uninorth_rev == 0xc0)
2597                 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
2598 }
2599
2600 static void __init probe_one_macio(const char *name, const char *compat, int type)
2601 {
2602         struct device_node*     node;
2603         int                     i;
2604         volatile u32 __iomem    *base;
2605         u32                     *addrp, *revp;
2606         phys_addr_t             addr;
2607         u64                     size;
2608
2609         for (node = NULL; (node = of_find_node_by_name(node, name)) != NULL;) {
2610                 if (!compat)
2611                         break;
2612                 if (device_is_compatible(node, compat))
2613                         break;
2614         }
2615         if (!node)
2616                 return;
2617         for(i=0; i<MAX_MACIO_CHIPS; i++) {
2618                 if (!macio_chips[i].of_node)
2619                         break;
2620                 if (macio_chips[i].of_node == node)
2621                         return;
2622         }
2623
2624         if (i >= MAX_MACIO_CHIPS) {
2625                 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
2626                 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
2627                 return;
2628         }
2629         addrp = of_get_pci_address(node, 0, &size, NULL);
2630         if (addrp == NULL) {
2631                 printk(KERN_ERR "pmac_feature: %s: can't find base !\n",
2632                        node->full_name);
2633                 return;
2634         }
2635         addr = of_translate_address(node, addrp);
2636         if (addr == 0) {
2637                 printk(KERN_ERR "pmac_feature: %s, can't translate base !\n",
2638                        node->full_name);
2639                 return;
2640         }
2641         base = ioremap(addr, (unsigned long)size);
2642         if (!base) {
2643                 printk(KERN_ERR "pmac_feature: %s, can't map mac-io chip !\n",
2644                        node->full_name);
2645                 return;
2646         }
2647         if (type == macio_keylargo || type == macio_keylargo2) {
2648                 u32 *did = (u32 *)get_property(node, "device-id", NULL);
2649                 if (*did == 0x00000025)
2650                         type = macio_pangea;
2651                 if (*did == 0x0000003e)
2652                         type = macio_intrepid;
2653                 if (*did == 0x0000004f)
2654                         type = macio_shasta;
2655         }
2656         macio_chips[i].of_node  = node;
2657         macio_chips[i].type     = type;
2658         macio_chips[i].base     = base;
2659         macio_chips[i].flags    = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
2660         macio_chips[i].name     = macio_names[type];
2661         revp = (u32 *)get_property(node, "revision-id", NULL);
2662         if (revp)
2663                 macio_chips[i].rev = *revp;
2664         printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
2665                 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
2666 }
2667
2668 static int __init
2669 probe_macios(void)
2670 {
2671         /* Warning, ordering is important */
2672         probe_one_macio("gc", NULL, macio_grand_central);
2673         probe_one_macio("ohare", NULL, macio_ohare);
2674         probe_one_macio("pci106b,7", NULL, macio_ohareII);
2675         probe_one_macio("mac-io", "keylargo", macio_keylargo);
2676         probe_one_macio("mac-io", "paddington", macio_paddington);
2677         probe_one_macio("mac-io", "gatwick", macio_gatwick);
2678         probe_one_macio("mac-io", "heathrow", macio_heathrow);
2679         probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
2680
2681         /* Make sure the "main" macio chip appear first */
2682         if (macio_chips[0].type == macio_gatwick
2683             && macio_chips[1].type == macio_heathrow) {
2684                 struct macio_chip temp = macio_chips[0];
2685                 macio_chips[0] = macio_chips[1];
2686                 macio_chips[1] = temp;
2687         }
2688         if (macio_chips[0].type == macio_ohareII
2689             && macio_chips[1].type == macio_ohare) {
2690                 struct macio_chip temp = macio_chips[0];
2691                 macio_chips[0] = macio_chips[1];
2692                 macio_chips[1] = temp;
2693         }
2694         macio_chips[0].lbus.index = 0;
2695         macio_chips[1].lbus.index = 1;
2696
2697         return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
2698 }
2699
2700 static void __init
2701 initial_serial_shutdown(struct device_node *np)
2702 {
2703         int len;
2704         struct slot_names_prop {
2705                 int     count;
2706                 char    name[1];
2707         } *slots;
2708         char *conn;
2709         int port_type = PMAC_SCC_ASYNC;
2710         int modem = 0;
2711
2712         slots = (struct slot_names_prop *)get_property(np, "slot-names", &len);
2713         conn = get_property(np, "AAPL,connector", &len);
2714         if (conn && (strcmp(conn, "infrared") == 0))
2715                 port_type = PMAC_SCC_IRDA;
2716         else if (device_is_compatible(np, "cobalt"))
2717                 modem = 1;
2718         else if (slots && slots->count > 0) {
2719                 if (strcmp(slots->name, "IrDA") == 0)
2720                         port_type = PMAC_SCC_IRDA;
2721                 else if (strcmp(slots->name, "Modem") == 0)
2722                         modem = 1;
2723         }
2724         if (modem)
2725                 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
2726         pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
2727 }
2728
2729 static void __init
2730 set_initial_features(void)
2731 {
2732         struct device_node *np;
2733
2734         /* That hack appears to be necessary for some StarMax motherboards
2735          * but I'm not too sure it was audited for side-effects on other
2736          * ohare based machines...
2737          * Since I still have difficulties figuring the right way to
2738          * differenciate them all and since that hack was there for a long
2739          * time, I'll keep it around
2740          */
2741         if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) {
2742                 struct macio_chip *macio = &macio_chips[0];
2743                 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
2744         } else if (macio_chips[0].type == macio_ohare) {
2745                 struct macio_chip *macio = &macio_chips[0];
2746                 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2747         } else if (macio_chips[1].type == macio_ohare) {
2748                 struct macio_chip *macio = &macio_chips[1];
2749                 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2750         }
2751
2752 #ifdef CONFIG_POWER4
2753         if (macio_chips[0].type == macio_keylargo2 ||
2754             macio_chips[0].type == macio_shasta) {
2755 #ifndef CONFIG_SMP
2756                 /* On SMP machines running UP, we have the second CPU eating
2757                  * bus cycles. We need to take it off the bus. This is done
2758                  * from pmac_smp for SMP kernels running on one CPU
2759                  */
2760                 np = of_find_node_by_type(NULL, "cpu");
2761                 if (np != NULL)
2762                         np = of_find_node_by_type(np, "cpu");
2763                 if (np != NULL) {
2764                         g5_phy_disable_cpu1();
2765                         of_node_put(np);
2766                 }
2767 #endif /* CONFIG_SMP */
2768                 /* Enable GMAC for now for PCI probing. It will be disabled
2769                  * later on after PCI probe
2770                  */
2771                 np = of_find_node_by_name(NULL, "ethernet");
2772                 while(np) {
2773                         if (device_is_compatible(np, "K2-GMAC"))
2774                                 g5_gmac_enable(np, 0, 1);
2775                         np = of_find_node_by_name(np, "ethernet");
2776                 }
2777
2778                 /* Enable FW before PCI probe. Will be disabled later on
2779                  * Note: We should have a batter way to check that we are
2780                  * dealing with uninorth internal cell and not a PCI cell
2781                  * on the external PCI. The code below works though.
2782                  */
2783                 np = of_find_node_by_name(NULL, "firewire");
2784                 while(np) {
2785                         if (device_is_compatible(np, "pci106b,5811")) {
2786                                 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2787                                 g5_fw_enable(np, 0, 1);
2788                         }
2789                         np = of_find_node_by_name(np, "firewire");
2790                 }
2791         }
2792 #else /* CONFIG_POWER4 */
2793
2794         if (macio_chips[0].type == macio_keylargo ||
2795             macio_chips[0].type == macio_pangea ||
2796             macio_chips[0].type == macio_intrepid) {
2797                 /* Enable GMAC for now for PCI probing. It will be disabled
2798                  * later on after PCI probe
2799                  */
2800                 np = of_find_node_by_name(NULL, "ethernet");
2801                 while(np) {
2802                         if (np->parent
2803                             && device_is_compatible(np->parent, "uni-north")
2804                             && device_is_compatible(np, "gmac"))
2805                                 core99_gmac_enable(np, 0, 1);
2806                         np = of_find_node_by_name(np, "ethernet");
2807                 }
2808
2809                 /* Enable FW before PCI probe. Will be disabled later on
2810                  * Note: We should have a batter way to check that we are
2811                  * dealing with uninorth internal cell and not a PCI cell
2812                  * on the external PCI. The code below works though.
2813                  */
2814                 np = of_find_node_by_name(NULL, "firewire");
2815                 while(np) {
2816                         if (np->parent
2817                             && device_is_compatible(np->parent, "uni-north")
2818                             && (device_is_compatible(np, "pci106b,18") ||
2819                                 device_is_compatible(np, "pci106b,30") ||
2820                                 device_is_compatible(np, "pci11c1,5811"))) {
2821                                 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2822                                 core99_firewire_enable(np, 0, 1);
2823                         }
2824                         np = of_find_node_by_name(np, "firewire");
2825                 }
2826
2827                 /* Enable ATA-100 before PCI probe. */
2828                 np = of_find_node_by_name(NULL, "ata-6");
2829                 while(np) {
2830                         if (np->parent
2831                             && device_is_compatible(np->parent, "uni-north")
2832                             && device_is_compatible(np, "kauai-ata")) {
2833                                 core99_ata100_enable(np, 1);
2834                         }
2835                         np = of_find_node_by_name(np, "ata-6");
2836                 }
2837
2838                 /* Switch airport off */
2839                 np = find_devices("radio");
2840                 while(np) {
2841                         if (np && np->parent == macio_chips[0].of_node) {
2842                                 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2843                                 core99_airport_enable(np, 0, 0);
2844                         }
2845                         np = np->next;
2846                 }
2847         }
2848
2849         /* On all machines that support sound PM, switch sound off */
2850         if (macio_chips[0].of_node)
2851                 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
2852                         macio_chips[0].of_node, 0, 0);
2853
2854         /* While on some desktop G3s, we turn it back on */
2855         if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
2856                 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
2857                     pmac_mb.model_id == PMAC_TYPE_SILK)) {
2858                 struct macio_chip *macio = &macio_chips[0];
2859                 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
2860                 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
2861         }
2862
2863 #endif /* CONFIG_POWER4 */
2864
2865         /* On all machines, switch modem & serial ports off */
2866         np = find_devices("ch-a");
2867         while(np) {
2868                 initial_serial_shutdown(np);
2869                 np = np->next;
2870         }
2871         np = find_devices("ch-b");
2872         while(np) {
2873                 initial_serial_shutdown(np);
2874                 np = np->next;
2875         }
2876 }
2877
2878 void __init
2879 pmac_feature_init(void)
2880 {
2881         /* Detect the UniNorth memory controller */
2882         probe_uninorth();
2883
2884         /* Probe mac-io controllers */
2885         if (probe_macios()) {
2886                 printk(KERN_WARNING "No mac-io chip found\n");
2887                 return;
2888         }
2889
2890         /* Probe machine type */
2891         if (probe_motherboard())
2892                 printk(KERN_WARNING "Unknown PowerMac !\n");
2893
2894         /* Set some initial features (turn off some chips that will
2895          * be later turned on)
2896          */
2897         set_initial_features();
2898 }
2899
2900 #if 0
2901 static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
2902 {
2903         int     freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
2904         int     bits[8] = { 8,16,0,32,2,4,0,0 };
2905         int     freq = (frq >> 8) & 0xf;
2906
2907         if (freqs[freq] == 0)
2908                 printk("%s: Unknown HT link frequency %x\n", name, freq);
2909         else
2910                 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
2911                        name, freqs[freq],
2912                        bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
2913 }
2914
2915 void __init pmac_check_ht_link(void)
2916 {
2917         u32     ufreq, freq, ucfg, cfg;
2918         struct device_node *pcix_node;
2919         u8      px_bus, px_devfn;
2920         struct pci_controller *px_hose;
2921
2922         (void)in_be32(u3_ht_base + U3_HT_LINK_COMMAND);
2923         ucfg = cfg = in_be32(u3_ht_base + U3_HT_LINK_CONFIG);
2924         ufreq = freq = in_be32(u3_ht_base + U3_HT_LINK_FREQ);
2925         dump_HT_speeds("U3 HyperTransport", cfg, freq);
2926
2927         pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
2928         if (pcix_node == NULL) {
2929                 printk("No PCI-X bridge found\n");
2930                 return;
2931         }
2932         if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) {
2933                 printk("PCI-X bridge found but not matched to pci\n");
2934                 return;
2935         }
2936         px_hose = pci_find_hose_for_OF_device(pcix_node);
2937         if (px_hose == NULL) {
2938                 printk("PCI-X bridge found but not matched to host\n");
2939                 return;
2940         }
2941         early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
2942         early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
2943         dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
2944         early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
2945         early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
2946         dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
2947 }
2948 #endif /* 0 */
2949
2950 /*
2951  * Early video resume hook
2952  */
2953
2954 static void (*pmac_early_vresume_proc)(void *data);
2955 static void *pmac_early_vresume_data;
2956
2957 void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2958 {
2959         if (_machine != _MACH_Pmac)
2960                 return;
2961         preempt_disable();
2962         pmac_early_vresume_proc = proc;
2963         pmac_early_vresume_data = data;
2964         preempt_enable();
2965 }
2966 EXPORT_SYMBOL(pmac_set_early_video_resume);
2967
2968 void pmac_call_early_video_resume(void)
2969 {
2970         if (pmac_early_vresume_proc)
2971                 pmac_early_vresume_proc(pmac_early_vresume_data);
2972 }
2973
2974 /*
2975  * AGP related suspend/resume code
2976  */
2977
2978 static struct pci_dev *pmac_agp_bridge;
2979 static int (*pmac_agp_suspend)(struct pci_dev *bridge);
2980 static int (*pmac_agp_resume)(struct pci_dev *bridge);
2981
2982 void pmac_register_agp_pm(struct pci_dev *bridge,
2983                                  int (*suspend)(struct pci_dev *bridge),
2984                                  int (*resume)(struct pci_dev *bridge))
2985 {
2986         if (suspend || resume) {
2987                 pmac_agp_bridge = bridge;
2988                 pmac_agp_suspend = suspend;
2989                 pmac_agp_resume = resume;
2990                 return;
2991         }
2992         if (bridge != pmac_agp_bridge)
2993                 return;
2994         pmac_agp_suspend = pmac_agp_resume = NULL;
2995         return;
2996 }
2997 EXPORT_SYMBOL(pmac_register_agp_pm);
2998
2999 void pmac_suspend_agp_for_card(struct pci_dev *dev)
3000 {
3001         if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
3002                 return;
3003         if (pmac_agp_bridge->bus != dev->bus)
3004                 return;
3005         pmac_agp_suspend(pmac_agp_bridge);
3006 }
3007 EXPORT_SYMBOL(pmac_suspend_agp_for_card);
3008
3009 void pmac_resume_agp_for_card(struct pci_dev *dev)
3010 {
3011         if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
3012                 return;
3013         if (pmac_agp_bridge->bus != dev->bus)
3014                 return;
3015         pmac_agp_resume(pmac_agp_bridge);
3016 }
3017 EXPORT_SYMBOL(pmac_resume_agp_for_card);