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1 /*
2  * TQM 8560 Device Tree Source
3  *
4  * Copyright 2008 Freescale Semiconductor Inc.
5  * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
6  *
7  * This program is free software; you can redistribute  it and/or modify it
8  * under  the terms of  the GNU General  Public License as published by the
9  * Free Software Foundation;  either version 2 of the  License, or (at your
10  * option) any later version.
11  */
12
13 /dts-v1/;
14
15 / {
16         model = "tqc,tqm8560";
17         compatible = "tqc,tqm8560";
18         #address-cells = <1>;
19         #size-cells = <1>;
20
21         aliases {
22                 ethernet0 = &enet0;
23                 ethernet1 = &enet1;
24                 ethernet2 = &enet2;
25                 serial0 = &serial0;
26                 serial1 = &serial1;
27                 pci0 = &pci0;
28         };
29
30         cpus {
31                 #address-cells = <1>;
32                 #size-cells = <0>;
33
34                 PowerPC,8560@0 {
35                         device_type = "cpu";
36                         reg = <0>;
37                         d-cache-line-size = <32>;
38                         i-cache-line-size = <32>;
39                         d-cache-size = <32768>;
40                         i-cache-size = <32768>;
41                         timebase-frequency = <0>;
42                         bus-frequency = <0>;
43                         clock-frequency = <0>;
44                         next-level-cache = <&L2>;
45                 };
46         };
47
48         memory {
49                 device_type = "memory";
50                 reg = <0x00000000 0x10000000>;
51         };
52
53         soc@e0000000 {
54                 #address-cells = <1>;
55                 #size-cells = <1>;
56                 device_type = "soc";
57                 ranges = <0x0 0xe0000000 0x100000>;
58                 reg = <0xe0000000 0x200>;
59                 bus-frequency = <0>;
60                 compatible = "fsl,mpc8560-immr", "simple-bus";
61
62                 memory-controller@2000 {
63                         compatible = "fsl,8540-memory-controller";
64                         reg = <0x2000 0x1000>;
65                         interrupt-parent = <&mpic>;
66                         interrupts = <18 2>;
67                 };
68
69                 L2: l2-cache-controller@20000 {
70                         compatible = "fsl,8540-l2-cache-controller";
71                         reg = <0x20000 0x1000>;
72                         cache-line-size = <32>;
73                         cache-size = <0x40000>; // L2, 256K
74                         interrupt-parent = <&mpic>;
75                         interrupts = <16 2>;
76                 };
77
78                 i2c@3000 {
79                         #address-cells = <1>;
80                         #size-cells = <0>;
81                         cell-index = <0>;
82                         compatible = "fsl-i2c";
83                         reg = <0x3000 0x100>;
84                         interrupts = <43 2>;
85                         interrupt-parent = <&mpic>;
86                         dfsrr;
87
88                         rtc@68 {
89                                 compatible = "dallas,ds1337";
90                                 reg = <0x68>;
91                         };
92                 };
93
94                 mdio@24520 {
95                         #address-cells = <1>;
96                         #size-cells = <0>;
97                         compatible = "fsl,gianfar-mdio";
98                         reg = <0x24520 0x20>;
99
100                         phy1: ethernet-phy@1 {
101                                 interrupt-parent = <&mpic>;
102                                 interrupts = <8 1>;
103                                 reg = <1>;
104                                 device_type = "ethernet-phy";
105                         };
106                         phy2: ethernet-phy@2 {
107                                 interrupt-parent = <&mpic>;
108                                 interrupts = <8 1>;
109                                 reg = <2>;
110                                 device_type = "ethernet-phy";
111                         };
112                         phy3: ethernet-phy@3 {
113                                 interrupt-parent = <&mpic>;
114                                 interrupts = <8 1>;
115                                 reg = <3>;
116                                 device_type = "ethernet-phy";
117                         };
118                 };
119
120                 enet0: ethernet@24000 {
121                         cell-index = <0>;
122                         device_type = "network";
123                         model = "TSEC";
124                         compatible = "gianfar";
125                         reg = <0x24000 0x1000>;
126                         local-mac-address = [ 00 00 00 00 00 00 ];
127                         interrupts = <29 2 30 2 34 2>;
128                         interrupt-parent = <&mpic>;
129                         phy-handle = <&phy2>;
130                 };
131
132                 enet1: ethernet@25000 {
133                         cell-index = <1>;
134                         device_type = "network";
135                         model = "TSEC";
136                         compatible = "gianfar";
137                         reg = <0x25000 0x1000>;
138                         local-mac-address = [ 00 00 00 00 00 00 ];
139                         interrupts = <35 2 36 2 40 2>;
140                         interrupt-parent = <&mpic>;
141                         phy-handle = <&phy1>;
142                 };
143
144                 mpic: pic@40000 {
145                         interrupt-controller;
146                         #address-cells = <0>;
147                         #interrupt-cells = <2>;
148                         reg = <0x40000 0x40000>;
149                         device_type = "open-pic";
150                         compatible = "chrp,open-pic";
151                 };
152
153                 cpm@919c0 {
154                         #address-cells = <1>;
155                         #size-cells = <1>;
156                         compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
157                         reg = <0x919c0 0x30>;
158                         ranges;
159
160                         muram@80000 {
161                                 #address-cells = <1>;
162                                 #size-cells = <1>;
163                                 ranges = <0 0x80000 0x10000>;
164
165                                 data@0 {
166                                         compatible = "fsl,cpm-muram-data";
167                                         reg = <0 0x4000 0x9000 0x2000>;
168                                 };
169                         };
170
171                         brg@919f0 {
172                                 compatible = "fsl,mpc8560-brg",
173                                              "fsl,cpm2-brg",
174                                              "fsl,cpm-brg";
175                                 reg = <0x919f0 0x10 0x915f0 0x10>;
176                                 clock-frequency = <0>;
177                         };
178
179                         cpmpic: pic@90c00 {
180                                 interrupt-controller;
181                                 #address-cells = <0>;
182                                 #interrupt-cells = <2>;
183                                 interrupts = <46 2>;
184                                 interrupt-parent = <&mpic>;
185                                 reg = <0x90c00 0x80>;
186                                 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
187                         };
188
189                         serial0: serial@91a00 {
190                                 device_type = "serial";
191                                 compatible = "fsl,mpc8560-scc-uart",
192                                              "fsl,cpm2-scc-uart";
193                                 reg = <0x91a00 0x20 0x88000 0x100>;
194                                 fsl,cpm-brg = <1>;
195                                 fsl,cpm-command = <0x800000>;
196                                 current-speed = <115200>;
197                                 interrupts = <40 8>;
198                                 interrupt-parent = <&cpmpic>;
199                         };
200
201                         serial1: serial@91a20 {
202                                 device_type = "serial";
203                                 compatible = "fsl,mpc8560-scc-uart",
204                                              "fsl,cpm2-scc-uart";
205                                 reg = <0x91a20 0x20 0x88100 0x100>;
206                                 fsl,cpm-brg = <2>;
207                                 fsl,cpm-command = <0x4a00000>;
208                                 current-speed = <115200>;
209                                 interrupts = <41 8>;
210                                 interrupt-parent = <&cpmpic>;
211                         };
212
213                         enet2: ethernet@91340 {
214                                 device_type = "network";
215                                 compatible = "fsl,mpc8560-fcc-enet",
216                                              "fsl,cpm2-fcc-enet";
217                                 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
218                                 local-mac-address = [ 00 00 00 00 00 00 ];
219                                 fsl,cpm-command = <0x1a400300>;
220                                 interrupts = <34 8>;
221                                 interrupt-parent = <&cpmpic>;
222                                 phy-handle = <&phy3>;
223                         };
224                 };
225         };
226
227         localbus@e0005000 {
228                 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
229                              "simple-bus";
230                 #address-cells = <2>;
231                 #size-cells = <1>;
232                 reg = <0xe0005000 0x100>;       // BRx, ORx, etc.
233
234                 ranges = <
235                         0 0x0 0xfc000000 0x04000000     // NOR FLASH bank 1
236                         1 0x0 0xf8000000 0x08000000     // NOR FLASH bank 0
237                         2 0x0 0xe3000000 0x00008000     // CAN (2 x i82527)
238                 >;
239
240                 flash@1,0 {
241                         #address-cells = <1>;
242                         #size-cells = <1>;
243                         compatible = "cfi-flash";
244                         reg = <1 0x0 0x8000000>;
245                         bank-width = <4>;
246                         device-width = <1>;
247
248                         partition@0 {
249                                 label = "kernel";
250                                 reg = <0x00000000 0x00200000>;
251                         };
252                         partition@200000 {
253                                 label = "root";
254                                 reg = <0x00200000 0x00300000>;
255                         };
256                         partition@500000 {
257                                 label = "user";
258                                 reg = <0x00500000 0x07a00000>;
259                         };
260                         partition@7f00000 {
261                                 label = "env1";
262                                 reg = <0x07f00000 0x00040000>;
263                         };
264                         partition@7f40000 {
265                                 label = "env2";
266                                 reg = <0x07f40000 0x00040000>;
267                         };
268                         partition@7f80000 {
269                                 label = "u-boot";
270                                 reg = <0x07f80000 0x00080000>;
271                                 read-only;
272                         };
273                 };
274
275                 /* Note: CAN support needs be enabled in U-Boot */
276                 can0@2,0 {
277                         compatible = "intel,82527"; // Bosch CC770
278                         reg = <2 0x0 0x100>;
279                         interrupts = <4 0>;
280                         interrupt-parent = <&mpic>;
281                 };
282
283                 can1@2,100 {
284                         compatible = "intel,82527"; // Bosch CC770
285                         reg = <2 0x100 0x100>;
286                         interrupts = <4 0>;
287                         interrupt-parent = <&mpic>;
288                 };
289         };
290
291         pci0: pci@e0008000 {
292                 cell-index = <0>;
293                 #interrupt-cells = <1>;
294                 #size-cells = <2>;
295                 #address-cells = <3>;
296                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
297                 device_type = "pci";
298                 reg = <0xe0008000 0x1000>;
299                 clock-frequency = <66666666>;
300                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
301                 interrupt-map = <
302                                 /* IDSEL 28 */
303                                  0xe000 0 0 1 &mpic 2 1
304                                  0xe000 0 0 2 &mpic 3 1>;
305
306                 interrupt-parent = <&mpic>;
307                 interrupts = <24 2>;
308                 bus-range = <0 0>;
309                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
310                           0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
311         };
312 };