arch/powerpc/boot/dts/tqm8555.dts

   1 /*
   2  * TQM 8555 Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "tqm,8555";
  16         compatible = "tqm,8555", "tqm,85xx";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26         };
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31
  32                 PowerPC,8555@0 {
  33                         device_type = "cpu";
  34                         reg = <0>;
  35                         d-cache-line-size = <32>;
  36                         i-cache-line-size = <32>;
  37                         d-cache-size = <32768>;
  38                         i-cache-size = <32768>;
  39                         timebase-frequency = <0>;
  40                         bus-frequency = <0>;
  41                         clock-frequency = <0>;
  42                 };
  43         };
  44
  45         memory {
  46                 device_type = "memory";
  47                 reg = <0x00000000 0x10000000>;
  48         };
  49
  50         soc@e0000000 {
  51                 #address-cells = <1>;
  52                 #size-cells = <1>;
  53                 device_type = "soc";
  54                 ranges = <0x0 0xe0000000 0x100000>;
  55                 reg = <0xe0000000 0x200>;
  56                 bus-frequency = <0>;
  57                 compatible = "fsl,mpc8555-immr", "simple-bus";
  58
  59                 memory-controller@2000 {
  60                         compatible = "fsl,8540-memory-controller";
  61                         reg = <0x2000 0x1000>;
  62                         interrupt-parent = <&mpic>;
  63                         interrupts = <18 2>;
  64                 };
  65
  66                 l2-cache-controller@20000 {
  67                         compatible = "fsl,8540-l2-cache-controller";
  68                         reg = <0x20000 0x1000>;
  69                         cache-line-size = <32>;
  70                         cache-size = <0x40000>; // L2, 256K
  71                         interrupt-parent = <&mpic>;
  72                         interrupts = <16 2>;
  73                 };
  74
  75                 i2c@3000 {
  76                         #address-cells = <1>;
  77                         #size-cells = <0>;
  78                         cell-index = <0>;
  79                         compatible = "fsl-i2c";
  80                         reg = <0x3000 0x100>;
  81                         interrupts = <43 2>;
  82                         interrupt-parent = <&mpic>;
  83                         dfsrr;
  84
  85                         rtc@68 {
  86                                 compatible = "dallas,ds1337";
  87                                 reg = <0x68>;
  88                         };
  89                 };
  90
  91                 mdio@24520 {
  92                         #address-cells = <1>;
  93                         #size-cells = <0>;
  94                         compatible = "fsl,gianfar-mdio";
  95                         reg = <0x24520 0x20>;
  96
  97                         phy1: ethernet-phy@1 {
  98                                 interrupt-parent = <&mpic>;
  99                                 interrupts = <8 1>;
 100                                 reg = <1>;
 101                                 device_type = "ethernet-phy";
 102                         };
 103                         phy2: ethernet-phy@2 {
 104                                 interrupt-parent = <&mpic>;
 105                                 interrupts = <8 1>;
 106                                 reg = <2>;
 107                                 device_type = "ethernet-phy";
 108                         };
 109                         phy3: ethernet-phy@3 {
 110                                 interrupt-parent = <&mpic>;
 111                                 interrupts = <8 1>;
 112                                 reg = <3>;
 113                                 device_type = "ethernet-phy";
 114                         };
 115                 };
 116
 117                 enet0: ethernet@24000 {
 118                         cell-index = <0>;
 119                         device_type = "network";
 120                         model = "TSEC";
 121                         compatible = "gianfar";
 122                         reg = <0x24000 0x1000>;
 123                         local-mac-address = [ 00 00 00 00 00 00 ];
 124                         interrupts = <29 2 30 2 34 2>;
 125                         interrupt-parent = <&mpic>;
 126                         phy-handle = <&phy2>;
 127                 };
 128
 129                 enet1: ethernet@25000 {
 130                         cell-index = <1>;
 131                         device_type = "network";
 132                         model = "TSEC";
 133                         compatible = "gianfar";
 134                         reg = <0x25000 0x1000>;
 135                         local-mac-address = [ 00 00 00 00 00 00 ];
 136                         interrupts = <35 2 36 2 40 2>;
 137                         interrupt-parent = <&mpic>;
 138                         phy-handle = <&phy1>;
 139                 };
 140
 141                 serial0: serial@4500 {
 142                         cell-index = <0>;
 143                         device_type = "serial";
 144                         compatible = "ns16550";
 145                         reg = <0x4500 0x100>;   // reg base, size
 146                         clock-frequency = <0>;  // should we fill in in uboot?
 147                         interrupts = <42 2>;
 148                         interrupt-parent = <&mpic>;
 149                 };
 150
 151                 serial1: serial@4600 {
 152                         cell-index = <1>;
 153                         device_type = "serial";
 154                         compatible = "ns16550";
 155                         reg = <0x4600 0x100>;   // reg base, size
 156                         clock-frequency = <0>;  // should we fill in in uboot?
 157                         interrupts = <42 2>;
 158                         interrupt-parent = <&mpic>;
 159                 };
 160
 161                 mpic: pic@40000 {
 162                         interrupt-controller;
 163                         #address-cells = <0>;
 164                         #interrupt-cells = <2>;
 165                         reg = <0x40000 0x40000>;
 166                         device_type = "open-pic";
 167                         compatible = "chrp,open-pic";
 168                 };
 169
 170                 cpm@919c0 {
 171                         #address-cells = <1>;
 172                         #size-cells = <1>;
 173                         compatible = "fsl,mpc8555-cpm", "fsl,cpm2", "simple-bus";
 174                         reg = <0x919c0 0x30>;
 175                         ranges;
 176
 177                         muram@80000 {
 178                                 #address-cells = <1>;
 179                                 #size-cells = <1>;
 180                                 ranges = <0 0x80000 0x10000>;
 181
 182                                 data@0 {
 183                                         compatible = "fsl,cpm-muram-data";
 184                                         reg = <0 0x2000 0x9000 0x1000>;
 185                                 };
 186                         };
 187
 188                         brg@919f0 {
 189                                 compatible = "fsl,mpc8555-brg",
 190                                              "fsl,cpm2-brg",
 191                                              "fsl,cpm-brg";
 192                                 reg = <0x919f0 0x10 0x915f0 0x10>;
 193                                 clock-frequency = <0>;
 194                         };
 195
 196                         cpmpic: pic@90c00 {
 197                                 interrupt-controller;
 198                                 #address-cells = <0>;
 199                                 #interrupt-cells = <2>;
 200                                 interrupts = <46 2>;
 201                                 interrupt-parent = <&mpic>;
 202                                 reg = <0x90c00 0x80>;
 203                                 compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic";
 204                         };
 205                 };
 206         };
 207
 208         pci0: pci@e0008000 {
 209                 cell-index = <0>;
 210                 #interrupt-cells = <1>;
 211                 #size-cells = <2>;
 212                 #address-cells = <3>;
 213                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 214                 device_type = "pci";
 215                 reg = <0xe0008000 0x1000>;
 216                 clock-frequency = <66666666>;
 217                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 218                 interrupt-map = <
 219                                 /* IDSEL 28 */
 220                                  0xe000 0 0 1 &mpic 2 1
 221                                  0xe000 0 0 2 &mpic 3 1>;
 222
 223                 interrupt-parent = <&mpic>;
 224                 interrupts = <24 2>;
 225                 bus-range = <0 0>;
 226                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
 227                           0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
 228         };
 229 };