arch/powerpc/boot/dts/prpmc2800.dts

   1 /* Device Tree Source for Motorola PrPMC2800
   2  *
   3  * Author: Mark A. Greer <mgreer@mvista.com>
   4  *
   5  * 2007 (c) MontaVista, Software, Inc.  This file is licensed under
   6  * the terms of the GNU General Public License version 2.  This program
   7  * is licensed "as is" without any warranty of any kind, whether express
   8  * or implied.
   9  *
  10  * Property values that are labeled as "Default" will be updated by bootwrapper
  11  * if it can determine the exact PrPMC type.
  12  *
  13  * To build:
  14  *   dtc -I dts -O asm -o prpmc2800.S -b 0 prpmc2800.dts
  15  *   dtc -I dts -O dtb -o prpmc2800.dtb -b 0 prpmc2800.dts
  16  */
  17
  18 / {
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         model = "PrPMC280/PrPMC2800"; /* Default */
  22         compatible = "motorola,PrPMC2800";
  23         coherency-off;
  24
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 PowerPC,7447 {
  30                         device_type = "cpu";
  31                         reg = <0>;
  32                         clock-frequency = <2bb0b140>;   /* Default (733 MHz) */
  33                         bus-frequency = <7f28155>;      /* 133.333333 MHz */
  34                         timebase-frequency = <1fca055>; /* 33.333333 MHz */
  35                         i-cache-line-size = <20>;
  36                         d-cache-line-size = <20>;
  37                         i-cache-size = <8000>;
  38                         d-cache-size = <8000>;
  39                 };
  40         };
  41
  42         memory {
  43                 device_type = "memory";
  44                 reg = <00000000 20000000>;      /* Default (512MB) */
  45         };
  46
  47         mv64x60@f1000000 { /* Marvell Discovery */
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 #interrupt-cells = <1>;
  51                 model = "mv64360";                      /* Default */
  52                 compatible = "marvell,mv64x60";
  53                 clock-frequency = <7f28155>;            /* 133.333333 MHz */
  54                 reg = <f1000000 00010000>;
  55                 virtual-reg = <f1000000>;
  56                 ranges = <88000000 88000000 01000000    /* PCI 0 I/O Space */
  57                           80000000 80000000 08000000    /* PCI 0 MEM Space */
  58                           a0000000 a0000000 04000000    /* User FLASH */
  59                           00000000 f1000000 00010000    /* Bridge's regs */
  60                           f2000000 f2000000 00040000>;  /* Integrated SRAM */
  61
  62                 flash@a0000000 {
  63                         device_type = "rom";
  64                         compatible = "direct-mapped";
  65                         reg = <a0000000 4000000>; /* Default (64MB) */
  66                         probe-type = "CFI";
  67                         bank-width = <4>;
  68                         partitions = <00000000 00100000 /* RO */
  69                                       00100000 00040001 /* RW */
  70                                       00140000 00400000 /* RO */
  71                                       00540000 039c0000 /* RO */
  72                                       03f00000 00100000>; /* RO */
  73                         partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
  74                 };
  75
  76                 mdio {
  77                         #address-cells = <1>;
  78                         #size-cells = <0>;
  79                         device_type = "mdio";
  80                         compatible = "marvell,mv64x60-mdio";
  81                         ethernet-phy@1 {
  82                                 device_type = "ethernet-phy";
  83                                 compatible = "broadcom,bcm5421";
  84                                 interrupts = <4c>;      /* GPP 12 */
  85                                 interrupt-parent = <&/mv64x60/pic>;
  86                                 reg = <1>;
  87                         };
  88                         ethernet-phy@3 {
  89                                 device_type = "ethernet-phy";
  90                                 compatible = "broadcom,bcm5421";
  91                                 interrupts = <4c>;      /* GPP 12 */
  92                                 interrupt-parent = <&/mv64x60/pic>;
  93                                 reg = <3>;
  94                         };
  95                 };
  96
  97                 ethernet@2000 {
  98                         reg = <2000 2000>;
  99                         eth0 {
 100                                 device_type = "network";
 101                                 compatible = "marvell,mv64x60-eth";
 102                                 block-index = <0>;
 103                                 interrupts = <20>;
 104                                 interrupt-parent = <&/mv64x60/pic>;
 105                                 phy = <&/mv64x60/mdio/ethernet-phy@1>;
 106                                 local-mac-address = [ 00 00 00 00 00 00 ];
 107                         };
 108                         eth1 {
 109                                 device_type = "network";
 110                                 compatible = "marvell,mv64x60-eth";
 111                                 block-index = <1>;
 112                                 interrupts = <21>;
 113                                 interrupt-parent = <&/mv64x60/pic>;
 114                                 phy = <&/mv64x60/mdio/ethernet-phy@3>;
 115                                 local-mac-address = [ 00 00 00 00 00 00 ];
 116                         };
 117                 };
 118
 119                 sdma@4000 {
 120                         device_type = "dma";
 121                         compatible = "marvell,mv64x60-sdma";
 122                         reg = <4000 c18>;
 123                         virtual-reg = <f1004000>;
 124                         interrupt-base = <0>;
 125                         interrupts = <24>;
 126                         interrupt-parent = <&/mv64x60/pic>;
 127                 };
 128
 129                 sdma@6000 {
 130                         device_type = "dma";
 131                         compatible = "marvell,mv64x60-sdma";
 132                         reg = <6000 c18>;
 133                         virtual-reg = <f1006000>;
 134                         interrupt-base = <0>;
 135                         interrupts = <26>;
 136                         interrupt-parent = <&/mv64x60/pic>;
 137                 };
 138
 139                 brg@b200 {
 140                         compatible = "marvell,mv64x60-brg";
 141                         reg = <b200 8>;
 142                         clock-src = <8>;
 143                         clock-frequency = <7ed6b40>;
 144                         current-speed = <2580>;
 145                         bcr = <0>;
 146                 };
 147
 148                 brg@b208 {
 149                         compatible = "marvell,mv64x60-brg";
 150                         reg = <b208 8>;
 151                         clock-src = <8>;
 152                         clock-frequency = <7ed6b40>;
 153                         current-speed = <2580>;
 154                         bcr = <0>;
 155                 };
 156
 157                 cunit@f200 {
 158                         reg = <f200 200>;
 159                 };
 160
 161                 mpscrouting@b400 {
 162                         reg = <b400 c>;
 163                 };
 164
 165                 mpscintr@b800 {
 166                         reg = <b800 100>;
 167                         virtual-reg = <f100b800>;
 168                 };
 169
 170                 mpsc@8000 {
 171                         device_type = "serial";
 172                         compatible = "marvell,mpsc";
 173                         reg = <8000 38>;
 174                         virtual-reg = <f1008000>;
 175                         sdma = <&/mv64x60/sdma@4000>;
 176                         brg = <&/mv64x60/brg@b200>;
 177                         cunit = <&/mv64x60/cunit@f200>;
 178                         mpscrouting = <&/mv64x60/mpscrouting@b400>;
 179                         mpscintr = <&/mv64x60/mpscintr@b800>;
 180                         block-index = <0>;
 181                         max_idle = <28>;
 182                         chr_1 = <0>;
 183                         chr_2 = <0>;
 184                         chr_10 = <3>;
 185                         mpcr = <0>;
 186                         interrupts = <28>;
 187                         interrupt-parent = <&/mv64x60/pic>;
 188                 };
 189
 190                 mpsc@9000 {
 191                         device_type = "serial";
 192                         compatible = "marvell,mpsc";
 193                         reg = <9000 38>;
 194                         virtual-reg = <f1009000>;
 195                         sdma = <&/mv64x60/sdma@6000>;
 196                         brg = <&/mv64x60/brg@b208>;
 197                         cunit = <&/mv64x60/cunit@f200>;
 198                         mpscrouting = <&/mv64x60/mpscrouting@b400>;
 199                         mpscintr = <&/mv64x60/mpscintr@b800>;
 200                         block-index = <1>;
 201                         max_idle = <28>;
 202                         chr_1 = <0>;
 203                         chr_2 = <0>;
 204                         chr_10 = <3>;
 205                         mpcr = <0>;
 206                         interrupts = <2a>;
 207                         interrupt-parent = <&/mv64x60/pic>;
 208                 };
 209
 210                 wdt@b410 {                      /* watchdog timer */
 211                         compatible = "marvell,mv64x60-wdt";
 212                         reg = <b410 8>;
 213                         timeout = <a>;          /* wdt timeout in seconds */
 214                 };
 215
 216                 i2c@c000 {
 217                         device_type = "i2c";
 218                         compatible = "marvell,mv64x60-i2c";
 219                         reg = <c000 20>;
 220                         virtual-reg = <f100c000>;
 221                         freq_m = <8>;
 222                         freq_n = <3>;
 223                         timeout = <3e8>;                /* 1000 = 1 second */
 224                         retries = <1>;
 225                         interrupts = <25>;
 226                         interrupt-parent = <&/mv64x60/pic>;
 227                 };
 228
 229                 pic {
 230                         #interrupt-cells = <1>;
 231                         #address-cells = <0>;
 232                         compatible = "marvell,mv64x60-pic";
 233                         reg = <0000 88>;
 234                         interrupt-controller;
 235                 };
 236
 237                 mpp@f000 {
 238                         compatible = "marvell,mv64x60-mpp";
 239                         reg = <f000 10>;
 240                 };
 241
 242                 gpp@f100 {
 243                         compatible = "marvell,mv64x60-gpp";
 244                         reg = <f100 20>;
 245                 };
 246
 247                 pci@80000000 {
 248                         #address-cells = <3>;
 249                         #size-cells = <2>;
 250                         #interrupt-cells = <1>;
 251                         device_type = "pci";
 252                         compatible = "marvell,mv64x60-pci";
 253                         reg = <0cf8 8>;
 254                         ranges = <01000000 0        0 88000000 0 01000000
 255                                   02000000 0 80000000 80000000 0 08000000>;
 256                         bus-range = <0 ff>;
 257                         clock-frequency = <3EF1480>;
 258                         interrupt-pci-iack = <0c34>;
 259                         interrupt-parent = <&/mv64x60/pic>;
 260                         interrupt-map-mask = <f800 0 0 7>;
 261                         interrupt-map = <
 262                                 /* IDSEL 0x0a */
 263                                 5000 0 0 1 &/mv64x60/pic 50
 264                                 5000 0 0 2 &/mv64x60/pic 51
 265                                 5000 0 0 3 &/mv64x60/pic 5b
 266                                 5000 0 0 4 &/mv64x60/pic 5d
 267
 268                                 /* IDSEL 0x0b */
 269                                 5800 0 0 1 &/mv64x60/pic 5b
 270                                 5800 0 0 2 &/mv64x60/pic 5d
 271                                 5800 0 0 3 &/mv64x60/pic 50
 272                                 5800 0 0 4 &/mv64x60/pic 51
 273
 274                                 /* IDSEL 0x0c */
 275                                 6000 0 0 1 &/mv64x60/pic 5b
 276                                 6000 0 0 2 &/mv64x60/pic 5d
 277                                 6000 0 0 3 &/mv64x60/pic 50
 278                                 6000 0 0 4 &/mv64x60/pic 51
 279
 280                                 /* IDSEL 0x0d */
 281                                 6800 0 0 1 &/mv64x60/pic 5d
 282                                 6800 0 0 2 &/mv64x60/pic 50
 283                                 6800 0 0 3 &/mv64x60/pic 51
 284                                 6800 0 0 4 &/mv64x60/pic 5b
 285                         >;
 286                 };
 287
 288                 cpu-error@0070 {
 289                         compatible = "marvell,mv64x60-cpu-error";
 290                         reg = <0070 10 0128 28>;
 291                         interrupts = <03>;
 292                         interrupt-parent = <&/mv64x60/pic>;
 293                 };
 294
 295                 sram-ctrl@0380 {
 296                         compatible = "marvell,mv64x60-sram-ctrl";
 297                         reg = <0380 80>;
 298                         interrupts = <0d>;
 299                         interrupt-parent = <&/mv64x60/pic>;
 300                 };
 301
 302                 pci-error@1d40 {
 303                         compatible = "marvell,mv64x60-pci-error";
 304                         reg = <1d40 40 0c28 4>;
 305                         interrupts = <0c>;
 306                         interrupt-parent = <&/mv64x60/pic>;
 307                 };
 308
 309                 mem-ctrl@1400 {
 310                         compatible = "marvell,mv64x60-mem-ctrl";
 311                         reg = <1400 60>;
 312                         interrupts = <11>;
 313                         interrupt-parent = <&/mv64x60/pic>;
 314                 };
 315         };
 316
 317         chosen {
 318                 bootargs = "ip=on";
 319                 linux,stdout-path = "/mv64x60@f1000000/mpsc@8000";
 320         };
 321 };