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[POWERPC] FSL: I2C device tree cleanups
[linux-2.6-omap-h63xx.git] / arch / powerpc / boot / dts / mpc8641_hpcn.dts
1 /*
2  * MPC8641 HPCN Device Tree Source
3  *
4  * Copyright 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12
13 / {
14         model = "MPC8641HPCN";
15         compatible = "mpc86xx";
16         #address-cells = <1>;
17         #size-cells = <1>;
18
19         aliases {
20                 ethernet0 = &enet0;
21                 ethernet1 = &enet1;
22                 ethernet2 = &enet2;
23                 ethernet3 = &enet3;
24                 serial0 = &serial0;
25                 serial1 = &serial1;
26                 pci0 = &pci0;
27                 pci1 = &pci1;
28         };
29
30         cpus {
31                 #address-cells = <1>;
32                 #size-cells = <0>;
33
34                 PowerPC,8641@0 {
35                         device_type = "cpu";
36                         reg = <0>;
37                         d-cache-line-size = <20>;       // 32 bytes
38                         i-cache-line-size = <20>;       // 32 bytes
39                         d-cache-size = <8000>;          // L1, 32K
40                         i-cache-size = <8000>;          // L1, 32K
41                         timebase-frequency = <0>;       // 33 MHz, from uboot
42                         bus-frequency = <0>;            // From uboot
43                         clock-frequency = <0>;          // From uboot
44                 };
45                 PowerPC,8641@1 {
46                         device_type = "cpu";
47                         reg = <1>;
48                         d-cache-line-size = <20>;       // 32 bytes
49                         i-cache-line-size = <20>;       // 32 bytes
50                         d-cache-size = <8000>;          // L1, 32K
51                         i-cache-size = <8000>;          // L1, 32K
52                         timebase-frequency = <0>;       // 33 MHz, from uboot
53                         bus-frequency = <0>;            // From uboot
54                         clock-frequency = <0>;          // From uboot
55                 };
56         };
57
58         memory {
59                 device_type = "memory";
60                 reg = <00000000 40000000>;      // 1G at 0x0
61         };
62
63         soc8641@f8000000 {
64                 #address-cells = <1>;
65                 #size-cells = <1>;
66                 device_type = "soc";
67                 ranges = <00000000 f8000000 00100000>;
68                 reg = <f8000000 00001000>;      // CCSRBAR
69                 bus-frequency = <0>;
70
71                 i2c@3000 {
72                         #address-cells = <1>;
73                         #size-cells = <0>;
74                         cell-index = <0>;
75                         compatible = "fsl-i2c";
76                         reg = <3000 100>;
77                         interrupts = <2b 2>;
78                         interrupt-parent = <&mpic>;
79                         dfsrr;
80                 };
81
82                 i2c@3100 {
83                         #address-cells = <1>;
84                         #size-cells = <0>;
85                         cell-index = <1>;
86                         compatible = "fsl-i2c";
87                         reg = <3100 100>;
88                         interrupts = <2b 2>;
89                         interrupt-parent = <&mpic>;
90                         dfsrr;
91                 };
92
93                 mdio@24520 {
94                         #address-cells = <1>;
95                         #size-cells = <0>;
96                         device_type = "mdio";
97                         compatible = "gianfar";
98                         reg = <24520 20>;
99                         phy0: ethernet-phy@0 {
100                                 interrupt-parent = <&mpic>;
101                                 interrupts = <a 1>;
102                                 reg = <0>;
103                                 device_type = "ethernet-phy";
104                         };
105                         phy1: ethernet-phy@1 {
106                                 interrupt-parent = <&mpic>;
107                                 interrupts = <a 1>;
108                                 reg = <1>;
109                                 device_type = "ethernet-phy";
110                         };
111                         phy2: ethernet-phy@2 {
112                                 interrupt-parent = <&mpic>;
113                                 interrupts = <a 1>;
114                                 reg = <2>;
115                                 device_type = "ethernet-phy";
116                         };
117                         phy3: ethernet-phy@3 {
118                                 interrupt-parent = <&mpic>;
119                                 interrupts = <a 1>;
120                                 reg = <3>;
121                                 device_type = "ethernet-phy";
122                         };
123                 };
124
125                 enet0: ethernet@24000 {
126                         #address-cells = <1>;
127                         #size-cells = <0>;
128                         device_type = "network";
129                         model = "TSEC";
130                         compatible = "gianfar";
131                         reg = <24000 1000>;
132                         /*
133                          * mac-address is deprecated and will be removed
134                          * in 2.6.25.  Only recent versions of
135                          * U-Boot support local-mac-address, however.
136                          */
137                         mac-address = [ 00 00 00 00 00 00 ];
138                         local-mac-address = [ 00 00 00 00 00 00 ];
139                         interrupts = <1d 2 1e 2 22 2>;
140                         interrupt-parent = <&mpic>;
141                         phy-handle = <&phy0>;
142                         phy-connection-type = "rgmii-id";
143                 };
144
145                 enet1: ethernet@25000 {
146                         #address-cells = <1>;
147                         #size-cells = <0>;
148                         device_type = "network";
149                         model = "TSEC";
150                         compatible = "gianfar";
151                         reg = <25000 1000>;
152                         /*
153                          * mac-address is deprecated and will be removed
154                          * in 2.6.25.  Only recent versions of
155                          * U-Boot support local-mac-address, however.
156                          */
157                         mac-address = [ 00 00 00 00 00 00 ];
158                         local-mac-address = [ 00 00 00 00 00 00 ];
159                         interrupts = <23 2 24 2 28 2>;
160                         interrupt-parent = <&mpic>;
161                         phy-handle = <&phy1>;
162                         phy-connection-type = "rgmii-id";
163                 };
164                 
165                 enet2: ethernet@26000 {
166                         #address-cells = <1>;
167                         #size-cells = <0>;
168                         device_type = "network";
169                         model = "TSEC";
170                         compatible = "gianfar";
171                         reg = <26000 1000>;
172                         /*
173                          * mac-address is deprecated and will be removed
174                          * in 2.6.25.  Only recent versions of
175                          * U-Boot support local-mac-address, however.
176                          */
177                         mac-address = [ 00 00 00 00 00 00 ];
178                         local-mac-address = [ 00 00 00 00 00 00 ];
179                         interrupts = <1F 2 20 2 21 2>;
180                         interrupt-parent = <&mpic>;
181                         phy-handle = <&phy2>;
182                         phy-connection-type = "rgmii-id";
183                 };
184
185                 enet3: ethernet@27000 {
186                         #address-cells = <1>;
187                         #size-cells = <0>;
188                         device_type = "network";
189                         model = "TSEC";
190                         compatible = "gianfar";
191                         reg = <27000 1000>;
192                         /*
193                          * mac-address is deprecated and will be removed
194                          * in 2.6.25.  Only recent versions of
195                          * U-Boot support local-mac-address, however.
196                          */
197                         mac-address = [ 00 00 00 00 00 00 ];
198                         local-mac-address = [ 00 00 00 00 00 00 ];
199                         interrupts = <25 2 26 2 27 2>;
200                         interrupt-parent = <&mpic>;
201                         phy-handle = <&phy3>;
202                         phy-connection-type = "rgmii-id";
203                 };
204
205                 serial0: serial@4500 {
206                         device_type = "serial";
207                         compatible = "ns16550";
208                         reg = <4500 100>;
209                         clock-frequency = <0>;
210                         interrupts = <2a 2>;
211                         interrupt-parent = <&mpic>;
212                 };
213
214                 serial1: serial@4600 {
215                         device_type = "serial";
216                         compatible = "ns16550";
217                         reg = <4600 100>;
218                         clock-frequency = <0>;
219                         interrupts = <1c 2>;
220                         interrupt-parent = <&mpic>;
221                 };
222
223                 mpic: pic@40000 {
224                         clock-frequency = <0>;
225                         interrupt-controller;
226                         #address-cells = <0>;
227                         #interrupt-cells = <2>;
228                         reg = <40000 40000>;
229                         compatible = "chrp,open-pic";
230                         device_type = "open-pic";
231                         big-endian;
232                 };
233
234                 global-utilities@e0000 {
235                         compatible = "fsl,mpc8641-guts";
236                         reg = <e0000 1000>;
237                         fsl,has-rstcr;
238                 };
239         };
240
241         pci0: pcie@f8008000 {
242                 compatible = "fsl,mpc8641-pcie";
243                 device_type = "pci";
244                 #interrupt-cells = <1>;
245                 #size-cells = <2>;
246                 #address-cells = <3>;
247                 reg = <f8008000 1000>;
248                 bus-range = <0 ff>;
249                 ranges = <02000000 0 80000000 80000000 0 20000000
250                           01000000 0 00000000 e2000000 0 00100000>;
251                 clock-frequency = <1fca055>;
252                 interrupt-parent = <&mpic>;
253                 interrupts = <18 2>;
254                 interrupt-map-mask = <ff00 0 0 7>;
255                 interrupt-map = <
256                         /* IDSEL 0x11 func 0 - PCI slot 1 */
257                         8800 0 0 1 &mpic 2 1
258                         8800 0 0 2 &mpic 3 1
259                         8800 0 0 3 &mpic 4 1
260                         8800 0 0 4 &mpic 1 1
261
262                         /* IDSEL 0x11 func 1 - PCI slot 1 */
263                         8900 0 0 1 &mpic 2 1
264                         8900 0 0 2 &mpic 3 1
265                         8900 0 0 3 &mpic 4 1
266                         8900 0 0 4 &mpic 1 1
267
268                         /* IDSEL 0x11 func 2 - PCI slot 1 */
269                         8a00 0 0 1 &mpic 2 1
270                         8a00 0 0 2 &mpic 3 1
271                         8a00 0 0 3 &mpic 4 1
272                         8a00 0 0 4 &mpic 1 1
273
274                         /* IDSEL 0x11 func 3 - PCI slot 1 */
275                         8b00 0 0 1 &mpic 2 1
276                         8b00 0 0 2 &mpic 3 1
277                         8b00 0 0 3 &mpic 4 1
278                         8b00 0 0 4 &mpic 1 1
279
280                         /* IDSEL 0x11 func 4 - PCI slot 1 */
281                         8c00 0 0 1 &mpic 2 1
282                         8c00 0 0 2 &mpic 3 1
283                         8c00 0 0 3 &mpic 4 1
284                         8c00 0 0 4 &mpic 1 1
285
286                         /* IDSEL 0x11 func 5 - PCI slot 1 */
287                         8d00 0 0 1 &mpic 2 1
288                         8d00 0 0 2 &mpic 3 1
289                         8d00 0 0 3 &mpic 4 1
290                         8d00 0 0 4 &mpic 1 1
291
292                         /* IDSEL 0x11 func 6 - PCI slot 1 */
293                         8e00 0 0 1 &mpic 2 1
294                         8e00 0 0 2 &mpic 3 1
295                         8e00 0 0 3 &mpic 4 1
296                         8e00 0 0 4 &mpic 1 1
297
298                         /* IDSEL 0x11 func 7 - PCI slot 1 */
299                         8f00 0 0 1 &mpic 2 1
300                         8f00 0 0 2 &mpic 3 1
301                         8f00 0 0 3 &mpic 4 1
302                         8f00 0 0 4 &mpic 1 1
303
304                         /* IDSEL 0x12 func 0 - PCI slot 2 */
305                         9000 0 0 1 &mpic 3 1
306                         9000 0 0 2 &mpic 4 1
307                         9000 0 0 3 &mpic 1 1
308                         9000 0 0 4 &mpic 2 1
309
310                         /* IDSEL 0x12 func 1 - PCI slot 2 */
311                         9100 0 0 1 &mpic 3 1
312                         9100 0 0 2 &mpic 4 1
313                         9100 0 0 3 &mpic 1 1
314                         9100 0 0 4 &mpic 2 1
315
316                         /* IDSEL 0x12 func 2 - PCI slot 2 */
317                         9200 0 0 1 &mpic 3 1
318                         9200 0 0 2 &mpic 4 1
319                         9200 0 0 3 &mpic 1 1
320                         9200 0 0 4 &mpic 2 1
321
322                         /* IDSEL 0x12 func 3 - PCI slot 2 */
323                         9300 0 0 1 &mpic 3 1
324                         9300 0 0 2 &mpic 4 1
325                         9300 0 0 3 &mpic 1 1
326                         9300 0 0 4 &mpic 2 1
327
328                         /* IDSEL 0x12 func 4 - PCI slot 2 */
329                         9400 0 0 1 &mpic 3 1
330                         9400 0 0 2 &mpic 4 1
331                         9400 0 0 3 &mpic 1 1
332                         9400 0 0 4 &mpic 2 1
333
334                         /* IDSEL 0x12 func 5 - PCI slot 2 */
335                         9500 0 0 1 &mpic 3 1
336                         9500 0 0 2 &mpic 4 1
337                         9500 0 0 3 &mpic 1 1
338                         9500 0 0 4 &mpic 2 1
339
340                         /* IDSEL 0x12 func 6 - PCI slot 2 */
341                         9600 0 0 1 &mpic 3 1
342                         9600 0 0 2 &mpic 4 1
343                         9600 0 0 3 &mpic 1 1
344                         9600 0 0 4 &mpic 2 1
345
346                         /* IDSEL 0x12 func 7 - PCI slot 2 */
347                         9700 0 0 1 &mpic 3 1
348                         9700 0 0 2 &mpic 4 1
349                         9700 0 0 3 &mpic 1 1
350                         9700 0 0 4 &mpic 2 1
351
352                         // IDSEL 0x1c  USB
353                         e000 0 0 1 &i8259 c 2
354                         e100 0 0 1 &i8259 9 2
355                         e200 0 0 1 &i8259 a 2
356                         e300 0 0 1 &i8259 b 2
357
358                         // IDSEL 0x1d  Audio
359                         e800 0 0 1 &i8259 6 2
360
361                         // IDSEL 0x1e Legacy
362                         f000 0 0 1 &i8259 7 2
363                         f100 0 0 1 &i8259 7 2
364
365                         // IDSEL 0x1f IDE/SATA
366                         f800 0 0 1 &i8259 e 2
367                         f900 0 0 1 &i8259 5 2
368                         >;
369
370                 pcie@0 {
371                         reg = <0 0 0 0 0>;
372                         #size-cells = <2>;
373                         #address-cells = <3>;
374                         device_type = "pci";
375                         ranges = <02000000 0 80000000
376                                   02000000 0 80000000
377                                   0 20000000
378
379                                   01000000 0 00000000
380                                   01000000 0 00000000
381                                   0 00100000>;
382                         uli1575@0 {
383                                 reg = <0 0 0 0 0>;
384                                 #size-cells = <2>;
385                                 #address-cells = <3>;
386                                 ranges = <02000000 0 80000000
387                                           02000000 0 80000000
388                                           0 20000000
389                                           01000000 0 00000000
390                                           01000000 0 00000000
391                                           0 00100000>;
392                                 isa@1e {
393                                         device_type = "isa";
394                                         #interrupt-cells = <2>;
395                                         #size-cells = <1>;
396                                         #address-cells = <2>;
397                                         reg = <f000 0 0 0 0>;
398                                         ranges = <1 0 01000000 0 0
399                                                   00001000>;
400                                         interrupt-parent = <&i8259>;
401
402                                         i8259: interrupt-controller@20 {
403                                                 reg = <1 20 2
404                                                        1 a0 2
405                                                        1 4d0 2>;
406                                                 interrupt-controller;
407                                                 device_type = "interrupt-controller";
408                                                 #address-cells = <0>;
409                                                 #interrupt-cells = <2>;
410                                                 compatible = "chrp,iic";
411                                                 interrupts = <9 2>;
412                                                 interrupt-parent = <&mpic>;
413                                         };
414
415                                         i8042@60 {
416                                                 #size-cells = <0>;
417                                                 #address-cells = <1>;
418                                                 reg = <1 60 1 1 64 1>;
419                                                 interrupts = <1 3 c 3>;
420                                                 interrupt-parent =
421                                                         <&i8259>;
422
423                                                 keyboard@0 {
424                                                         reg = <0>;
425                                                         compatible = "pnpPNP,303";
426                                                 };
427
428                                                 mouse@1 {
429                                                         reg = <1>;
430                                                         compatible = "pnpPNP,f03";
431                                                 };
432                                         };
433
434                                         rtc@70 {
435                                                 compatible =
436                                                         "pnpPNP,b00";
437                                                 reg = <1 70 2>;
438                                         };
439
440                                         gpio@400 {
441                                                 reg = <1 400 80>;
442                                         };
443                                 };
444                         };
445                 };
446
447         };
448
449         pci1: pcie@f8009000 {
450                 compatible = "fsl,mpc8641-pcie";
451                 device_type = "pci";
452                 #interrupt-cells = <1>;
453                 #size-cells = <2>;
454                 #address-cells = <3>;
455                 reg = <f8009000 1000>;
456                 bus-range = <0 ff>;
457                 ranges = <02000000 0 a0000000 a0000000 0 20000000
458                           01000000 0 00000000 e3000000 0 00100000>;
459                 clock-frequency = <1fca055>;
460                 interrupt-parent = <&mpic>;
461                 interrupts = <19 2>;
462                 interrupt-map-mask = <f800 0 0 7>;
463                 interrupt-map = <
464                         /* IDSEL 0x0 */
465                         0000 0 0 1 &mpic 4 1
466                         0000 0 0 2 &mpic 5 1
467                         0000 0 0 3 &mpic 6 1
468                         0000 0 0 4 &mpic 7 1
469                         >;
470                 pcie@0 {
471                         reg = <0 0 0 0 0>;
472                         #size-cells = <2>;
473                         #address-cells = <3>;
474                         device_type = "pci";
475                         ranges = <02000000 0 a0000000
476                                   02000000 0 a0000000
477                                   0 20000000
478
479                                   01000000 0 00000000
480                                   01000000 0 00000000
481                                   0 00100000>;
482                 };
483         };
484 };