arch/powerpc/boot/dts/mpc8641_hpcn.dts

   1 /*
   2  * MPC8641 HPCN Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8641HPCN";
  16         compatible = "fsl,mpc8641hpcn";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 ethernet3 = &enet3;
  25                 serial0 = &serial0;
  26                 serial1 = &serial1;
  27                 pci0 = &pci0;
  28                 pci1 = &pci1;
  29 /*
  30  * Only one of Rapid IO or PCI can be present due to HW limitations and
  31  * due to the fact that the 2 now share address space in the new memory
  32  * map.  The most likely case is that we have PCI, so comment out the
  33  * rapidio node.  Leave it here for reference.
  34  */
  35                 /* rapidio0 = &rapidio0; */
  36         };
  37
  38         cpus {
  39                 #address-cells = <1>;
  40                 #size-cells = <0>;
  41
  42                 PowerPC,8641@0 {
  43                         device_type = "cpu";
  44                         reg = <0>;
  45                         d-cache-line-size = <32>;
  46                         i-cache-line-size = <32>;
  47                         d-cache-size = <32768>;         // L1
  48                         i-cache-size = <32768>;         // L1
  49                         timebase-frequency = <0>;       // From uboot
  50                         bus-frequency = <0>;            // From uboot
  51                         clock-frequency = <0>;          // From uboot
  52                 };
  53                 PowerPC,8641@1 {
  54                         device_type = "cpu";
  55                         reg = <1>;
  56                         d-cache-line-size = <32>;
  57                         i-cache-line-size = <32>;
  58                         d-cache-size = <32768>;
  59                         i-cache-size = <32768>;
  60                         timebase-frequency = <0>;       // From uboot
  61                         bus-frequency = <0>;            // From uboot
  62                         clock-frequency = <0>;          // From uboot
  63                 };
  64         };
  65
  66         memory {
  67                 device_type = "memory";
  68                 reg = <0x00000000 0x40000000>;  // 1G at 0x0
  69         };
  70
  71         localbus@ffe05000 {
  72                 #address-cells = <2>;
  73                 #size-cells = <1>;
  74                 compatible = "fsl,mpc8641-localbus", "simple-bus";
  75                 reg = <0xffe05000 0x1000>;
  76                 interrupts = <19 2>;
  77                 interrupt-parent = <&mpic>;
  78
  79                 ranges = <0 0 0xef800000 0x00800000
  80                           2 0 0xffdf8000 0x00008000
  81                           3 0 0xffdf0000 0x00008000>;
  82
  83                 flash@0,0 {
  84                         compatible = "cfi-flash";
  85                         reg = <0 0 0x00800000>;
  86                         bank-width = <2>;
  87                         device-width = <2>;
  88                         #address-cells = <1>;
  89                         #size-cells = <1>;
  90                         partition@0 {
  91                                 label = "kernel";
  92                                 reg = <0x00000000 0x00300000>;
  93                         };
  94                         partition@300000 {
  95                                 label = "firmware b";
  96                                 reg = <0x00300000 0x00100000>;
  97                                 read-only;
  98                         };
  99                         partition@400000 {
 100                                 label = "fs";
 101                                 reg = <0x00400000 0x00300000>;
 102                         };
 103                         partition@700000 {
 104                                 label = "firmware a";
 105                                 reg = <0x00700000 0x00100000>;
 106                                 read-only;
 107                         };
 108                 };
 109         };
 110
 111         soc8641@ffe00000 {
 112                 #address-cells = <1>;
 113                 #size-cells = <1>;
 114                 device_type = "soc";
 115                 compatible = "simple-bus";
 116                 ranges = <0x00000000 0xffe00000 0x00100000>;
 117                 reg = <0xffe00000 0x00001000>;  // CCSRBAR
 118                 bus-frequency = <0>;
 119
 120                 i2c@3000 {
 121                         #address-cells = <1>;
 122                         #size-cells = <0>;
 123                         cell-index = <0>;
 124                         compatible = "fsl-i2c";
 125                         reg = <0x3000 0x100>;
 126                         interrupts = <43 2>;
 127                         interrupt-parent = <&mpic>;
 128                         dfsrr;
 129                 };
 130
 131                 i2c@3100 {
 132                         #address-cells = <1>;
 133                         #size-cells = <0>;
 134                         cell-index = <1>;
 135                         compatible = "fsl-i2c";
 136                         reg = <0x3100 0x100>;
 137                         interrupts = <43 2>;
 138                         interrupt-parent = <&mpic>;
 139                         dfsrr;
 140                 };
 141
 142                 dma@21300 {
 143                         #address-cells = <1>;
 144                         #size-cells = <1>;
 145                         compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
 146                         reg = <0x21300 0x4>;
 147                         ranges = <0x0 0x21100 0x200>;
 148                         cell-index = <0>;
 149                         dma-channel@0 {
 150                                 compatible = "fsl,mpc8641-dma-channel",
 151                                                 "fsl,eloplus-dma-channel";
 152                                 reg = <0x0 0x80>;
 153                                 cell-index = <0>;
 154                                 interrupt-parent = <&mpic>;
 155                                 interrupts = <20 2>;
 156                         };
 157                         dma-channel@80 {
 158                                 compatible = "fsl,mpc8641-dma-channel",
 159                                                 "fsl,eloplus-dma-channel";
 160                                 reg = <0x80 0x80>;
 161                                 cell-index = <1>;
 162                                 interrupt-parent = <&mpic>;
 163                                 interrupts = <21 2>;
 164                         };
 165                         dma-channel@100 {
 166                                 compatible = "fsl,mpc8641-dma-channel",
 167                                                 "fsl,eloplus-dma-channel";
 168                                 reg = <0x100 0x80>;
 169                                 cell-index = <2>;
 170                                 interrupt-parent = <&mpic>;
 171                                 interrupts = <22 2>;
 172                         };
 173                         dma-channel@180 {
 174                                 compatible = "fsl,mpc8641-dma-channel",
 175                                                 "fsl,eloplus-dma-channel";
 176                                 reg = <0x180 0x80>;
 177                                 cell-index = <3>;
 178                                 interrupt-parent = <&mpic>;
 179                                 interrupts = <23 2>;
 180                         };
 181                 };
 182
 183                 mdio@24520 {
 184                         #address-cells = <1>;
 185                         #size-cells = <0>;
 186                         compatible = "fsl,gianfar-mdio";
 187                         reg = <0x24520 0x20>;
 188
 189                         phy0: ethernet-phy@0 {
 190                                 interrupt-parent = <&mpic>;
 191                                 interrupts = <10 1>;
 192                                 reg = <0>;
 193                                 device_type = "ethernet-phy";
 194                         };
 195                         phy1: ethernet-phy@1 {
 196                                 interrupt-parent = <&mpic>;
 197                                 interrupts = <10 1>;
 198                                 reg = <1>;
 199                                 device_type = "ethernet-phy";
 200                         };
 201                         phy2: ethernet-phy@2 {
 202                                 interrupt-parent = <&mpic>;
 203                                 interrupts = <10 1>;
 204                                 reg = <2>;
 205                                 device_type = "ethernet-phy";
 206                         };
 207                         phy3: ethernet-phy@3 {
 208                                 interrupt-parent = <&mpic>;
 209                                 interrupts = <10 1>;
 210                                 reg = <3>;
 211                                 device_type = "ethernet-phy";
 212                         };
 213                 };
 214
 215                 enet0: ethernet@24000 {
 216                         cell-index = <0>;
 217                         device_type = "network";
 218                         model = "TSEC";
 219                         compatible = "gianfar";
 220                         reg = <0x24000 0x1000>;
 221                         local-mac-address = [ 00 00 00 00 00 00 ];
 222                         interrupts = <29 2 30  2 34 2>;
 223                         interrupt-parent = <&mpic>;
 224                         phy-handle = <&phy0>;
 225                         phy-connection-type = "rgmii-id";
 226                 };
 227
 228                 enet1: ethernet@25000 {
 229                         cell-index = <1>;
 230                         device_type = "network";
 231                         model = "TSEC";
 232                         compatible = "gianfar";
 233                         reg = <0x25000 0x1000>;
 234                         local-mac-address = [ 00 00 00 00 00 00 ];
 235                         interrupts = <35 2 36 2 40 2>;
 236                         interrupt-parent = <&mpic>;
 237                         phy-handle = <&phy1>;
 238                         phy-connection-type = "rgmii-id";
 239                 };
 240
 241                 enet2: ethernet@26000 {
 242                         cell-index = <2>;
 243                         device_type = "network";
 244                         model = "TSEC";
 245                         compatible = "gianfar";
 246                         reg = <0x26000 0x1000>;
 247                         local-mac-address = [ 00 00 00 00 00 00 ];
 248                         interrupts = <31 2 32 2 33 2>;
 249                         interrupt-parent = <&mpic>;
 250                         phy-handle = <&phy2>;
 251                         phy-connection-type = "rgmii-id";
 252                 };
 253
 254                 enet3: ethernet@27000 {
 255                         cell-index = <3>;
 256                         device_type = "network";
 257                         model = "TSEC";
 258                         compatible = "gianfar";
 259                         reg = <0x27000 0x1000>;
 260                         local-mac-address = [ 00 00 00 00 00 00 ];
 261                         interrupts = <37 2 38 2 39 2>;
 262                         interrupt-parent = <&mpic>;
 263                         phy-handle = <&phy3>;
 264                         phy-connection-type = "rgmii-id";
 265                 };
 266
 267                 serial0: serial@4500 {
 268                         cell-index = <0>;
 269                         device_type = "serial";
 270                         compatible = "ns16550";
 271                         reg = <0x4500 0x100>;
 272                         clock-frequency = <0>;
 273                         interrupts = <42 2>;
 274                         interrupt-parent = <&mpic>;
 275                 };
 276
 277                 serial1: serial@4600 {
 278                         cell-index = <1>;
 279                         device_type = "serial";
 280                         compatible = "ns16550";
 281                         reg = <0x4600 0x100>;
 282                         clock-frequency = <0>;
 283                         interrupts = <28 2>;
 284                         interrupt-parent = <&mpic>;
 285                 };
 286
 287                 mpic: pic@40000 {
 288                         interrupt-controller;
 289                         #address-cells = <0>;
 290                         #interrupt-cells = <2>;
 291                         reg = <0x40000 0x40000>;
 292                         compatible = "chrp,open-pic";
 293                         device_type = "open-pic";
 294                 };
 295
 296                 global-utilities@e0000 {
 297                         compatible = "fsl,mpc8641-guts";
 298                         reg = <0xe0000 0x1000>;
 299                         fsl,has-rstcr;
 300                 };
 301         };
 302
 303         pci0: pcie@ffe08000 {
 304                 cell-index = <0>;
 305                 compatible = "fsl,mpc8641-pcie";
 306                 device_type = "pci";
 307                 #interrupt-cells = <1>;
 308                 #size-cells = <2>;
 309                 #address-cells = <3>;
 310                 reg = <0xffe08000 0x1000>;
 311                 bus-range = <0x0 0xff>;
 312                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 313                           0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>;
 314                 clock-frequency = <33333333>;
 315                 interrupt-parent = <&mpic>;
 316                 interrupts = <24 2>;
 317                 interrupt-map-mask = <0xff00 0 0 7>;
 318                 interrupt-map = <
 319                         /* IDSEL 0x11 func 0 - PCI slot 1 */
 320                         0x8800 0 0 1 &mpic 2 1
 321                         0x8800 0 0 2 &mpic 3 1
 322                         0x8800 0 0 3 &mpic 4 1
 323                         0x8800 0 0 4 &mpic 1 1
 324
 325                         /* IDSEL 0x11 func 1 - PCI slot 1 */
 326                         0x8900 0 0 1 &mpic 2 1
 327                         0x8900 0 0 2 &mpic 3 1
 328                         0x8900 0 0 3 &mpic 4 1
 329                         0x8900 0 0 4 &mpic 1 1
 330
 331                         /* IDSEL 0x11 func 2 - PCI slot 1 */
 332                         0x8a00 0 0 1 &mpic 2 1
 333                         0x8a00 0 0 2 &mpic 3 1
 334                         0x8a00 0 0 3 &mpic 4 1
 335                         0x8a00 0 0 4 &mpic 1 1
 336
 337                         /* IDSEL 0x11 func 3 - PCI slot 1 */
 338                         0x8b00 0 0 1 &mpic 2 1
 339                         0x8b00 0 0 2 &mpic 3 1
 340                         0x8b00 0 0 3 &mpic 4 1
 341                         0x8b00 0 0 4 &mpic 1 1
 342
 343                         /* IDSEL 0x11 func 4 - PCI slot 1 */
 344                         0x8c00 0 0 1 &mpic 2 1
 345                         0x8c00 0 0 2 &mpic 3 1
 346                         0x8c00 0 0 3 &mpic 4 1
 347                         0x8c00 0 0 4 &mpic 1 1
 348
 349                         /* IDSEL 0x11 func 5 - PCI slot 1 */
 350                         0x8d00 0 0 1 &mpic 2 1
 351                         0x8d00 0 0 2 &mpic 3 1
 352                         0x8d00 0 0 3 &mpic 4 1
 353                         0x8d00 0 0 4 &mpic 1 1
 354
 355                         /* IDSEL 0x11 func 6 - PCI slot 1 */
 356                         0x8e00 0 0 1 &mpic 2 1
 357                         0x8e00 0 0 2 &mpic 3 1
 358                         0x8e00 0 0 3 &mpic 4 1
 359                         0x8e00 0 0 4 &mpic 1 1
 360
 361                         /* IDSEL 0x11 func 7 - PCI slot 1 */
 362                         0x8f00 0 0 1 &mpic 2 1
 363                         0x8f00 0 0 2 &mpic 3 1
 364                         0x8f00 0 0 3 &mpic 4 1
 365                         0x8f00 0 0 4 &mpic 1 1
 366
 367                         /* IDSEL 0x12 func 0 - PCI slot 2 */
 368                         0x9000 0 0 1 &mpic 3 1
 369                         0x9000 0 0 2 &mpic 4 1
 370                         0x9000 0 0 3 &mpic 1 1
 371                         0x9000 0 0 4 &mpic 2 1
 372
 373                         /* IDSEL 0x12 func 1 - PCI slot 2 */
 374                         0x9100 0 0 1 &mpic 3 1
 375                         0x9100 0 0 2 &mpic 4 1
 376                         0x9100 0 0 3 &mpic 1 1
 377                         0x9100 0 0 4 &mpic 2 1
 378
 379                         /* IDSEL 0x12 func 2 - PCI slot 2 */
 380                         0x9200 0 0 1 &mpic 3 1
 381                         0x9200 0 0 2 &mpic 4 1
 382                         0x9200 0 0 3 &mpic 1 1
 383                         0x9200 0 0 4 &mpic 2 1
 384
 385                         /* IDSEL 0x12 func 3 - PCI slot 2 */
 386                         0x9300 0 0 1 &mpic 3 1
 387                         0x9300 0 0 2 &mpic 4 1
 388                         0x9300 0 0 3 &mpic 1 1
 389                         0x9300 0 0 4 &mpic 2 1
 390
 391                         /* IDSEL 0x12 func 4 - PCI slot 2 */
 392                         0x9400 0 0 1 &mpic 3 1
 393                         0x9400 0 0 2 &mpic 4 1
 394                         0x9400 0 0 3 &mpic 1 1
 395                         0x9400 0 0 4 &mpic 2 1
 396
 397                         /* IDSEL 0x12 func 5 - PCI slot 2 */
 398                         0x9500 0 0 1 &mpic 3 1
 399                         0x9500 0 0 2 &mpic 4 1
 400                         0x9500 0 0 3 &mpic 1 1
 401                         0x9500 0 0 4 &mpic 2 1
 402
 403                         /* IDSEL 0x12 func 6 - PCI slot 2 */
 404                         0x9600 0 0 1 &mpic 3 1
 405                         0x9600 0 0 2 &mpic 4 1
 406                         0x9600 0 0 3 &mpic 1 1
 407                         0x9600 0 0 4 &mpic 2 1
 408
 409                         /* IDSEL 0x12 func 7 - PCI slot 2 */
 410                         0x9700 0 0 1 &mpic 3 1
 411                         0x9700 0 0 2 &mpic 4 1
 412                         0x9700 0 0 3 &mpic 1 1
 413                         0x9700 0 0 4 &mpic 2 1
 414
 415                         // IDSEL 0x1c  USB
 416                         0xe000 0 0 1 &i8259 12 2
 417                         0xe100 0 0 2 &i8259 9 2
 418                         0xe200 0 0 3 &i8259 10 2
 419                         0xe300 0 0 4 &i8259 11 2
 420
 421                         // IDSEL 0x1d  Audio
 422                         0xe800 0 0 1 &i8259 6 2
 423
 424                         // IDSEL 0x1e Legacy
 425                         0xf000 0 0 1 &i8259 7 2
 426                         0xf100 0 0 1 &i8259 7 2
 427
 428                         // IDSEL 0x1f IDE/SATA
 429                         0xf800 0 0 1 &i8259 14 2
 430                         0xf900 0 0 1 &i8259 5 2
 431                         >;
 432
 433                 pcie@0 {
 434                         reg = <0 0 0 0 0>;
 435                         #size-cells = <2>;
 436                         #address-cells = <3>;
 437                         device_type = "pci";
 438                         ranges = <0x02000000 0x0 0x80000000
 439                                   0x02000000 0x0 0x80000000
 440                                   0x0 0x20000000
 441
 442                                   0x01000000 0x0 0x00000000
 443                                   0x01000000 0x0 0x00000000
 444                                   0x0 0x00010000>;
 445                         uli1575@0 {
 446                                 reg = <0 0 0 0 0>;
 447                                 #size-cells = <2>;
 448                                 #address-cells = <3>;
 449                                 ranges = <0x02000000 0x0 0x80000000
 450                                           0x02000000 0x0 0x80000000
 451                                           0x0 0x20000000
 452                                           0x01000000 0x0 0x00000000
 453                                           0x01000000 0x0 0x00000000
 454                                           0x0 0x00010000>;
 455                                 isa@1e {
 456                                         device_type = "isa";
 457                                         #interrupt-cells = <2>;
 458                                         #size-cells = <1>;
 459                                         #address-cells = <2>;
 460                                         reg = <0xf000 0 0 0 0>;
 461                                         ranges = <1 0 0x01000000 0 0
 462                                                   0x00001000>;
 463                                         interrupt-parent = <&i8259>;
 464
 465                                         i8259: interrupt-controller@20 {
 466                                                 reg = <1 0x20 2
 467                                                        1 0xa0 2
 468                                                        1 0x4d0 2>;
 469                                                 interrupt-controller;
 470                                                 device_type = "interrupt-controller";
 471                                                 #address-cells = <0>;
 472                                                 #interrupt-cells = <2>;
 473                                                 compatible = "chrp,iic";
 474                                                 interrupts = <9 2>;
 475                                                 interrupt-parent = <&mpic>;
 476                                         };
 477
 478                                         i8042@60 {
 479                                                 #size-cells = <0>;
 480                                                 #address-cells = <1>;
 481                                                 reg = <1 0x60 1 1 0x64 1>;
 482                                                 interrupts = <1 3 12 3>;
 483                                                 interrupt-parent =
 484                                                         <&i8259>;
 485
 486                                                 keyboard@0 {
 487                                                         reg = <0>;
 488                                                         compatible = "pnpPNP,303";
 489                                                 };
 490
 491                                                 mouse@1 {
 492                                                         reg = <1>;
 493                                                         compatible = "pnpPNP,f03";
 494                                                 };
 495                                         };
 496
 497                                         rtc@70 {
 498                                                 compatible =
 499                                                         "pnpPNP,b00";
 500                                                 reg = <1 0x70 2>;
 501                                         };
 502
 503                                         gpio@400 {
 504                                                 reg = <1 0x400 0x80>;
 505                                         };
 506                                 };
 507                         };
 508                 };
 509
 510         };
 511
 512         pci1: pcie@ffe09000 {
 513                 cell-index = <1>;
 514                 compatible = "fsl,mpc8641-pcie";
 515                 device_type = "pci";
 516                 #interrupt-cells = <1>;
 517                 #size-cells = <2>;
 518                 #address-cells = <3>;
 519                 reg = <0xffe09000 0x1000>;
 520                 bus-range = <0 0xff>;
 521                 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
 522                           0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
 523                 clock-frequency = <33333333>;
 524                 interrupt-parent = <&mpic>;
 525                 interrupts = <25 2>;
 526                 interrupt-map-mask = <0xf800 0 0 7>;
 527                 interrupt-map = <
 528                         /* IDSEL 0x0 */
 529                         0x0000 0 0 1 &mpic 4 1
 530                         0x0000 0 0 2 &mpic 5 1
 531                         0x0000 0 0 3 &mpic 6 1
 532                         0x0000 0 0 4 &mpic 7 1
 533                         >;
 534                 pcie@0 {
 535                         reg = <0 0 0 0 0>;
 536                         #size-cells = <2>;
 537                         #address-cells = <3>;
 538                         device_type = "pci";
 539                         ranges = <0x02000000 0x0 0xa0000000
 540                                   0x02000000 0x0 0xa0000000
 541                                   0x0 0x20000000
 542
 543                                   0x01000000 0x0 0x00000000
 544                                   0x01000000 0x0 0x00000000
 545                                   0x0 0x00010000>;
 546                 };
 547         };
 548 /*
 549         rapidio0: rapidio@ffec0000 {
 550                 #address-cells = <2>;
 551                 #size-cells = <2>;
 552                 compatible = "fsl,rapidio-delta";
 553                 reg = <0xffec0000 0x20000>;
 554                 ranges = <0 0 0x80000000 0 0x20000000>;
 555                 interrupt-parent = <&mpic>;
 556                 // err_irq bell_outb_irq bell_inb_irq
 557                 //      msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
 558                 interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
 559         };
 560 */
 561
 562 };