2 * MPC8540 ADS Device Tree Source
4 * Copyright 2006, 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
16 compatible = "MPC8540ADS", "MPC85xxADS";
36 d-cache-line-size = <32>; // 32 bytes
37 i-cache-line-size = <32>; // 32 bytes
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
40 timebase-frequency = <0>; // 33 MHz, from uboot
41 bus-frequency = <0>; // 166 MHz
42 clock-frequency = <0>; // 825 MHz, from uboot
43 next-level-cache = <&L2>;
48 device_type = "memory";
49 reg = <0x0 0x8000000>; // 128M at 0x0
56 ranges = <0x0 0xe0000000 0x100000>;
57 reg = <0xe0000000 0x100000>; // CCSRBAR 1M
60 memory-controller@2000 {
61 compatible = "fsl,8540-memory-controller";
62 reg = <0x2000 0x1000>;
63 interrupt-parent = <&mpic>;
67 L2: l2-cache-controller@20000 {
68 compatible = "fsl,8540-l2-cache-controller";
69 reg = <0x20000 0x1000>;
70 cache-line-size = <32>; // 32 bytes
71 cache-size = <0x40000>; // L2, 256K
72 interrupt-parent = <&mpic>;
80 compatible = "fsl-i2c";
83 interrupt-parent = <&mpic>;
90 compatible = "fsl,gianfar-mdio";
93 phy0: ethernet-phy@0 {
94 interrupt-parent = <&mpic>;
97 device_type = "ethernet-phy";
99 phy1: ethernet-phy@1 {
100 interrupt-parent = <&mpic>;
103 device_type = "ethernet-phy";
105 phy3: ethernet-phy@3 {
106 interrupt-parent = <&mpic>;
109 device_type = "ethernet-phy";
113 enet0: ethernet@24000 {
115 device_type = "network";
117 compatible = "gianfar";
118 reg = <0x24000 0x1000>;
119 local-mac-address = [ 00 00 00 00 00 00 ];
120 interrupts = <29 2 30 2 34 2>;
121 interrupt-parent = <&mpic>;
122 phy-handle = <&phy0>;
125 enet1: ethernet@25000 {
127 device_type = "network";
129 compatible = "gianfar";
130 reg = <0x25000 0x1000>;
131 local-mac-address = [ 00 00 00 00 00 00 ];
132 interrupts = <35 2 36 2 40 2>;
133 interrupt-parent = <&mpic>;
134 phy-handle = <&phy1>;
137 enet2: ethernet@26000 {
139 device_type = "network";
141 compatible = "gianfar";
142 reg = <0x26000 0x1000>;
143 local-mac-address = [ 00 00 00 00 00 00 ];
145 interrupt-parent = <&mpic>;
146 phy-handle = <&phy3>;
149 serial0: serial@4500 {
151 device_type = "serial";
152 compatible = "ns16550";
153 reg = <0x4500 0x100>; // reg base, size
154 clock-frequency = <0>; // should we fill in in uboot?
156 interrupt-parent = <&mpic>;
159 serial1: serial@4600 {
161 device_type = "serial";
162 compatible = "ns16550";
163 reg = <0x4600 0x100>; // reg base, size
164 clock-frequency = <0>; // should we fill in in uboot?
166 interrupt-parent = <&mpic>;
169 interrupt-controller;
170 #address-cells = <0>;
171 #interrupt-cells = <2>;
172 reg = <0x40000 0x40000>;
173 compatible = "chrp,open-pic";
174 device_type = "open-pic";
180 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
184 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
185 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
186 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
187 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
190 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
191 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
192 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
193 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
196 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
197 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
198 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
199 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
202 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
203 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
204 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
205 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
208 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
209 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
210 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
211 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
214 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
215 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
216 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
217 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
220 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
221 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
222 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
223 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
226 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
227 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
228 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
229 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
232 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
233 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
234 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
235 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
238 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
239 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
240 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
241 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
244 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
245 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
246 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
247 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
250 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
251 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
252 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
253 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
254 interrupt-parent = <&mpic>;
257 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
258 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>;
259 clock-frequency = <66666666>;
260 #interrupt-cells = <1>;
262 #address-cells = <3>;
263 reg = <0xe0008000 0x1000>;
264 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";