arch/powerpc/boot/dts/mpc8379_mds.dts

   1 /*
   2  * MPC8379E MDS Device Tree Source
   3  *
   4  * Copyright 2007 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "fsl,mpc8379emds";
  16         compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26         };
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31
  32                 PowerPC,8379@0 {
  33                         device_type = "cpu";
  34                         reg = <0x0>;
  35                         d-cache-line-size = <32>;
  36                         i-cache-line-size = <32>;
  37                         d-cache-size = <32768>;
  38                         i-cache-size = <32768>;
  39                         timebase-frequency = <0>;
  40                         bus-frequency = <0>;
  41                         clock-frequency = <0>;
  42                 };
  43         };
  44
  45         memory {
  46                 device_type = "memory";
  47                 reg = <0x00000000 0x20000000>;  // 512MB at 0
  48         };
  49
  50         localbus@e0005000 {
  51                 #address-cells = <2>;
  52                 #size-cells = <1>;
  53                 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
  54                 reg = <0xe0005000 0x1000>;
  55                 interrupts = <77 0x8>;
  56                 interrupt-parent = <&ipic>;
  57
  58                 // booting from NOR flash
  59                 ranges = <0 0x0 0xfe000000 0x02000000
  60                           1 0x0 0xf8000000 0x00008000
  61                           3 0x0 0xe0600000 0x00008000>;
  62
  63                 flash@0,0 {
  64                         #address-cells = <1>;
  65                         #size-cells = <1>;
  66                         compatible = "cfi-flash";
  67                         reg = <0 0x0 0x2000000>;
  68                         bank-width = <2>;
  69                         device-width = <1>;
  70
  71                         u-boot@0 {
  72                                 reg = <0x0 0x100000>;
  73                                 read-only;
  74                         };
  75
  76                         fs@100000 {
  77                                 reg = <0x100000 0x800000>;
  78                         };
  79
  80                         kernel@1d00000 {
  81                                 reg = <0x1d00000 0x200000>;
  82                         };
  83
  84                         dtb@1f00000 {
  85                                 reg = <0x1f00000 0x100000>;
  86                         };
  87                 };
  88
  89                 bcsr@1,0 {
  90                         reg = <1 0x0 0x8000>;
  91                         compatible = "fsl,mpc837xmds-bcsr";
  92                 };
  93
  94                 nand@3,0 {
  95                         #address-cells = <1>;
  96                         #size-cells = <1>;
  97                         compatible = "fsl,mpc8379-fcm-nand",
  98                                      "fsl,elbc-fcm-nand";
  99                         reg = <3 0x0 0x8000>;
 100
 101                         u-boot@0 {
 102                                 reg = <0x0 0x100000>;
 103                                 read-only;
 104                         };
 105
 106                         kernel@100000 {
 107                                 reg = <0x100000 0x300000>;
 108                         };
 109
 110                         fs@400000 {
 111                                 reg = <0x400000 0x1c00000>;
 112                         };
 113                 };
 114         };
 115
 116         soc@e0000000 {
 117                 #address-cells = <1>;
 118                 #size-cells = <1>;
 119                 device_type = "soc";
 120                 compatible = "simple-bus";
 121                 ranges = <0x0 0xe0000000 0x00100000>;
 122                 reg = <0xe0000000 0x00000200>;
 123                 bus-frequency = <0>;
 124
 125                 wdt@200 {
 126                         compatible = "mpc83xx_wdt";
 127                         reg = <0x200 0x100>;
 128                 };
 129
 130                 sleep-nexus {
 131                         #address-cells = <1>;
 132                         #size-cells = <1>;
 133                         compatible = "simple-bus";
 134                         sleep = <&pmc 0x0c000000>;
 135                         ranges;
 136
 137                         i2c@3000 {
 138                                 #address-cells = <1>;
 139                                 #size-cells = <0>;
 140                                 cell-index = <0>;
 141                                 compatible = "fsl-i2c";
 142                                 reg = <0x3000 0x100>;
 143                                 interrupts = <14 0x8>;
 144                                 interrupt-parent = <&ipic>;
 145                                 dfsrr;
 146
 147                                 rtc@68 {
 148                                         compatible = "dallas,ds1374";
 149                                         reg = <0x68>;
 150                                         interrupts = <19 0x8>;
 151                                         interrupt-parent = <&ipic>;
 152                                 };
 153                         };
 154
 155                         sdhci@2e000 {
 156                                 compatible = "fsl,mpc8379-esdhc";
 157                                 reg = <0x2e000 0x1000>;
 158                                 interrupts = <42 0x8>;
 159                                 interrupt-parent = <&ipic>;
 160                                 /* Filled in by U-Boot */
 161                                 clock-frequency = <0>;
 162                         };
 163                 };
 164
 165                 i2c@3100 {
 166                         #address-cells = <1>;
 167                         #size-cells = <0>;
 168                         cell-index = <1>;
 169                         compatible = "fsl-i2c";
 170                         reg = <0x3100 0x100>;
 171                         interrupts = <15 0x8>;
 172                         interrupt-parent = <&ipic>;
 173                         dfsrr;
 174                 };
 175
 176                 spi@7000 {
 177                         cell-index = <0>;
 178                         compatible = "fsl,spi";
 179                         reg = <0x7000 0x1000>;
 180                         interrupts = <16 0x8>;
 181                         interrupt-parent = <&ipic>;
 182                         mode = "cpu";
 183                 };
 184
 185                 dma@82a8 {
 186                         #address-cells = <1>;
 187                         #size-cells = <1>;
 188                         compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
 189                         reg = <0x82a8 4>;
 190                         ranges = <0 0x8100 0x1a8>;
 191                         interrupt-parent = <&ipic>;
 192                         interrupts = <71 8>;
 193                         cell-index = <0>;
 194                         dma-channel@0 {
 195                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
 196                                 reg = <0 0x80>;
 197                                 cell-index = <0>;
 198                                 interrupt-parent = <&ipic>;
 199                                 interrupts = <71 8>;
 200                         };
 201                         dma-channel@80 {
 202                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
 203                                 reg = <0x80 0x80>;
 204                                 cell-index = <1>;
 205                                 interrupt-parent = <&ipic>;
 206                                 interrupts = <71 8>;
 207                         };
 208                         dma-channel@100 {
 209                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
 210                                 reg = <0x100 0x80>;
 211                                 cell-index = <2>;
 212                                 interrupt-parent = <&ipic>;
 213                                 interrupts = <71 8>;
 214                         };
 215                         dma-channel@180 {
 216                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
 217                                 reg = <0x180 0x28>;
 218                                 cell-index = <3>;
 219                                 interrupt-parent = <&ipic>;
 220                                 interrupts = <71 8>;
 221                         };
 222                 };
 223
 224                 usb@23000 {
 225                         compatible = "fsl-usb2-dr";
 226                         reg = <0x23000 0x1000>;
 227                         #address-cells = <1>;
 228                         #size-cells = <0>;
 229                         interrupt-parent = <&ipic>;
 230                         interrupts = <38 0x8>;
 231                         dr_mode = "host";
 232                         phy_type = "ulpi";
 233                         sleep = <&pmc 0x00c00000>;
 234                 };
 235
 236                 mdio@24520 {
 237                         #address-cells = <1>;
 238                         #size-cells = <0>;
 239                         compatible = "fsl,gianfar-mdio";
 240                         reg = <0x24520 0x20>;
 241                         phy2: ethernet-phy@2 {
 242                                 interrupt-parent = <&ipic>;
 243                                 interrupts = <17 0x8>;
 244                                 reg = <0x2>;
 245                                 device_type = "ethernet-phy";
 246                         };
 247                         phy3: ethernet-phy@3 {
 248                                 interrupt-parent = <&ipic>;
 249                                 interrupts = <18 0x8>;
 250                                 reg = <0x3>;
 251                                 device_type = "ethernet-phy";
 252                         };
 253                         tbi0: tbi-phy@11 {
 254                                 reg = <0x11>;
 255                                 device_type = "tbi-phy";
 256                         };
 257                 };
 258
 259                 mdio@25520 {
 260                         #address-cells = <1>;
 261                         #size-cells = <0>;
 262                         compatible = "fsl,gianfar-tbi";
 263                         reg = <0x25520 0x20>;
 264
 265                         tbi1: tbi-phy@11 {
 266                                 reg = <0x11>;
 267                                 device_type = "tbi-phy";
 268                         };
 269                 };
 270
 271                 enet0: ethernet@24000 {
 272                         cell-index = <0>;
 273                         device_type = "network";
 274                         model = "eTSEC";
 275                         compatible = "gianfar";
 276                         reg = <0x24000 0x1000>;
 277                         local-mac-address = [ 00 00 00 00 00 00 ];
 278                         interrupts = <32 0x8 33 0x8 34 0x8>;
 279                         phy-connection-type = "mii";
 280                         interrupt-parent = <&ipic>;
 281                         tbi-handle = <&tbi0>;
 282                         phy-handle = <&phy2>;
 283                         sleep = <&pmc 0xc0000000>;
 284                         fsl,magic-packet;
 285                 };
 286
 287                 enet1: ethernet@25000 {
 288                         cell-index = <1>;
 289                         device_type = "network";
 290                         model = "eTSEC";
 291                         compatible = "gianfar";
 292                         reg = <0x25000 0x1000>;
 293                         local-mac-address = [ 00 00 00 00 00 00 ];
 294                         interrupts = <35 0x8 36 0x8 37 0x8>;
 295                         phy-connection-type = "mii";
 296                         interrupt-parent = <&ipic>;
 297                         tbi-handle = <&tbi1>;
 298                         phy-handle = <&phy3>;
 299                         sleep = <&pmc 0x30000000>;
 300                         fsl,magic-packet;
 301                 };
 302
 303                 serial0: serial@4500 {
 304                         cell-index = <0>;
 305                         device_type = "serial";
 306                         compatible = "ns16550";
 307                         reg = <0x4500 0x100>;
 308                         clock-frequency = <0>;
 309                         interrupts = <9 0x8>;
 310                         interrupt-parent = <&ipic>;
 311                 };
 312
 313                 serial1: serial@4600 {
 314                         cell-index = <1>;
 315                         device_type = "serial";
 316                         compatible = "ns16550";
 317                         reg = <0x4600 0x100>;
 318                         clock-frequency = <0>;
 319                         interrupts = <10 0x8>;
 320                         interrupt-parent = <&ipic>;
 321                 };
 322
 323                 crypto@30000 {
 324                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
 325                                      "fsl,sec2.1", "fsl,sec2.0";
 326                         reg = <0x30000 0x10000>;
 327                         interrupts = <11 0x8>;
 328                         interrupt-parent = <&ipic>;
 329                         fsl,num-channels = <4>;
 330                         fsl,channel-fifo-len = <24>;
 331                         fsl,exec-units-mask = <0x9fe>;
 332                         fsl,descriptor-types-mask = <0x3ab0ebf>;
 333                         sleep = <&pmc 0x03000000>;
 334                 };
 335
 336                 sata@18000 {
 337                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 338                         reg = <0x18000 0x1000>;
 339                         interrupts = <44 0x8>;
 340                         interrupt-parent = <&ipic>;
 341                         sleep = <&pmc 0x000000c0>;
 342                 };
 343
 344                 sata@19000 {
 345                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 346                         reg = <0x19000 0x1000>;
 347                         interrupts = <45 0x8>;
 348                         interrupt-parent = <&ipic>;
 349                         sleep = <&pmc 0x00000030>;
 350                 };
 351
 352                 sata@1a000 {
 353                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 354                         reg = <0x1a000 0x1000>;
 355                         interrupts = <46 0x8>;
 356                         interrupt-parent = <&ipic>;
 357                         sleep = <&pmc 0x0000000c>;
 358                 };
 359
 360                 sata@1b000 {
 361                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 362                         reg = <0x1b000 0x1000>;
 363                         interrupts = <47 0x8>;
 364                         interrupt-parent = <&ipic>;
 365                         sleep = <&pmc 0x00000003>;
 366                 };
 367
 368                 /* IPIC
 369                  * interrupts cell = <intr #, sense>
 370                  * sense values match linux IORESOURCE_IRQ_* defines:
 371                  * sense == 8: Level, low assertion
 372                  * sense == 2: Edge, high-to-low change
 373                  */
 374                 ipic: pic@700 {
 375                         compatible = "fsl,ipic";
 376                         interrupt-controller;
 377                         #address-cells = <0>;
 378                         #interrupt-cells = <2>;
 379                         reg = <0x700 0x100>;
 380                 };
 381
 382                 pmc: power@b00 {
 383                         compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
 384                         reg = <0xb00 0x100 0xa00 0x100>;
 385                         interrupts = <80 0x8>;
 386                         interrupt-parent = <&ipic>;
 387                 };
 388         };
 389
 390         pci0: pci@e0008500 {
 391                 cell-index = <0>;
 392                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 393                 interrupt-map = <
 394
 395                                 /* IDSEL 0x11 */
 396                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
 397                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
 398                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
 399                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
 400
 401                                 /* IDSEL 0x12 */
 402                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
 403                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
 404                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
 405                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
 406
 407                                 /* IDSEL 0x13 */
 408                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
 409                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
 410                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
 411                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
 412
 413                                 /* IDSEL 0x15 */
 414                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
 415                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
 416                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
 417                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
 418
 419                                 /* IDSEL 0x16 */
 420                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
 421                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
 422                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
 423                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
 424
 425                                 /* IDSEL 0x17 */
 426                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
 427                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
 428                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
 429                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
 430
 431                                 /* IDSEL 0x18 */
 432                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
 433                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
 434                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
 435                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
 436                 interrupt-parent = <&ipic>;
 437                 interrupts = <66 0x8>;
 438                 bus-range = <0x0 0x0>;
 439                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 440                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 441                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
 442                 sleep = <&pmc 0x00010000>;
 443                 clock-frequency = <0>;
 444                 #interrupt-cells = <1>;
 445                 #size-cells = <2>;
 446                 #address-cells = <3>;
 447                 reg = <0xe0008500 0x100         /* internal registers */
 448                        0xe0008300 0x8>;         /* config space access registers */
 449                 compatible = "fsl,mpc8349-pci";
 450                 device_type = "pci";
 451         };
 452 };