2 * MPC8377E MDS Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "fsl,mpc8377emds";
16 compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
41 timebase-frequency = <0>;
43 clock-frequency = <0>;
48 device_type = "memory";
49 reg = <0x00000000 0x20000000>; // 512MB at 0
55 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
56 reg = <0xe0005000 0x1000>;
57 interrupts = <77 0x8>;
58 interrupt-parent = <&ipic>;
60 // booting from NOR flash
61 ranges = <0 0x0 0xfe000000 0x02000000
62 1 0x0 0xf8000000 0x00008000
63 3 0x0 0xe0600000 0x00008000>;
68 compatible = "cfi-flash";
69 reg = <0 0x0 0x2000000>;
79 reg = <0x100000 0x800000>;
83 reg = <0x1d00000 0x200000>;
87 reg = <0x1f00000 0x100000>;
93 compatible = "fsl,mpc837xmds-bcsr";
99 compatible = "fsl,mpc8377-fcm-nand",
101 reg = <3 0x0 0x8000>;
104 reg = <0x0 0x100000>;
109 reg = <0x100000 0x300000>;
113 reg = <0x400000 0x1c00000>;
119 #address-cells = <1>;
122 compatible = "simple-bus";
123 ranges = <0x0 0xe0000000 0x00100000>;
124 reg = <0xe0000000 0x00000200>;
128 compatible = "mpc83xx_wdt";
133 #address-cells = <1>;
135 compatible = "simple-bus";
136 sleep = <&pmc 0x0c000000>;
140 #address-cells = <1>;
143 compatible = "fsl-i2c";
144 reg = <0x3000 0x100>;
145 interrupts = <14 0x8>;
146 interrupt-parent = <&ipic>;
150 compatible = "dallas,ds1374";
152 interrupts = <19 0x8>;
153 interrupt-parent = <&ipic>;
158 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
159 reg = <0x2e000 0x1000>;
160 interrupts = <42 0x8>;
161 interrupt-parent = <&ipic>;
162 /* Filled in by U-Boot */
163 clock-frequency = <0>;
168 #address-cells = <1>;
171 compatible = "fsl-i2c";
172 reg = <0x3100 0x100>;
173 interrupts = <15 0x8>;
174 interrupt-parent = <&ipic>;
180 compatible = "fsl,spi";
181 reg = <0x7000 0x1000>;
182 interrupts = <16 0x8>;
183 interrupt-parent = <&ipic>;
188 compatible = "fsl-usb2-dr";
189 reg = <0x23000 0x1000>;
190 #address-cells = <1>;
192 interrupt-parent = <&ipic>;
193 interrupts = <38 0x8>;
196 sleep = <&pmc 0x00c00000>;
200 #address-cells = <1>;
202 compatible = "fsl,gianfar-mdio";
203 reg = <0x24520 0x20>;
204 phy2: ethernet-phy@2 {
205 interrupt-parent = <&ipic>;
206 interrupts = <17 0x8>;
208 device_type = "ethernet-phy";
210 phy3: ethernet-phy@3 {
211 interrupt-parent = <&ipic>;
212 interrupts = <18 0x8>;
214 device_type = "ethernet-phy";
218 device_type = "tbi-phy";
223 #address-cells = <1>;
225 compatible = "fsl,gianfar-tbi";
226 reg = <0x25520 0x20>;
230 device_type = "tbi-phy";
235 enet0: ethernet@24000 {
237 device_type = "network";
239 compatible = "gianfar";
240 reg = <0x24000 0x1000>;
241 local-mac-address = [ 00 00 00 00 00 00 ];
242 interrupts = <32 0x8 33 0x8 34 0x8>;
243 phy-connection-type = "mii";
244 interrupt-parent = <&ipic>;
245 tbi-handle = <&tbi0>;
246 phy-handle = <&phy2>;
247 sleep = <&pmc 0xc0000000>;
251 enet1: ethernet@25000 {
253 device_type = "network";
255 compatible = "gianfar";
256 reg = <0x25000 0x1000>;
257 local-mac-address = [ 00 00 00 00 00 00 ];
258 interrupts = <35 0x8 36 0x8 37 0x8>;
259 phy-connection-type = "mii";
260 interrupt-parent = <&ipic>;
261 tbi-handle = <&tbi1>;
262 phy-handle = <&phy3>;
263 sleep = <&pmc 0x30000000>;
267 serial0: serial@4500 {
269 device_type = "serial";
270 compatible = "ns16550";
271 reg = <0x4500 0x100>;
272 clock-frequency = <0>;
273 interrupts = <9 0x8>;
274 interrupt-parent = <&ipic>;
277 serial1: serial@4600 {
279 device_type = "serial";
280 compatible = "ns16550";
281 reg = <0x4600 0x100>;
282 clock-frequency = <0>;
283 interrupts = <10 0x8>;
284 interrupt-parent = <&ipic>;
288 #address-cells = <1>;
290 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
292 ranges = <0 0x8100 0x1a8>;
293 interrupt-parent = <&ipic>;
294 interrupts = <0x47 8>;
297 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
300 interrupt-parent = <&ipic>;
301 interrupts = <0x47 8>;
304 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
307 interrupt-parent = <&ipic>;
308 interrupts = <0x47 8>;
311 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
314 interrupt-parent = <&ipic>;
315 interrupts = <0x47 8>;
318 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
321 interrupt-parent = <&ipic>;
322 interrupts = <0x47 8>;
327 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
328 "fsl,sec2.1", "fsl,sec2.0";
329 reg = <0x30000 0x10000>;
330 interrupts = <11 0x8>;
331 interrupt-parent = <&ipic>;
332 fsl,num-channels = <4>;
333 fsl,channel-fifo-len = <24>;
334 fsl,exec-units-mask = <0x9fe>;
335 fsl,descriptor-types-mask = <0x3ab0ebf>;
336 sleep = <&pmc 0x03000000>;
340 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
341 reg = <0x18000 0x1000>;
342 interrupts = <44 0x8>;
343 interrupt-parent = <&ipic>;
344 sleep = <&pmc 0x000000c0>;
348 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
349 reg = <0x19000 0x1000>;
350 interrupts = <45 0x8>;
351 interrupt-parent = <&ipic>;
352 sleep = <&pmc 0x00000030>;
356 * interrupts cell = <intr #, sense>
357 * sense values match linux IORESOURCE_IRQ_* defines:
358 * sense == 8: Level, low assertion
359 * sense == 2: Edge, high-to-low change
362 compatible = "fsl,ipic";
363 interrupt-controller;
364 #address-cells = <0>;
365 #interrupt-cells = <2>;
370 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
371 reg = <0xb00 0x100 0xa00 0x100>;
372 interrupts = <80 0x8>;
373 interrupt-parent = <&ipic>;
379 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
383 0x8800 0x0 0x0 0x1 &ipic 20 0x8
384 0x8800 0x0 0x0 0x2 &ipic 21 0x8
385 0x8800 0x0 0x0 0x3 &ipic 22 0x8
386 0x8800 0x0 0x0 0x4 &ipic 23 0x8
389 0x9000 0x0 0x0 0x1 &ipic 22 0x8
390 0x9000 0x0 0x0 0x2 &ipic 23 0x8
391 0x9000 0x0 0x0 0x3 &ipic 20 0x8
392 0x9000 0x0 0x0 0x4 &ipic 21 0x8
395 0x9800 0x0 0x0 0x1 &ipic 23 0x8
396 0x9800 0x0 0x0 0x2 &ipic 20 0x8
397 0x9800 0x0 0x0 0x3 &ipic 21 0x8
398 0x9800 0x0 0x0 0x4 &ipic 22 0x8
401 0xa800 0x0 0x0 0x1 &ipic 20 0x8
402 0xa800 0x0 0x0 0x2 &ipic 21 0x8
403 0xa800 0x0 0x0 0x3 &ipic 22 0x8
404 0xa800 0x0 0x0 0x4 &ipic 23 0x8
407 0xb000 0x0 0x0 0x1 &ipic 23 0x8
408 0xb000 0x0 0x0 0x2 &ipic 20 0x8
409 0xb000 0x0 0x0 0x3 &ipic 21 0x8
410 0xb000 0x0 0x0 0x4 &ipic 22 0x8
413 0xb800 0x0 0x0 0x1 &ipic 22 0x8
414 0xb800 0x0 0x0 0x2 &ipic 23 0x8
415 0xb800 0x0 0x0 0x3 &ipic 20 0x8
416 0xb800 0x0 0x0 0x4 &ipic 21 0x8
419 0xc000 0x0 0x0 0x1 &ipic 21 0x8
420 0xc000 0x0 0x0 0x2 &ipic 22 0x8
421 0xc000 0x0 0x0 0x3 &ipic 23 0x8
422 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
423 interrupt-parent = <&ipic>;
424 interrupts = <66 0x8>;
425 bus-range = <0x0 0x0>;
426 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
427 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
428 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
429 sleep = <&pmc 0x00010000>;
430 clock-frequency = <0>;
431 #interrupt-cells = <1>;
433 #address-cells = <3>;
434 reg = <0xe0008500 0x100 /* internal registers */
435 0xe0008300 0x8>; /* config space access registers */
436 compatible = "fsl,mpc8349-pci";
440 pci1: pcie@e0009000 {
441 #address-cells = <3>;
443 #interrupt-cells = <1>;
445 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
446 reg = <0xe0009000 0x00001000>;
447 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
448 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
450 interrupt-map-mask = <0xf800 0 0 7>;
451 interrupt-map = <0 0 0 1 &ipic 1 8
455 sleep = <&pmc 0x00300000>;
456 clock-frequency = <0>;
459 #address-cells = <3>;
463 ranges = <0x02000000 0 0xa8000000
464 0x02000000 0 0xa8000000
466 0x01000000 0 0x00000000
467 0x01000000 0 0x00000000
472 pci2: pcie@e000a000 {
473 #address-cells = <3>;
475 #interrupt-cells = <1>;
477 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
478 reg = <0xe000a000 0x00001000>;
479 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
480 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
482 interrupt-map-mask = <0xf800 0 0 7>;
483 interrupt-map = <0 0 0 1 &ipic 2 8
487 sleep = <&pmc 0x000c0000>;
488 clock-frequency = <0>;
491 #address-cells = <3>;
495 ranges = <0x02000000 0 0xc8000000
496 0x02000000 0 0xc8000000
498 0x01000000 0 0x00000000
499 0x01000000 0 0x00000000