2 * MPC8360E RDK Device Tree Source
4 * Copyright 2006 Freescale Semiconductor Inc.
5 * Copyright 2007-2008 MontaVista Software, Inc.
7 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
20 compatible = "fsl,mpc8360rdk";
41 d-cache-line-size = <32>;
42 i-cache-line-size = <32>;
43 d-cache-size = <32768>;
44 i-cache-size = <32768>;
45 /* filled by u-boot */
46 timebase-frequency = <0>;
48 clock-frequency = <0>;
53 device_type = "memory";
54 /* filled by u-boot */
62 compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc",
64 ranges = <0 0xe0000000 0x200000>;
65 reg = <0xe0000000 0x200>;
66 /* filled by u-boot */
70 compatible = "mpc83xx_wdt";
78 compatible = "fsl-i2c";
81 interrupt-parent = <&ipic>;
89 compatible = "fsl-i2c";
92 interrupt-parent = <&ipic>;
96 serial0: serial@4500 {
97 device_type = "serial";
98 compatible = "ns16550";
101 interrupt-parent = <&ipic>;
102 /* filled by u-boot */
103 clock-frequency = <0>;
106 serial1: serial@4600 {
107 device_type = "serial";
108 compatible = "ns16550";
109 reg = <0x4600 0x100>;
111 interrupt-parent = <&ipic>;
112 /* filled by u-boot */
113 clock-frequency = <0>;
117 compatible = "fsl,sec2-crypto";
118 reg = <0x30000 0x10000>;
120 interrupt-parent = <&ipic>;
122 channel-fifo-len = <24>;
123 exec-units-mask = <0x7e>;
125 * desc mask is for rev1.x, we need runtime fixup
128 descriptor-types-mask = <0x1010ebf>;
131 ipic: interrupt-controller@700 {
132 #address-cells = <0>;
133 #interrupt-cells = <2>;
134 compatible = "fsl,pq2pro-pic", "fsl,ipic";
135 interrupt-controller;
139 qe_pio_b: gpio-controller@1418 {
141 compatible = "fsl,mpc8360-qe-pario-bank",
142 "fsl,mpc8323-qe-pario-bank";
147 qe_pio_e: gpio-controller@1460 {
149 compatible = "fsl,mpc8360-qe-pario-bank",
150 "fsl,mpc8323-qe-pario-bank";
156 #address-cells = <1>;
159 compatible = "fsl,qe", "simple-bus";
160 ranges = <0 0x100000 0x100000>;
161 reg = <0x100000 0x480>;
162 /* filled by u-boot */
163 clock-frequency = <0>;
168 #address-cells = <1>;
170 compatible = "fsl,qe-muram", "fsl,cpm-muram";
171 ranges = <0 0x10000 0xc000>;
174 compatible = "fsl,qe-muram-data",
175 "fsl,cpm-muram-data";
181 compatible = "fsl,mpc8360-qe-gtm",
182 "fsl,qe-gtm", "fsl,gtm";
184 interrupts = <12 13 14 15>;
185 interrupt-parent = <&qeic>;
186 /* filled by u-boot */
187 clock-frequency = <0>;
192 compatible = "fsl,spi";
195 interrupt-parent = <&qeic>;
201 compatible = "fsl,spi";
204 interrupt-parent = <&qeic>;
209 device_type = "network";
210 compatible = "ucc_geth";
212 reg = <0x2000 0x200>;
214 interrupt-parent = <&qeic>;
215 rx-clock-name = "none";
216 tx-clock-name = "clk9";
217 phy-handle = <&phy2>;
218 phy-connection-type = "rgmii-rxid";
219 /* filled by u-boot */
220 local-mac-address = [ 00 00 00 00 00 00 ];
224 device_type = "network";
225 compatible = "ucc_geth";
227 reg = <0x3000 0x200>;
229 interrupt-parent = <&qeic>;
230 rx-clock-name = "none";
231 tx-clock-name = "clk4";
232 phy-handle = <&phy4>;
233 phy-connection-type = "rgmii-rxid";
234 /* filled by u-boot */
235 local-mac-address = [ 00 00 00 00 00 00 ];
239 device_type = "network";
240 compatible = "ucc_geth";
242 reg = <0x2600 0x200>;
244 interrupt-parent = <&qeic>;
245 rx-clock-name = "clk20";
246 tx-clock-name = "clk19";
247 phy-handle = <&phy1>;
248 phy-connection-type = "mii";
249 /* filled by u-boot */
250 local-mac-address = [ 00 00 00 00 00 00 ];
254 device_type = "network";
255 compatible = "ucc_geth";
257 reg = <0x3200 0x200>;
259 interrupt-parent = <&qeic>;
260 rx-clock-name = "clk8";
261 tx-clock-name = "clk7";
262 phy-handle = <&phy3>;
263 phy-connection-type = "mii";
264 /* filled by u-boot */
265 local-mac-address = [ 00 00 00 00 00 00 ];
269 #address-cells = <1>;
271 compatible = "fsl,ucc-mdio";
274 phy1: ethernet-phy@1 {
275 device_type = "ethernet-phy";
276 compatible = "national,DP83848VV";
280 phy2: ethernet-phy@2 {
281 device_type = "ethernet-phy";
282 compatible = "broadcom,BCM5481UA2KMLG";
286 phy3: ethernet-phy@3 {
287 device_type = "ethernet-phy";
288 compatible = "national,DP83848VV";
292 phy4: ethernet-phy@4 {
293 device_type = "ethernet-phy";
294 compatible = "broadcom,BCM5481UA2KMLG";
300 device_type = "serial";
301 compatible = "ucc_uart";
302 reg = <0x2400 0x200>;
305 rx-clock-name = "brg7";
306 tx-clock-name = "brg8";
308 interrupt-parent = <&qeic>;
313 device_type = "serial";
314 compatible = "ucc_uart";
315 reg = <0x3400 0x200>;
318 rx-clock-name = "brg13";
319 tx-clock-name = "brg14";
321 interrupt-parent = <&qeic>;
325 qeic: interrupt-controller@80 {
326 #address-cells = <0>;
327 #interrupt-cells = <1>;
328 compatible = "fsl,qe-ic";
329 interrupt-controller;
332 interrupts = <32 8 33 8>;
333 interrupt-parent = <&ipic>;
339 #address-cells = <2>;
341 compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
343 reg = <0xe0005000 0xd8>;
344 ranges = <0 0 0xff800000 0x0800000
345 1 0 0x60000000 0x0001000
346 2 0 0x70000000 0x4000000>;
349 compatible = "intel,PC28F640P30T85", "cfi-flash";
350 reg = <0 0 0x800000>;
356 device_type = "display";
357 compatible = "fujitsu,MB86277", "fujitsu,mint";
358 reg = <2 0 0x4000000>;
361 /* filled by u-boot */
367 /* linux,opened; - added by uboot */
372 #address-cells = <3>;
374 #interrupt-cells = <1>;
376 compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
377 reg = <0xe0008500 0x100>;
378 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
379 0x42000000 0 0x80000000 0x80000000 0 0x10000000
380 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
382 interrupt-parent = <&ipic>;
383 interrupt-map-mask = <0xf800 0 0 7>;
384 interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */
385 0xa000 0 0 1 &ipic 18 8
386 0xa000 0 0 2 &ipic 19 8
388 /* PCI1 IDSEL 0x15 AD21 */
389 0xa800 0 0 1 &ipic 19 8
390 0xa800 0 0 2 &ipic 20 8
391 0xa800 0 0 3 &ipic 21 8
392 0xa800 0 0 4 &ipic 18 8>;
393 /* filled by u-boot */
395 clock-frequency = <0>;