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powerpc: Add dma nodes to 83xx, 85xx and 86xx boards
[linux-2.6-omap-h63xx.git] / arch / powerpc / boot / dts / mpc836x_mds.dts
1 /*
2  * MPC8360E EMDS Device Tree Source
3  *
4  * Copyright 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12
13 /*
14 /memreserve/    00000000 1000000;
15 */
16
17 /dts-v1/;
18
19 / {
20         model = "MPC8360MDS";
21         compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
22         #address-cells = <1>;
23         #size-cells = <1>;
24
25         aliases {
26                 ethernet0 = &enet0;
27                 ethernet1 = &enet1;
28                 serial0 = &serial0;
29                 serial1 = &serial1;
30                 pci0 = &pci0;
31         };
32
33         cpus {
34                 #address-cells = <1>;
35                 #size-cells = <0>;
36
37                 PowerPC,8360@0 {
38                         device_type = "cpu";
39                         reg = <0x0>;
40                         d-cache-line-size = <32>;       // 32 bytes
41                         i-cache-line-size = <32>;       // 32 bytes
42                         d-cache-size = <32768>;         // L1, 32K
43                         i-cache-size = <32768>;         // L1, 32K
44                         timebase-frequency = <66000000>;
45                         bus-frequency = <264000000>;
46                         clock-frequency = <528000000>;
47                 };
48         };
49
50         memory {
51                 device_type = "memory";
52                 reg = <0x00000000 0x10000000>;
53         };
54
55         bcsr@f8000000 {
56                 device_type = "board-control";
57                 reg = <0xf8000000 0x8000>;
58         };
59
60         soc8360@e0000000 {
61                 #address-cells = <1>;
62                 #size-cells = <1>;
63                 device_type = "soc";
64                 ranges = <0x0 0xe0000000 0x00100000>;
65                 reg = <0xe0000000 0x00000200>;
66                 bus-frequency = <264000000>;
67
68                 wdt@200 {
69                         device_type = "watchdog";
70                         compatible = "mpc83xx_wdt";
71                         reg = <0x200 0x100>;
72                 };
73
74                 i2c@3000 {
75                         #address-cells = <1>;
76                         #size-cells = <0>;
77                         cell-index = <0>;
78                         compatible = "fsl-i2c";
79                         reg = <0x3000 0x100>;
80                         interrupts = <14 0x8>;
81                         interrupt-parent = <&ipic>;
82                         dfsrr;
83
84                         rtc@68 {
85                                 compatible = "dallas,ds1374";
86                                 reg = <0x68>;
87                         };
88                 };
89
90                 i2c@3100 {
91                         #address-cells = <1>;
92                         #size-cells = <0>;
93                         cell-index = <1>;
94                         compatible = "fsl-i2c";
95                         reg = <0x3100 0x100>;
96                         interrupts = <15 0x8>;
97                         interrupt-parent = <&ipic>;
98                         dfsrr;
99                 };
100
101                 serial0: serial@4500 {
102                         cell-index = <0>;
103                         device_type = "serial";
104                         compatible = "ns16550";
105                         reg = <0x4500 0x100>;
106                         clock-frequency = <264000000>;
107                         interrupts = <9 0x8>;
108                         interrupt-parent = <&ipic>;
109                 };
110
111                 serial1: serial@4600 {
112                         cell-index = <1>;
113                         device_type = "serial";
114                         compatible = "ns16550";
115                         reg = <0x4600 0x100>;
116                         clock-frequency = <264000000>;
117                         interrupts = <10 0x8>;
118                         interrupt-parent = <&ipic>;
119                 };
120
121                 dma@82a8 {
122                         #address-cells = <1>;
123                         #size-cells = <1>;
124                         compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
125                         reg = <0x82a8 4>;
126                         ranges = <0 0x8100 0x1a8>;
127                         interrupt-parent = <&ipic>;
128                         interrupts = <71 8>;
129                         cell-index = <0>;
130                         dma-channel@0 {
131                                 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
132                                 reg = <0 0x80>;
133                                 interrupt-parent = <&ipic>;
134                                 interrupts = <71 8>;
135                         };
136                         dma-channel@80 {
137                                 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
138                                 reg = <0x80 0x80>;
139                                 interrupt-parent = <&ipic>;
140                                 interrupts = <71 8>;
141                         };
142                         dma-channel@100 {
143                                 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
144                                 reg = <0x100 0x80>;
145                                 interrupt-parent = <&ipic>;
146                                 interrupts = <71 8>;
147                         };
148                         dma-channel@180 {
149                                 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
150                                 reg = <0x180 0x28>;
151                                 interrupt-parent = <&ipic>;
152                                 interrupts = <71 8>;
153                         };
154                 };
155
156                 crypto@30000 {
157                         device_type = "crypto";
158                         model = "SEC2";
159                         compatible = "talitos";
160                         reg = <0x30000 0x10000>;
161                         interrupts = <11 0x8>;
162                         interrupt-parent = <&ipic>;
163                         num-channels = <4>;
164                         channel-fifo-len = <24>;
165                         exec-units-mask = <0x0000007e>;
166                         /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
167                         descriptor-types-mask = <0x01010ebf>;
168                 };
169
170                 ipic: pic@700 {
171                         interrupt-controller;
172                         #address-cells = <0>;
173                         #interrupt-cells = <2>;
174                         reg = <0x700 0x100>;
175                         device_type = "ipic";
176                 };
177
178                 par_io@1400 {
179                         reg = <0x1400 0x100>;
180                         device_type = "par_io";
181                         num-ports = <7>;
182
183                         pio1: ucc_pin@01 {
184                                 pio-map = <
185                         /* port  pin  dir  open_drain  assignment  has_irq */
186                                         0  3  1  0  1  0        /* TxD0 */
187                                         0  4  1  0  1  0        /* TxD1 */
188                                         0  5  1  0  1  0        /* TxD2 */
189                                         0  6  1  0  1  0        /* TxD3 */
190                                         1  6  1  0  3  0        /* TxD4 */
191                                         1  7  1  0  1  0        /* TxD5 */
192                                         1  9  1  0  2  0        /* TxD6 */
193                                         1  10 1  0  2  0        /* TxD7 */
194                                         0  9  2  0  1  0        /* RxD0 */
195                                         0  10 2  0  1  0        /* RxD1 */
196                                         0  11 2  0  1  0        /* RxD2 */
197                                         0  12 2  0  1  0        /* RxD3 */
198                                         0  13 2  0  1  0        /* RxD4 */
199                                         1  1  2  0  2  0        /* RxD5 */
200                                         1  0  2  0  2  0        /* RxD6 */
201                                         1  4  2  0  2  0        /* RxD7 */
202                                         0  7  1  0  1  0        /* TX_EN */
203                                         0  8  1  0  1  0        /* TX_ER */
204                                         0  15 2  0  1  0        /* RX_DV */
205                                         0  16 2  0  1  0        /* RX_ER */
206                                         0  0  2  0  1  0        /* RX_CLK */
207                                         2  9  1  0  3  0        /* GTX_CLK - CLK10 */
208                                         2  8  2  0  1  0>;      /* GTX125 - CLK9 */
209                         };
210                         pio2: ucc_pin@02 {
211                                 pio-map = <
212                         /* port  pin  dir  open_drain  assignment  has_irq */
213                                         0  17 1  0  1  0   /* TxD0 */
214                                         0  18 1  0  1  0   /* TxD1 */
215                                         0  19 1  0  1  0   /* TxD2 */
216                                         0  20 1  0  1  0   /* TxD3 */
217                                         1  2  1  0  1  0   /* TxD4 */
218                                         1  3  1  0  2  0   /* TxD5 */
219                                         1  5  1  0  3  0   /* TxD6 */
220                                         1  8  1  0  3  0   /* TxD7 */
221                                         0  23 2  0  1  0   /* RxD0 */
222                                         0  24 2  0  1  0   /* RxD1 */
223                                         0  25 2  0  1  0   /* RxD2 */
224                                         0  26 2  0  1  0   /* RxD3 */
225                                         0  27 2  0  1  0   /* RxD4 */
226                                         1  12 2  0  2  0   /* RxD5 */
227                                         1  13 2  0  3  0   /* RxD6 */
228                                         1  11 2  0  2  0   /* RxD7 */
229                                         0  21 1  0  1  0   /* TX_EN */
230                                         0  22 1  0  1  0   /* TX_ER */
231                                         0  29 2  0  1  0   /* RX_DV */
232                                         0  30 2  0  1  0   /* RX_ER */
233                                         0  31 2  0  1  0   /* RX_CLK */
234                                         2  2  1  0  2  0   /* GTX_CLK - CLK10 */
235                                         2  3  2  0  1  0   /* GTX125 - CLK4 */
236                                         0  1  3  0  2  0   /* MDIO */
237                                         0  2  1  0  1  0>; /* MDC */
238                         };
239
240                 };
241         };
242
243         qe@e0100000 {
244                 #address-cells = <1>;
245                 #size-cells = <1>;
246                 device_type = "qe";
247                 compatible = "fsl,qe";
248                 ranges = <0x0 0xe0100000 0x00100000>;
249                 reg = <0xe0100000 0x480>;
250                 brg-frequency = <0>;
251                 bus-frequency = <396000000>;
252
253                 muram@10000 {
254                         #address-cells = <1>;
255                         #size-cells = <1>;
256                         compatible = "fsl,qe-muram", "fsl,cpm-muram";
257                         ranges = <0x0 0x00010000 0x0000c000>;
258
259                         data-only@0 {
260                                 compatible = "fsl,qe-muram-data",
261                                              "fsl,cpm-muram-data";
262                                 reg = <0x0 0xc000>;
263                         };
264                 };
265
266                 spi@4c0 {
267                         cell-index = <0>;
268                         compatible = "fsl,spi";
269                         reg = <0x4c0 0x40>;
270                         interrupts = <2>;
271                         interrupt-parent = <&qeic>;
272                         mode = "cpu";
273                 };
274
275                 spi@500 {
276                         cell-index = <1>;
277                         compatible = "fsl,spi";
278                         reg = <0x500 0x40>;
279                         interrupts = <1>;
280                         interrupt-parent = <&qeic>;
281                         mode = "cpu";
282                 };
283
284                 usb@6c0 {
285                         compatible = "qe_udc";
286                         reg = <0x6c0 0x40 0x8b00 0x100>;
287                         interrupts = <11>;
288                         interrupt-parent = <&qeic>;
289                         mode = "slave";
290                 };
291
292                 enet0: ucc@2000 {
293                         device_type = "network";
294                         compatible = "ucc_geth";
295                         cell-index = <1>;
296                         reg = <0x2000 0x200>;
297                         interrupts = <32>;
298                         interrupt-parent = <&qeic>;
299                         local-mac-address = [ 00 00 00 00 00 00 ];
300                         rx-clock-name = "none";
301                         tx-clock-name = "clk9";
302                         phy-handle = <&phy0>;
303                         phy-connection-type = "rgmii-id";
304                         pio-handle = <&pio1>;
305                 };
306
307                 enet1: ucc@3000 {
308                         device_type = "network";
309                         compatible = "ucc_geth";
310                         cell-index = <2>;
311                         reg = <0x3000 0x200>;
312                         interrupts = <33>;
313                         interrupt-parent = <&qeic>;
314                         local-mac-address = [ 00 00 00 00 00 00 ];
315                         rx-clock-name = "none";
316                         tx-clock-name = "clk4";
317                         phy-handle = <&phy1>;
318                         phy-connection-type = "rgmii-id";
319                         pio-handle = <&pio2>;
320                 };
321
322                 mdio@2120 {
323                         #address-cells = <1>;
324                         #size-cells = <0>;
325                         reg = <0x2120 0x18>;
326                         compatible = "fsl,ucc-mdio";
327
328                         phy0: ethernet-phy@00 {
329                                 interrupt-parent = <&ipic>;
330                                 interrupts = <17 0x8>;
331                                 reg = <0x0>;
332                                 device_type = "ethernet-phy";
333                         };
334                         phy1: ethernet-phy@01 {
335                                 interrupt-parent = <&ipic>;
336                                 interrupts = <18 0x8>;
337                                 reg = <0x1>;
338                                 device_type = "ethernet-phy";
339                         };
340                 };
341
342                 qeic: interrupt-controller@80 {
343                         interrupt-controller;
344                         compatible = "fsl,qe-ic";
345                         #address-cells = <0>;
346                         #interrupt-cells = <1>;
347                         reg = <0x80 0x80>;
348                         big-endian;
349                         interrupts = <32 0x8 33 0x8>; // high:32 low:33
350                         interrupt-parent = <&ipic>;
351                 };
352         };
353
354         pci0: pci@e0008500 {
355                 cell-index = <1>;
356                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
357                 interrupt-map = <
358
359                                 /* IDSEL 0x11 AD17 */
360                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
361                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
362                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
363                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
364
365                                 /* IDSEL 0x12 AD18 */
366                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
367                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
368                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
369                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
370
371                                 /* IDSEL 0x13 AD19 */
372                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
373                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
374                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
375                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
376
377                                 /* IDSEL 0x15 AD21*/
378                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
379                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
380                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
381                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
382
383                                 /* IDSEL 0x16 AD22*/
384                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
385                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
386                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
387                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
388
389                                 /* IDSEL 0x17 AD23*/
390                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
391                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
392                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
393                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
394
395                                 /* IDSEL 0x18 AD24*/
396                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
397                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
398                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
399                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
400                 interrupt-parent = <&ipic>;
401                 interrupts = <66 0x8>;
402                 bus-range = <0 0>;
403                 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
404                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
405                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
406                 clock-frequency = <66666666>;
407                 #interrupt-cells = <1>;
408                 #size-cells = <2>;
409                 #address-cells = <3>;
410                 reg = <0xe0008500 0x100>;
411                 compatible = "fsl,mpc8349-pci";
412                 device_type = "pci";
413         };
414 };