arch/powerpc/boot/dts/mpc8349emitxgp.dts

   1 /*
   2  * MPC8349E-mITX-GP Device Tree Source
   3  *
   4  * Copyright 2007 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; either version 2 of the License, or (at your
   9  * option) any later version.
  10  */
  11 / {
  12         model = "MPC8349EMITXGP";
  13         compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
  14         #address-cells = <1>;
  15         #size-cells = <1>;
  16
  17         cpus {
  18                 #address-cells = <1>;
  19                 #size-cells = <0>;
  20
  21                 PowerPC,8349@0 {
  22                         device_type = "cpu";
  23                         reg = <0>;
  24                         d-cache-line-size = <20>;
  25                         i-cache-line-size = <20>;
  26                         d-cache-size = <8000>;
  27                         i-cache-size = <8000>;
  28                         timebase-frequency = <0>;       // from bootloader
  29                         bus-frequency = <0>;            // from bootloader
  30                         clock-frequency = <0>;          // from bootloader
  31                 };
  32         };
  33
  34         memory {
  35                 device_type = "memory";
  36                 reg = <00000000 10000000>;
  37         };
  38
  39         soc8349@e0000000 {
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42                 device_type = "soc";
  43                 ranges = <0 e0000000 00100000>;
  44                 reg = <e0000000 00000200>;
  45                 bus-frequency = <0>;                    // from bootloader
  46
  47                 wdt@200 {
  48                         device_type = "watchdog";
  49                         compatible = "mpc83xx_wdt";
  50                         reg = <200 100>;
  51                 };
  52
  53                 i2c@3000 {
  54                         #address-cells = <1>;
  55                         #size-cells = <0>;
  56                         cell-index = <0>;
  57                         compatible = "fsl-i2c";
  58                         reg = <3000 100>;
  59                         interrupts = <e 8>;
  60                         interrupt-parent = < &ipic >;
  61                         dfsrr;
  62                 };
  63
  64                 i2c@3100 {
  65                         #address-cells = <1>;
  66                         #size-cells = <0>;
  67                         cell-index = <1>;
  68                         compatible = "fsl-i2c";
  69                         reg = <3100 100>;
  70                         interrupts = <f 8>;
  71                         interrupt-parent = < &ipic >;
  72                         dfsrr;
  73                 };
  74
  75                 spi@7000 {
  76                         device_type = "spi";
  77                         compatible = "fsl_spi";
  78                         reg = <7000 1000>;
  79                         interrupts = <10 8>;
  80                         interrupt-parent = < &ipic >;
  81                         mode = "cpu";
  82                 };
  83
  84                 usb@23000 {
  85                         device_type = "usb";
  86                         compatible = "fsl-usb2-dr";
  87                         reg = <23000 1000>;
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         interrupt-parent = < &ipic >;
  91                         interrupts = <26 8>;
  92                         dr_mode = "otg";
  93                         phy_type = "ulpi";
  94                 };
  95
  96                 mdio@24520 {
  97                         device_type = "mdio";
  98                         compatible = "gianfar";
  99                         reg = <24520 20>;
 100                         #address-cells = <1>;
 101                         #size-cells = <0>;
 102
 103                         /* Vitesse 8201 */
 104                         phy1c: ethernet-phy@1c {
 105                                 interrupt-parent = < &ipic >;
 106                                 interrupts = <12 8>;
 107                                 reg = <1c>;
 108                                 device_type = "ethernet-phy";
 109                         };
 110                 };
 111
 112                 ethernet@24000 {
 113                         device_type = "network";
 114                         model = "TSEC";
 115                         compatible = "gianfar";
 116                         reg = <24000 1000>;
 117                         local-mac-address = [ 00 00 00 00 00 00 ];
 118                         interrupts = <20 8 21 8 22 8>;
 119                         interrupt-parent = < &ipic >;
 120                         phy-handle = < &phy1c >;
 121                         linux,network-index = <0>;
 122                 };
 123
 124                 serial@4500 {
 125                         device_type = "serial";
 126                         compatible = "ns16550";
 127                         reg = <4500 100>;
 128                         clock-frequency = <0>;          // from bootloader
 129                         interrupts = <9 8>;
 130                         interrupt-parent = < &ipic >;
 131                 };
 132
 133                 serial@4600 {
 134                         device_type = "serial";
 135                         compatible = "ns16550";
 136                         reg = <4600 100>;
 137                         clock-frequency = <0>;          // from bootloader
 138                         interrupts = <a 8>;
 139                         interrupt-parent = < &ipic >;
 140                 };
 141
 142                 crypto@30000 {
 143                         device_type = "crypto";
 144                         model = "SEC2";
 145                         compatible = "talitos";
 146                         reg = <30000 10000>;
 147                         interrupts = <b 8>;
 148                         interrupt-parent = < &ipic >;
 149                         num-channels = <4>;
 150                         channel-fifo-len = <18>;
 151                         exec-units-mask = <0000007e>;
 152                         descriptor-types-mask = <01010ebf>;
 153                 };
 154
 155                 ipic: pic@700 {
 156                         interrupt-controller;
 157                         #address-cells = <0>;
 158                         #interrupt-cells = <2>;
 159                         reg = <700 100>;
 160                         device_type = "ipic";
 161                 };
 162         };
 163
 164         pci@e0008600 {
 165                 interrupt-map-mask = <f800 0 0 7>;
 166                 interrupt-map = <
 167                                 /* IDSEL 0x0F - PCI Slot */
 168                                 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
 169                                 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
 170                                  >;
 171                 interrupt-parent = < &ipic >;
 172                 interrupts = <43 8>;
 173                 bus-range = <1 1>;
 174                 ranges = <42000000 0 a0000000 a0000000 0 10000000
 175                           02000000 0 b0000000 b0000000 0 10000000
 176                           01000000 0 00000000 e3000000 0 01000000>;
 177                 clock-frequency = <3f940aa>;
 178                 #interrupt-cells = <1>;
 179                 #size-cells = <2>;
 180                 #address-cells = <3>;
 181                 reg = <e0008600 100>;
 182                 compatible = "fsl,mpc8349-pci";
 183                 device_type = "pci";
 184         };
 185 };