arch/powerpc/boot/dts/mpc8272ads.dts

   1 /*
   2  * MPC8272 ADS Device Tree Source
   3  *
   4  * Copyright 2005 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8272ADS";
  14         compatible = "fsl,mpc8272ads";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 PowerPC,8272@0 {
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                         d-cache-line-size = <d#32>;
  26                         i-cache-line-size = <d#32>;
  27                         d-cache-size = <d#16384>;
  28                         i-cache-size = <d#16384>;
  29                         timebase-frequency = <0>;
  30                         bus-frequency = <0>;
  31                         clock-frequency = <0>;
  32                 };
  33         };
  34
  35         memory {
  36                 device_type = "memory";
  37                 reg = <0 0>;
  38         };
  39
  40         localbus@f0010100 {
  41                 compatible = "fsl,mpc8272-localbus",
  42                              "fsl,pq2-localbus";
  43                 #address-cells = <2>;
  44                 #size-cells = <1>;
  45                 reg = <f0010100 40>;
  46
  47                 ranges = <0 0 fe000000 02000000
  48                           1 0 f4500000 00008000
  49                           3 0 f8200000 00008000>;
  50
  51                 flash@0,0 {
  52                         compatible = "jedec-flash";
  53                         reg = <0 0 2000000>;
  54                         bank-width = <4>;
  55                         device-width = <1>;
  56                 };
  57
  58                 board-control@1,0 {
  59                         reg = <1 0 20>;
  60                         compatible = "fsl,mpc8272ads-bcsr";
  61                 };
  62
  63                 PCI_PIC: interrupt-controller@3,0 {
  64                         compatible = "fsl,mpc8272ads-pci-pic",
  65                                      "fsl,pq2ads-pci-pic";
  66                         #interrupt-cells = <1>;
  67                         interrupt-controller;
  68                         reg = <3 0 8>;
  69                         interrupt-parent = <&PIC>;
  70                         interrupts = <14 8>;
  71                 };
  72         };
  73
  74
  75         pci@f0010800 {
  76                 device_type = "pci";
  77                 reg = <f0010800 10c f00101ac 8 f00101c4 8>;
  78                 compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
  79                 #interrupt-cells = <1>;
  80                 #size-cells = <2>;
  81                 #address-cells = <3>;
  82                 clock-frequency = <d#66666666>;
  83                 interrupt-map-mask = <f800 0 0 7>;
  84                 interrupt-map = <
  85                                  /* IDSEL 0x16 */
  86                                  b000 0 0 1 &PCI_PIC 0
  87                                  b000 0 0 2 &PCI_PIC 1
  88                                  b000 0 0 3 &PCI_PIC 2
  89                                  b000 0 0 4 &PCI_PIC 3
  90
  91                                  /* IDSEL 0x17 */
  92                                  b800 0 0 1 &PCI_PIC 4
  93                                  b800 0 0 2 &PCI_PIC 5
  94                                  b800 0 0 3 &PCI_PIC 6
  95                                  b800 0 0 4 &PCI_PIC 7
  96
  97                                  /* IDSEL 0x18 */
  98                                  c000 0 0 1 &PCI_PIC 8
  99                                  c000 0 0 2 &PCI_PIC 9
 100                                  c000 0 0 3 &PCI_PIC a
 101                                  c000 0 0 4 &PCI_PIC b>;
 102
 103                 interrupt-parent = <&PIC>;
 104                 interrupts = <12 8>;
 105                 ranges = <42000000 0 80000000 80000000 0 20000000
 106                           02000000 0 a0000000 a0000000 0 20000000
 107                           01000000 0 00000000 f6000000 0 02000000>;
 108         };
 109
 110         soc@f0000000 {
 111                 #address-cells = <1>;
 112                 #size-cells = <1>;
 113                 device_type = "soc";
 114                 compatible = "fsl,mpc8272", "fsl,pq2-soc";
 115                 ranges = <00000000 f0000000 00053000>;
 116
 117                 // Temporary -- will go away once kernel uses ranges for get_immrbase().
 118                 reg = <f0000000 00053000>;
 119
 120                 cpm@119c0 {
 121                         #address-cells = <1>;
 122                         #size-cells = <1>;
 123                         compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
 124                         reg = <119c0 30>;
 125                         ranges;
 126
 127                         muram@0 {
 128                                 #address-cells = <1>;
 129                                 #size-cells = <1>;
 130                                 ranges = <0 0 10000>;
 131
 132                                 data@0 {
 133                                         compatible = "fsl,cpm-muram-data";
 134                                         reg = <0 2000 9800 800>;
 135                                 };
 136                         };
 137
 138                         brg@119f0 {
 139                                 compatible = "fsl,mpc8272-brg",
 140                                              "fsl,cpm2-brg",
 141                                              "fsl,cpm-brg";
 142                                 reg = <119f0 10 115f0 10>;
 143                         };
 144
 145                         serial@11a00 {
 146                                 device_type = "serial";
 147                                 compatible = "fsl,mpc8272-scc-uart",
 148                                              "fsl,cpm2-scc-uart";
 149                                 reg = <11a00 20 8000 100>;
 150                                 interrupts = <28 8>;
 151                                 interrupt-parent = <&PIC>;
 152                                 fsl,cpm-brg = <1>;
 153                                 fsl,cpm-command = <00800000>;
 154                         };
 155
 156                         serial@11a60 {
 157                                 device_type = "serial";
 158                                 compatible = "fsl,mpc8272-scc-uart",
 159                                              "fsl,cpm2-scc-uart";
 160                                 reg = <11a60 20 8300 100>;
 161                                 interrupts = <2b 8>;
 162                                 interrupt-parent = <&PIC>;
 163                                 fsl,cpm-brg = <4>;
 164                                 fsl,cpm-command = <0ce00000>;
 165                         };
 166
 167                         mdio@10d40 {
 168                                 device_type = "mdio";
 169                                 compatible = "fsl,mpc8272ads-mdio-bitbang",
 170                                              "fsl,mpc8272-mdio-bitbang",
 171                                              "fsl,cpm2-mdio-bitbang";
 172                                 reg = <10d40 14>;
 173                                 #address-cells = <1>;
 174                                 #size-cells = <0>;
 175                                 fsl,mdio-pin = <12>;
 176                                 fsl,mdc-pin = <13>;
 177
 178                                 PHY0: ethernet-phy@0 {
 179                                         interrupt-parent = <&PIC>;
 180                                         interrupts = <17 8>;
 181                                         reg = <0>;
 182                                         device_type = "ethernet-phy";
 183                                 };
 184
 185                                 PHY1: ethernet-phy@1 {
 186                                         interrupt-parent = <&PIC>;
 187                                         interrupts = <17 8>;
 188                                         reg = <3>;
 189                                         device_type = "ethernet-phy";
 190                                 };
 191                         };
 192
 193                         ethernet@11300 {
 194                                 device_type = "network";
 195                                 compatible = "fsl,mpc8272-fcc-enet",
 196                                              "fsl,cpm2-fcc-enet";
 197                                 reg = <11300 20 8400 100 11390 1>;
 198                                 local-mac-address = [ 00 00 00 00 00 00 ];
 199                                 interrupts = <20 8>;
 200                                 interrupt-parent = <&PIC>;
 201                                 phy-handle = <&PHY0>;
 202                                 linux,network-index = <0>;
 203                                 fsl,cpm-command = <12000300>;
 204                         };
 205
 206                         ethernet@11320 {
 207                                 device_type = "network";
 208                                 compatible = "fsl,mpc8272-fcc-enet",
 209                                              "fsl,cpm2-fcc-enet";
 210                                 reg = <11320 20 8500 100 113b0 1>;
 211                                 local-mac-address = [ 00 00 00 00 00 00 ];
 212                                 interrupts = <21 8>;
 213                                 interrupt-parent = <&PIC>;
 214                                 phy-handle = <&PHY1>;
 215                                 linux,network-index = <1>;
 216                                 fsl,cpm-command = <16200300>;
 217                         };
 218                 };
 219
 220                 PIC: interrupt-controller@10c00 {
 221                         #interrupt-cells = <2>;
 222                         interrupt-controller;
 223                         reg = <10c00 80>;
 224                         compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
 225                 };
 226
 227 /* May need to remove if on a part without crypto engine */
 228                 crypto@30000 {
 229                         device_type = "crypto";
 230                         model = "SEC2";
 231                         compatible = "fsl,mpc8272-talitos-sec2",
 232                                      "fsl,talitos-sec2",
 233                                      "fsl,talitos",
 234                                      "talitos";
 235                         reg = <30000 10000>;
 236                         interrupts = <b 8>;
 237                         interrupt-parent = <&PIC>;
 238                         num-channels = <4>;
 239                         channel-fifo-len = <18>;
 240                         exec-units-mask = <0000007e>;
 241 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
 242                         descriptor-types-mask = <01010ebf>;
 243                 };
 244         };
 245
 246         chosen {
 247                 linux,stdout-path = "/soc/cpm/serial@11a00";
 248         };
 249 };