2 * Device Tree Source for AMCC Glacier (460GT)
4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
14 model = "amcc,glacier";
15 compatible = "amcc,glacier", "amcc,canyonlands";
16 dcr-parent = <&/cpus/cpu@0>;
33 model = "PowerPC,460GT";
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 i-cache-line-size = <20>;
38 d-cache-line-size = <20>;
39 i-cache-size = <8000>;
40 d-cache-size = <8000>;
42 dcr-access-method = "native";
47 device_type = "memory";
48 reg = <0 0 0>; /* Filled in by U-Boot */
51 UIC0: interrupt-controller0 {
52 compatible = "ibm,uic-460gt","ibm,uic";
58 #interrupt-cells = <2>;
61 UIC1: interrupt-controller1 {
62 compatible = "ibm,uic-460gt","ibm,uic";
68 #interrupt-cells = <2>;
69 interrupts = <1e 4 1f 4>; /* cascade */
70 interrupt-parent = <&UIC0>;
73 UIC2: interrupt-controller2 {
74 compatible = "ibm,uic-460gt","ibm,uic";
80 #interrupt-cells = <2>;
81 interrupts = <a 4 b 4>; /* cascade */
82 interrupt-parent = <&UIC0>;
85 UIC3: interrupt-controller3 {
86 compatible = "ibm,uic-460gt","ibm,uic";
92 #interrupt-cells = <2>;
93 interrupts = <10 4 11 4>; /* cascade */
94 interrupt-parent = <&UIC0>;
98 compatible = "ibm,sdr-460gt";
103 compatible = "ibm,cpr-460gt";
108 compatible = "ibm,plb-460gt", "ibm,plb4";
109 #address-cells = <2>;
112 clock-frequency = <0>; /* Filled in by U-Boot */
115 compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
120 compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
124 #address-cells = <0>;
126 interrupt-parent = <&UIC2>;
127 interrupts = < /*TXEOB*/ 6 4
132 desc-base-addr-high = <8>;
136 compatible = "ibm,opb-460gt", "ibm,opb";
137 #address-cells = <1>;
139 ranges = <b0000000 4 b0000000 50000000>;
140 clock-frequency = <0>; /* Filled in by U-Boot */
143 compatible = "ibm,ebc-460gt", "ibm,ebc";
145 #address-cells = <2>;
147 clock-frequency = <0>; /* Filled in by U-Boot */
149 interrupt-parent = <&UIC1>;
152 UART0: serial@ef600300 {
153 device_type = "serial";
154 compatible = "ns16550";
156 virtual-reg = <ef600300>;
157 clock-frequency = <0>; /* Filled in by U-Boot */
158 current-speed = <0>; /* Filled in by U-Boot */
159 interrupt-parent = <&UIC1>;
163 UART1: serial@ef600400 {
164 device_type = "serial";
165 compatible = "ns16550";
167 virtual-reg = <ef600400>;
168 clock-frequency = <0>; /* Filled in by U-Boot */
169 current-speed = <0>; /* Filled in by U-Boot */
170 interrupt-parent = <&UIC0>;
174 UART2: serial@ef600500 {
175 device_type = "serial";
176 compatible = "ns16550";
178 virtual-reg = <ef600500>;
179 clock-frequency = <0>; /* Filled in by U-Boot */
180 current-speed = <0>; /* Filled in by U-Boot */
181 interrupt-parent = <&UIC1>;
185 UART3: serial@ef600600 {
186 device_type = "serial";
187 compatible = "ns16550";
189 virtual-reg = <ef600600>;
190 clock-frequency = <0>; /* Filled in by U-Boot */
191 current-speed = <0>; /* Filled in by U-Boot */
192 interrupt-parent = <&UIC1>;
197 compatible = "ibm,iic-460gt", "ibm,iic";
199 interrupt-parent = <&UIC0>;
204 compatible = "ibm,iic-460gt", "ibm,iic";
206 interrupt-parent = <&UIC0>;
210 ZMII0: emac-zmii@ef600d00 {
211 compatible = "ibm,zmii-460gt", "ibm,zmii";
215 RGMII0: emac-rgmii@ef601500 {
216 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
221 RGMII1: emac-rgmii@ef601600 {
222 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
227 TAH0: emac-tah@ef601350 {
228 compatible = "ibm,tah-460gt", "ibm,tah";
232 TAH1: emac-tah@ef601450 {
233 compatible = "ibm,tah-460gt", "ibm,tah";
237 EMAC0: ethernet@ef600e00 {
238 device_type = "network";
239 compatible = "ibm,emac-460gt", "ibm,emac4";
240 interrupt-parent = <&EMAC0>;
242 #interrupt-cells = <1>;
243 #address-cells = <0>;
245 interrupt-map = </*Status*/ 0 &UIC2 10 4
246 /*Wake*/ 1 &UIC2 14 4>;
248 local-mac-address = [000000000000]; /* Filled in by U-Boot */
249 mal-device = <&MAL0>;
250 mal-tx-channel = <0>;
251 mal-rx-channel = <0>;
253 max-frame-size = <2328>;
254 rx-fifo-size = <1000>;
255 tx-fifo-size = <800>;
257 phy-map = <00000000>;
258 rgmii-device = <&RGMII0>;
260 tah-device = <&TAH0>;
262 has-inverted-stacr-oc;
263 has-new-stacr-staopc;
266 EMAC1: ethernet@ef600f00 {
267 device_type = "network";
268 compatible = "ibm,emac-460gt", "ibm,emac4";
269 interrupt-parent = <&EMAC1>;
271 #interrupt-cells = <1>;
272 #address-cells = <0>;
274 interrupt-map = </*Status*/ 0 &UIC2 11 4
275 /*Wake*/ 1 &UIC2 15 4>;
277 local-mac-address = [000000000000]; /* Filled in by U-Boot */
278 mal-device = <&MAL0>;
279 mal-tx-channel = <1>;
280 mal-rx-channel = <8>;
282 max-frame-size = <2328>;
283 rx-fifo-size = <1000>;
284 tx-fifo-size = <800>;
286 phy-map = <00000000>;
287 rgmii-device = <&RGMII0>;
289 tah-device = <&TAH1>;
291 has-inverted-stacr-oc;
292 has-new-stacr-staopc;
295 EMAC2: ethernet@ef601100 {
296 device_type = "network";
297 compatible = "ibm,emac-460gt", "ibm,emac4";
298 interrupt-parent = <&EMAC2>;
300 #interrupt-cells = <1>;
301 #address-cells = <0>;
303 interrupt-map = </*Status*/ 0 &UIC2 12 4
304 /*Wake*/ 1 &UIC2 16 4>;
306 local-mac-address = [000000000000]; /* Filled in by U-Boot */
307 mal-device = <&MAL0>;
308 mal-tx-channel = <2>;
309 mal-rx-channel = <10>;
311 max-frame-size = <2328>;
312 rx-fifo-size = <1000>;
313 tx-fifo-size = <800>;
315 phy-map = <00000000>;
316 rgmii-device = <&RGMII1>;
318 has-inverted-stacr-oc;
319 has-new-stacr-staopc;
322 EMAC3: ethernet@ef601200 {
323 device_type = "network";
324 compatible = "ibm,emac-460gt", "ibm,emac4";
325 interrupt-parent = <&EMAC3>;
327 #interrupt-cells = <1>;
328 #address-cells = <0>;
330 interrupt-map = </*Status*/ 0 &UIC2 13 4
331 /*Wake*/ 1 &UIC2 17 4>;
333 local-mac-address = [000000000000]; /* Filled in by U-Boot */
334 mal-device = <&MAL0>;
335 mal-tx-channel = <3>;
336 mal-rx-channel = <18>;
338 max-frame-size = <2328>;
339 rx-fifo-size = <1000>;
340 tx-fifo-size = <800>;
342 phy-map = <00000000>;
343 rgmii-device = <&RGMII1>;
345 has-inverted-stacr-oc;
346 has-new-stacr-staopc;
350 PCIX0: pci@c0ec00000 {
352 #interrupt-cells = <1>;
354 #address-cells = <3>;
355 compatible = "ibm,plb-pcix-460gt", "ibm,plb-pcix";
357 large-inbound-windows;
359 reg = <c 0ec00000 8 /* Config space access */
360 0 0 0 /* no IACK cycles */
361 c 0ed00000 4 /* Special cycles */
362 c 0ec80000 100 /* Internal registers */
363 c 0ec80100 fc>; /* Internal messaging registers */
365 /* Outbound ranges, one memory and one IO,
366 * later cannot be changed
368 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
369 01000000 0 00000000 0000000c 08000000 0 00010000>;
371 /* Inbound 2GB range starting at 0 */
372 dma-ranges = <42000000 0 0 0 0 0 80000000>;
374 /* This drives busses 0 to 0x3f */
377 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
378 interrupt-map-mask = <0000 0 0 0>;
379 interrupt-map = < 0000 0 0 0 &UIC1 0 8 >;
382 PCIE0: pciex@d00000000 {
384 #interrupt-cells = <1>;
386 #address-cells = <3>;
387 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
389 port = <0>; /* port number */
390 reg = <d 00000000 20000000 /* Config space access */
391 c 08010000 00001000>; /* Registers */
395 /* Outbound ranges, one memory and one IO,
396 * later cannot be changed
398 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
399 01000000 0 00000000 0000000f 80000000 0 00010000>;
401 /* Inbound 2GB range starting at 0 */
402 dma-ranges = <42000000 0 0 0 0 0 80000000>;
404 /* This drives busses 40 to 0x7f */
407 /* Legacy interrupts (note the weird polarity, the bridge seems
408 * to invert PCIe legacy interrupts).
409 * We are de-swizzling here because the numbers are actually for
410 * port of the root complex virtual P2P bridge. But I want
411 * to avoid putting a node for it in the tree, so the numbers
412 * below are basically de-swizzled numbers.
413 * The real slot is on idsel 0, so the swizzling is 1:1
415 interrupt-map-mask = <0000 0 0 7>;
417 0000 0 0 1 &UIC3 c 4 /* swizzled int A */
418 0000 0 0 2 &UIC3 d 4 /* swizzled int B */
419 0000 0 0 3 &UIC3 e 4 /* swizzled int C */
420 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;
423 PCIE1: pciex@d20000000 {
425 #interrupt-cells = <1>;
427 #address-cells = <3>;
428 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
430 port = <1>; /* port number */
431 reg = <d 20000000 20000000 /* Config space access */
432 c 08011000 00001000>; /* Registers */
436 /* Outbound ranges, one memory and one IO,
437 * later cannot be changed
439 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
440 01000000 0 00000000 0000000f 80010000 0 00010000>;
442 /* Inbound 2GB range starting at 0 */
443 dma-ranges = <42000000 0 0 0 0 0 80000000>;
445 /* This drives busses 80 to 0xbf */
448 /* Legacy interrupts (note the weird polarity, the bridge seems
449 * to invert PCIe legacy interrupts).
450 * We are de-swizzling here because the numbers are actually for
451 * port of the root complex virtual P2P bridge. But I want
452 * to avoid putting a node for it in the tree, so the numbers
453 * below are basically de-swizzled numbers.
454 * The real slot is on idsel 0, so the swizzling is 1:1
456 interrupt-map-mask = <0000 0 0 7>;
458 0000 0 0 1 &UIC3 10 4 /* swizzled int A */
459 0000 0 0 2 &UIC3 11 4 /* swizzled int B */
460 0000 0 0 3 &UIC3 12 4 /* swizzled int C */
461 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;