2 * Device Tree Source for EP405
4 * Copyright 2007 IBM Corp.
5 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
17 dcr-parent = <&/cpus/PowerPC,405GP@0>;
26 clock-frequency = <bebc200>; /* Filled in by zImage */
27 timebase-frequency = <0>; /* Filled in by zImage */
28 i-cache-line-size = <20>;
29 d-cache-line-size = <20>;
30 i-cache-size = <4000>;
31 d-cache-size = <4000>;
33 dcr-access-method = "native";
38 device_type = "memory";
39 reg = <0 0>; /* Filled in by zImage */
42 UIC0: interrupt-controller {
43 compatible = "ibm,uic";
49 #interrupt-cells = <2>;
53 compatible = "ibm,plb3";
57 clock-frequency = <0>; /* Filled in by zImage */
59 SDRAM0: memory-controller {
60 compatible = "ibm,sdram-405gp";
65 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
69 interrupt-parent = <&UIC0>;
79 compatible = "ibm,opb-405gp", "ibm,opb";
82 ranges = <ef600000 ef600000 a00000>;
84 clock-frequency = <0>; /* Filled in by zImage */
86 UART0: serial@ef600300 {
87 device_type = "serial";
88 compatible = "ns16550";
90 virtual-reg = <ef600300>;
91 clock-frequency = <0>; /* Filled in by zImage */
92 current-speed = <2580>;
93 interrupt-parent = <&UIC0>;
97 UART1: serial@ef600400 {
98 device_type = "serial";
99 compatible = "ns16550";
101 virtual-reg = <ef600400>;
102 clock-frequency = <0>; /* Filled in by zImage */
103 current-speed = <2580>;
104 interrupt-parent = <&UIC0>;
109 compatible = "ibm,iic-405gp", "ibm,iic";
111 interrupt-parent = <&UIC0>;
115 GPIO: gpio@ef600700 {
116 compatible = "ibm,gpio-405gp";
120 EMAC: ethernet@ef600800 {
121 linux,network-index = <0>;
122 device_type = "network";
123 compatible = "ibm,emac-405gp", "ibm,emac";
124 interrupt-parent = <&UIC0>;
127 9 4 /* Ethernet Wake Up */>;
128 local-mac-address = [000000000000]; /* Filled in by zImage */
131 mal-tx-channel = <0>;
132 mal-rx-channel = <0>;
134 max-frame-size = <5dc>;
135 rx-fifo-size = <1000>;
136 tx-fifo-size = <800>;
138 phy-map = <00000000>;
144 compatible = "ibm,ebc-405gp", "ibm,ebc";
146 #address-cells = <2>;
150 /* The ranges property is supplied by the bootwrapper
151 * and is based on the firmware's configuration of the
154 clock-frequency = <0>; /* Filled in by zImage */
158 compatible = "ds1742";
159 reg = <4 200000 0>; /* size fixed up by zImage */
162 /* "BCSR" CPLD contains a PCI irq controller */
164 compatible = "ep405-bcsr";
166 interrupt-controller;
168 irq-routing = [ 00 /* SYSERR */
172 02 /* NB PCIIRQ mux ? */
173 03 /* SB Winbond 8259 ? */
175 05 /* USB (ep405pc) */
189 #interrupt-cells = <1>;
191 #address-cells = <3>;
192 compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
194 reg = <eec00000 8 /* Config space access */
195 eed80000 4 /* IACK */
196 eed80000 4 /* Special cycle */
197 ef480000 40>; /* Internal registers */
199 /* Outbound ranges, one memory and one IO,
200 * later cannot be changed. Chip supports a second
201 * IO range but we don't use it for now
203 ranges = <02000000 0 80000000 80000000 0 20000000
204 01000000 0 00000000 e8000000 0 00010000>;
206 /* Inbound 2GB range starting at 0 */
207 dma-ranges = <42000000 0 0 0 0 80000000>;
209 /* That's all I know about IRQs on that thing ... */
210 interrupt-map-mask = <f800 0 0 0>;
213 7000 0 0 0 &UIC0 1e 8 /* IRQ5 */
219 linux,stdout-path = "/plb/opb/serial@ef600300";