2 * Toshiba rbtx4927 specific setup
4 * Author: MontaVista Software, Inc.
7 * Copyright 2001-2002 MontaVista Software Inc.
9 * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
10 * Copyright (C) 2000 RidgeRun, Inc.
11 * Author: RidgeRun, Inc.
12 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
14 * Copyright 2001 MontaVista Software Inc.
15 * Author: jsun@mvista.com or jsun@junsun.net
17 * Copyright 2002 MontaVista Software Inc.
18 * Author: Michael Pruznick, michael_pruznick@mvista.com
20 * Copyright (C) 2000-2001 Toshiba Corporation
22 * Copyright (C) 2004 MontaVista Software Inc.
23 * Author: Manish Lachwani, mlachwani@mvista.com
25 * This program is free software; you can redistribute it and/or modify it
26 * under the terms of the GNU General Public License as published by the
27 * Free Software Foundation; either version 2 of the License, or (at your
28 * option) any later version.
30 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
31 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
32 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
33 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
34 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
36 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
37 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
38 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
39 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 * You should have received a copy of the GNU General Public License along
42 * with this program; if not, write to the Free Software Foundation, Inc.,
43 * 675 Mass Ave, Cambridge, MA 02139, USA.
45 #include <linux/init.h>
46 #include <linux/kernel.h>
47 #include <linux/types.h>
48 #include <linux/ioport.h>
49 #include <linux/interrupt.h>
51 #include <linux/platform_device.h>
52 #include <linux/delay.h>
54 #include <asm/processor.h>
55 #include <asm/reboot.h>
56 #include <asm/txx9/generic.h>
57 #include <asm/txx9/pci.h>
58 #include <asm/txx9/rbtx4927.h>
59 #include <asm/txx9/tx4938.h> /* for TX4937 */
62 static void __init tx4927_pci_setup(void)
64 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB);
65 struct pci_controller *c = &txx9_primary_pcic;
67 register_pci_controller(c);
69 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66)
71 (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
72 TXX9_PCI_OPT_CLK_66; /* already configured */
75 writeb(1, rbtx4927_pcireset_addr);
77 txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
78 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
80 tx4927_pciclk66_setup();
82 /* clear PCIC reset */
83 txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
84 writeb(0, rbtx4927_pcireset_addr);
87 tx4927_report_pciclk();
88 tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
89 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
90 TXX9_PCI_OPT_CLK_AUTO &&
91 txx9_pci66_check(c, 0, 0)) {
93 writeb(1, rbtx4927_pcireset_addr);
95 txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
96 tx4927_pciclk66_setup();
98 /* clear PCIC reset */
99 txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
100 writeb(0, rbtx4927_pcireset_addr);
102 /* Reinitialize PCIC */
103 tx4927_report_pciclk();
104 tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
106 tx4927_setup_pcierr_irq();
109 static void __init tx4937_pci_setup(void)
111 int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
112 struct pci_controller *c = &txx9_primary_pcic;
114 register_pci_controller(c);
116 if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
118 (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
119 TXX9_PCI_OPT_CLK_66; /* already configured */
122 writeb(1, rbtx4927_pcireset_addr);
124 txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
125 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
127 tx4938_pciclk66_setup();
129 /* clear PCIC reset */
130 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
131 writeb(0, rbtx4927_pcireset_addr);
134 tx4938_report_pciclk();
135 tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
136 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
137 TXX9_PCI_OPT_CLK_AUTO &&
138 txx9_pci66_check(c, 0, 0)) {
140 writeb(1, rbtx4927_pcireset_addr);
142 txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
143 tx4938_pciclk66_setup();
145 /* clear PCIC reset */
146 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
147 writeb(0, rbtx4927_pcireset_addr);
149 /* Reinitialize PCIC */
150 tx4938_report_pciclk();
151 tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
153 tx4938_setup_pcierr_irq();
156 static void __init rbtx4927_arch_init(void)
161 static void __init rbtx4937_arch_init(void)
166 #define rbtx4927_arch_init NULL
167 #define rbtx4937_arch_init NULL
168 #endif /* CONFIG_PCI */
170 static void __noreturn wait_forever(void)
177 static void toshiba_rbtx4927_restart(char *command)
179 printk(KERN_NOTICE "System Rebooting...\n");
181 /* enable the s/w reset register */
182 writeb(1, rbtx4927_softresetlock_addr);
184 /* wait for enable to be seen */
185 while (!(readb(rbtx4927_softresetlock_addr) & 1))
189 writeb(1, rbtx4927_softreset_addr);
191 /* do something passive while waiting for reset */
197 static void toshiba_rbtx4927_halt(void)
199 printk(KERN_NOTICE "System Halted\n");
205 static void toshiba_rbtx4927_power_off(void)
207 toshiba_rbtx4927_halt();
211 static void __init rbtx4927_clock_init(void);
212 static void __init rbtx4937_clock_init(void);
214 static void __init rbtx4927_mem_setup(void)
219 /* f/w leaves this on at startup */
220 clear_c0_status(ST0_ERL);
222 /* enable caches -- HCP5 does this, pmon does not */
223 cp0_config = read_c0_config();
224 cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
225 write_c0_config(cp0_config);
227 if (TX4927_REV_PCODE() == 0x4927) {
228 rbtx4927_clock_init();
231 rbtx4937_clock_init();
235 _machine_restart = toshiba_rbtx4927_restart;
236 _machine_halt = toshiba_rbtx4927_halt;
237 pm_power_off = toshiba_rbtx4927_power_off;
240 txx9_alloc_pci_controller(&txx9_primary_pcic,
241 RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE,
242 RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE);
243 txx9_board_pcibios_setup = tx4927_pcibios_setup;
245 set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
248 tx4927_setup_serial();
249 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
250 argptr = prom_getcmdline();
251 if (strstr(argptr, "console=") == NULL) {
252 strcat(argptr, " console=ttyS0,38400");
256 #ifdef CONFIG_ROOT_NFS
257 argptr = prom_getcmdline();
258 if (strstr(argptr, "root=") == NULL) {
259 strcat(argptr, " root=/dev/nfs rw");
264 argptr = prom_getcmdline();
265 if (strstr(argptr, "ip=") == NULL) {
266 strcat(argptr, " ip=any");
271 static void __init rbtx4927_clock_init(void)
274 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
277 * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
278 * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
279 * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
280 * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
281 * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
282 * i.e. S9[3]: ON (83MHz), OFF (100MHz)
284 switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) &
285 TX4927_CCFG_PCIDIVMODE_MASK) {
286 case TX4927_CCFG_PCIDIVMODE_2_5:
287 case TX4927_CCFG_PCIDIVMODE_5:
288 txx9_cpu_clock = 166666666; /* 166MHz */
291 txx9_cpu_clock = 200000000; /* 200MHz */
295 static void __init rbtx4937_clock_init(void)
298 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
301 * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
302 * PCIDIVMODE[10] is 0.
303 * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
304 * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
305 * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
306 * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
307 * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
308 * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
310 switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) &
311 TX4938_CCFG_PCIDIVMODE_MASK) {
312 case TX4938_CCFG_PCIDIVMODE_8:
313 case TX4938_CCFG_PCIDIVMODE_4:
314 txx9_cpu_clock = 266666666; /* 266MHz */
316 case TX4938_CCFG_PCIDIVMODE_9:
317 case TX4938_CCFG_PCIDIVMODE_4_5:
318 txx9_cpu_clock = 300000000; /* 300MHz */
321 txx9_cpu_clock = 333333333; /* 333MHz */
325 static void __init rbtx4927_time_init(void)
330 static int __init toshiba_rbtx4927_rtc_init(void)
332 struct resource res = {
333 .start = RBTX4927_BRAMRTC_BASE - IO_BASE,
334 .end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1,
335 .flags = IORESOURCE_MEM,
337 struct platform_device *dev =
338 platform_device_register_simple("rtc-ds1742", -1, &res, 1);
339 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
342 static int __init rbtx4927_ne_init(void)
344 struct resource res[] = {
346 .start = RBTX4927_RTL_8019_BASE,
347 .end = RBTX4927_RTL_8019_BASE + 0x20 - 1,
348 .flags = IORESOURCE_IO,
350 .start = RBTX4927_RTL_8019_IRQ,
351 .flags = IORESOURCE_IRQ,
354 struct platform_device *dev =
355 platform_device_register_simple("ne", -1,
356 res, ARRAY_SIZE(res));
357 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
360 /* Watchdog support */
362 static int __init txx9_wdt_init(unsigned long base)
364 struct resource res = {
366 .end = base + 0x100 - 1,
367 .flags = IORESOURCE_MEM,
369 struct platform_device *dev =
370 platform_device_register_simple("txx9wdt", -1, &res, 1);
371 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
374 static int __init rbtx4927_wdt_init(void)
376 return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
379 static void __init rbtx4927_device_init(void)
381 toshiba_rbtx4927_rtc_init();
386 struct txx9_board_vec rbtx4927_vec __initdata = {
387 .system = "Toshiba RBTX4927",
388 .prom_init = rbtx4927_prom_init,
389 .mem_setup = rbtx4927_mem_setup,
390 .irq_setup = rbtx4927_irq_setup,
391 .time_init = rbtx4927_time_init,
392 .device_init = rbtx4927_device_init,
393 .arch_init = rbtx4927_arch_init,
395 .pci_map_irq = rbtx4927_pci_map_irq,
398 struct txx9_board_vec rbtx4937_vec __initdata = {
399 .system = "Toshiba RBTX4937",
400 .prom_init = rbtx4927_prom_init,
401 .mem_setup = rbtx4927_mem_setup,
402 .irq_setup = rbtx4927_irq_setup,
403 .time_init = rbtx4927_time_init,
404 .device_init = rbtx4927_device_init,
405 .arch_init = rbtx4937_arch_init,
407 .pci_map_irq = rbtx4927_pci_map_irq,